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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 379 records · Page 21
All sourcesNASA NTRSDOE OSTI
NASA NTRS1976

Linear minimum variance filters applied to carrier tracking

A new approach is taken to the problem of tracking a fixed amplitude signal with a Brownian-motion phase process. Classically, a first-order phase-lock loop (PLL) is used; here, the problem is treated via estimation of the quadrature signal components. In this space, the state dynamics are linear with white multiplicative noise. Therefore, linear minimum-variance filters, which have a particularly simple mechanization, are suggested. The resulting error dynamics are linear at any signal/noise ratio, unlike the classical PLL. During synchronization, and above threshold, this filter with constant gains degrades by 3 per cent in output rms phase error with respect to the classical loop. However, up to 80 per cent of the maximum possible noise improvement is obtained below threshold, where the classical loop is nonoptimum, as demonstrated by a Monte Carlo analysis. Filter mechanizations are presented for both carrier and baseband operation.

Gustafson, D. E.↗
NASA NTRS2009

Joint Carrier-Phase Synchronization and LDPC Decoding

A method has been proposed to increase the degree of synchronization of a radio receiver with the phase of a suppressed carrier signal modulated with a binary- phase-shift-keying (BPSK) or quaternary- phase-shift-keying (QPSK) signal representing a low-density parity-check (LDPC) code. This method is an extended version of the method described in Using LDPC Code Constraints to Aid Recovery of Symbol Timing (NPO-43112), NASA Tech Briefs, Vol. 32, No. 10 (October 2008), page 54. Both methods and the receiver architectures in which they would be implemented belong to a class of timing- recovery methods and corresponding receiver architectures characterized as pilotless in that they do not require transmission and reception of pilot signals. The proposed method calls for the use of what is known in the art as soft decision feedback to remove the modulation from a replica of the incoming signal prior to feeding this replica to a phase-locked loop (PLL) or other carrier-tracking stage in the receiver. Soft decision feedback refers to suitably processed versions of intermediate results of iterative computations involved in the LDPC decoding process. Unlike a related prior method in which hard decision feedback (the final sequence of decoded symbols) is used to remove the modulation, the proposed method does not require estimation of the decoder error probability. In a basic digital implementation of the proposed method, the incoming signal (having carrier phase theta theta (sub c) plus noise would first be converted to inphase (I) and quadrature (Q) baseband signals by mixing it with I and Q signals at the carrier frequency [wc/(2 pi)] generated by a local oscillator. The resulting demodulated signals would be processed through one-symbol-period integrate and- dump filters, the outputs of which would be sampled and held, then multiplied by a soft-decision version of the baseband modulated signal. The resulting I and Q products consist of terms proportional to the cosine and sine of the carrier phase cc as well as correlated noise components. These products would be fed as inputs to a digital PLL that would include a number-controlled oscillator (NCO), which provides an estimate of the carrier phase, theta(sub c).

Simon, Marvin↗
DOE OSTI2020

A 1.2-V 6-GHz Dual-Path Charge-Pump PLL Frequency Synthesizer for Quantum Control and Readout in CMOS 65-nm Process

This paper presents a low jitter dual-path chargepump phase locked loop (PLL) synthesizer in a CMOS 65-nm process for quantum readout applications. The PLL incorporates a programmable dual chargepump and a loop filter with both proportional and integral paths that can be driven independently providing flexible control of the loop bandwidth to achieve low jitter performance. The design is implemented at 300 K and critical blocks like voltage-controlled oscillator (VCO) and chargepump (CP) are analyzed at 77 K based on the characterized results. The LC-VCO is realized with the class-C NMOS only architecture with 5-bit coarse control and quadrature signals are generated with poly phase filter. The VCO is designed with the tuning range of 1 GHz around the center frequency of 6 GHz with Phase Noise of -123 dBc/Hz and -132 dBc/Hz at 1MHz offset at 300 K and 77 K temperature. The simulated PLL rms jitter is 125 fs at 6 GHz with a power consumption of 8 mW at the 1.2 V power supply.

47 OTHER INSTRUMENTATION↗
NASA NTRS1981

High resolution angular sensor

Specifications for the pointing stabilization system of the large space telescope were used in an investigation of the feasibility of reducing ring laser gyro output quantization to the sub-arc-second level by the use of phase locked loops and associated electronics. Systems analysis procedures are discussed and a multioscillator laser gyro model is presented along with data on the oscillator noise. It is shown that a second order closed loop can meet the measurement noise requirements when the loop gain and time constant of the loop filter are appropriately chosen. The preliminary electrical design is discussed from the standpoint of circuit tradeoff considerations. Analog, digital, and hybrid designs are given and their applicability to the high resolution sensor is examined. the electrical design choice of a system configuration is detailed. The design and operation of the various modules is considered and system block diagrams are included. Phase 1 and 2 test results using the multioscillator laser gyro are included.

Gneses, M. I.↗
DOE OSTI2020

Design of a Non-PLL Grid-Forming Inverter for Smooth Microgrid Transition Operation: Preprint

This paper develops a non-phase-locked loop (PLL) grid-connected inverter that can improve the microgrid’s transients during transition operation. By emulating the operation of a synchronous machine, the inverter generates its own voltage and frequency during startup, synchronizes and connects to the grid, then operates in reactive power mode (grid-feeding) with self-generated voltage and frequency, and switches to voltage-frequency mode to establish system voltage and frequency (grid-forming) when the microgrid disconnects from the main grid, and vice versa. To enable fast synchronization, active synchronization control is adopted both during inverter startup and microgrid reconnection operation. The simulation results show that the developed non-PLL grid-connected inverter works effectively to synchronize the inverter and microgrid to the grid and avoids a phase jump during microgrid transition operation. Thus, the microgrid’s transients are significantly improved with the proposed control technique.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗
NASA NTRS1992

Solid-state lasers for coherent communication and remote sensing

Semiconductor-diode laser-pumped solid-state lasers have properties that are superior to other lasers for the applications of coherent communication and remote sensing. These properties include efficiency, reliability, stability, and capability to be scaled to higher powers. We have demonstrated that an optical phase-locked loop can be used to lock the frequency of two diode-pumped 1.06 micron Nd:YAG lasers to levels required for coherent communication. Monolithic nonplanar ring oscillators constructed from solid pieces of the laser material provide better than 10 kHz frequency stability over 0.1 sec intervals. We have used active feedback stabilization of the cavity length of these lasers to demonstrate 0.3 Hz frequency stabilization relative to a reference cavity. We have performed experiments and analysis to show that optical parametric oscillators (OPO's) reproduce the frequency stability of the pump laser in outputs that can be tuned to arbitrary wavelengths. Another measurement performed in this program has demonstrated the sub-shot-noise character of correlations of the fluctuations in the twin output of OPO's. Measurements of nonlinear optical coefficients by phase-matched second harmonic generation are helping to resolve inconsistency in these important parameters.

Byer, Robert L.↗
DOE OSTI2025

Reinforcement Learning‐Based Adaptation of Grid Following Inverter's Internal Controller to Networked Microgrids' Strengths

The varying topological configurations, generator commitments and dispatches, and dynamic load demand lead to changing system's strengths during the operations of networked microgrids. When the system's strengths significantly change, the fixed control gains at large devices may result in unsatisfactory system performance; this necessitates the tuning of the control gains at large devices to adapt to the changing system's strengths. In this paper, observer-based reinforcement learning (RL) is utilised to automatically tune the proportional-integral (PI) gains of phase lock loop (PLL) controller of grid-following (GFL) inverters to adapt to the changing strengths of microgrids and networked microgrids. The RL agent in this framework augments an observer predicting system's strengths, from which the RL control policy will adjust accordingly to tune the PLL controller's gains towards the system's strengths. Also, to enhance the control performance, the recently introduced Barrier function-based RL framework is leveraged for the design of reward function to prevent the high frequency nadir. An operational 26 kV electric distribution system, which is modelled as networked microgrids, is used to illustrate the need and effectiveness of the proposed RL-tuned control.

frequency response↗
DOE OSTI2022

A 20 Gbps PAM4 data transmitter ASIC for particle physics experiments

We present the design and test results of a novel data transmitter ASIC operating up to 20.48 Gbps with 4-level Pulse-Amplitude-Modulation (PAM4) for particle physics experiments. This ASIC, named GBS20, is fabricated in a 65 nm CMOS technology. Two serializers share a 5.12 GHz Phase Locked Loop (PLL) clock. The outputs from the serializers are combined into a PAM4 signal that directly drives a Vertical-Cavity-Surface-Emitting-Laser (VCSEL). The input data channels, each at 1.28 Gbps, are scrambled with an internal 2$^{7}$-1 Pseudo-Random Binary Sequence (PRBS), which also serves as a frame aligner. GBS20 is tested to work at 10.24 and 20.48 Gbps with a VCSEL-based Transmitter-Optical-Subassembly (TOSA). The power consumption of GBS20 is below 238 mW and reduced to 164 mW in the low-power mode.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2022

A radiation tolerant clock generator for the CMS endcap timing layer readout chip

Here, we present the test results of a low jitter Phase Locked Loop (PLL) prototype chip for the CMS Endcap Timing Layer readout chip (ETROC). This chip is based on the improved version of a clock synthesis circuit named ljCDR from the Low Power Gigabit Transceiver (lpGBT) project. The ljCDR is tested in its PLL mode. An automatic frequency calibration (AFC) block with the Triple Modular Redundancy (TMR) register is developed for the LC-oscillator calibration. The chip was manufactured in a 65 nm CMOS process with 10 metal layers. The chip has been extensively tested, including Total Ionizing Dose (TID) testing up to 300 Mrad and Single Event Upset (SEU) testing with heavy ions possessing a Linear Energy Transfer (LET) from 1.3 to 62.5 MeV × cm 2 /mg.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2025

An integer- N frequency synthesizer for flexible on-chip clock generation

A low-power integer-N frequency synthesizer for flexible on-chip clock generation has been designed in a 65 nm CMOS process. The circuit can be programmed to generate two independent low-jitter clocks between 30 MHz and 3 GHz that are locked to a 10–50 MHz reference input. The design uses a phase-locked loop (PLL) with a dual-tuned LC voltage-controlled oscillator (VCO), programmable feedback divider, and dual output dividers. The total power consumption from 1.2 V and 0.8 V supplies is 4.0 mW. In conclusion, experimental results confirm the functionality of the proposed synthesizer over a wide range of output frequencies.

47 OTHER INSTRUMENTATION↗
DOE OSTI2022

Grid-Forming Control Using TAPAS Software Defined Inverters

Here, this paper discusses the design and hardware implementation aspects of state-feedback primary control for grid forming inverters. The primary control consists of two tracking control laws: voltage tracking and frequency/angle tracking. The voltage tracking control requires voltage and current at the inverter's switch terminal (i.e. before the filter). The fundamental component of switch terminal voltage is estimated using the inverter's average model while the switch terminal current is estimated using an observer, thus obviating the need for sensors at the switch terminals. The measurements of frequency and angle(s) needed for frequency/angle tracking are noisy due to measurement noises and inherent delays in the phase locked loop (PLL). Conditioning of these feedback signals is discussed in detail, and the corresponding changes in the control design are provided to better attenuate the impact of noises. Effectiveness of the proposed design and implementation is demonstrated by the implementation results from TAPAS software defined inverter (SDI).

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2023

Impedance Modeling and Stability Analysis for the PLL-less and Voltage Sensor-less Grid-tied Converters

The newly developed control methodology, which omits the phase-locked loop (PLL) and voltage sensor, has garnered considerable attention for its rapid dynamic response and reduced hardware expenses. Nonetheless, its stability concerns have not yet been thoroughly scrutinized. In this paper, the impedance modeling of the PLL-less and voltage sensorless control strategy has been established. The impedance model has been contrasted with the traditional PLL-based control scheme. Our findings demonstrate that the PLL-less and voltage sensorless control approach lacks the negative resistance behavior that is frequently observed in the traditional scheme, which results in unstable operations. Furthermore, the role of virtual resistance has been examined. To substantiate the aforementioned findings, simulation results are presented.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2023

Switching-Cycle-Based Startup for Grid-tied Inverters

This paper presents a novel switching cycle-based startup approach that eliminates the need for voltage sensors and phase-locked loops. Here, the proposed method surpasses the bandwidth limitations inherent in traditional PLL-based synchronization techniques and attains grid synchronization of the inverter within two switching cycles. Despite the absence of voltage sensors and PLLs, this synchronization is achieved without inrush currents. Furthermore, the startup method does not necessitate the addition of any hardware or an increase in software complexity. Simulation and experimental results are presented to verify the effectiveness of the proposed method.

42 ENGINEERING↗
DOE OSTI2020

Decoupled Active and Reactive Power Control without PLL Requirement for Differential Buck Converter

This paper presents a decoupled active and reactive power control for the differential buck converter. This control does not require phase locked loop (PLL) for synchronization. Also, it achieves active and reactive power control in a simple single control loop structure. The differential buck converter has the capability to compensate the double line frequency power ripple without relying on additional hardware. Particularly, the Common Mode (CM) operation is used for active double line frequency power ripple absorption. Whereas, the Differential Mode (DM) operation is used as an active and reactive power exchanging port between the converter and the grid at the point of common coupling (PCC). The motivation behind this paper proposal are: (i) to avoid PLL induced instabilities, especially, when connecting the differential buck converter with weak grid, and (ii) direct active and reactive power control for the differential buck in a single loop control. The theoretical analyses are verified with a 5 kW converter with only 50 μF decoupling capacitor connected to a weak grid.

Khan, Ahmad↗
DOE OSTI2025

Enabling Technology for Energy Sustainability: Power Electronic Converter Control for Renewables

To ensure high penetration of renewable energy sources into power grids, their interfacing inverters need to be designed to provide grid support functions. Important grid support functions include frequency and voltage support. To this end, the research community has recently invested heavily on grid-forming control pilot projects. Grid forming control aims to replace traditional grid following control, which is based on phase-locked loop and can achieve decoupled real and reactive power control. Here, in this article, we review the state-of-the-art grid following and forming technology and point out some deficiencies in dynamic performance in the widely adopted grid-forming control design. We also examine how to ensure that the vector control capable of decoupled real and reactive power regulation can also be achieved in the grid forming design. This type of design has been prototyped and shown great potential to enable retrofitting of large amounts of grid-following controllers through purely software algorithm update. The technology ensures reliable operation of power grids with high penetration of IBRs, thereby further reducing fossil fueled energy sources and cut down carbon emission.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2023

Passivity-Based Control of Grid Forming and Grid Following Converters in Microgrids

With the integration of more and more power electronics devices into the grid, it is not easy to guarantee the stability of the whole system due to the complexity of the control structure of various power converters. In this paper, we consider grid-forming and grid-following converters in one microgrid, in which the grid-forming converters support the voltage and frequency of the microgrid and the grid-following converters inject their maximum power into the microgrid. To handle the stability issue, the passivity principle is applied to guarantee the stability of the whole microgrid. We ensure every grid-following converter satisfies the passivity via the port-controlled Hamiltonian method. In addition, we apply the passivity-based proportional-resonant controller to the grid-forming converter. One of the advantages of the proposed method is that the phase lock loop system is eliminated, which may cause stability issues. Simulation results show that the proposed method can control the microgrid effectively.

Gui, Yonghao (Young)↗
DOE OSTI2020

Bulk Power System Dynamics with Varying Levels of Synchronous Generators and Grid-Forming Power Inverters

Inverters using phase-locked loops for control depend on voltages generated by synchronous machines to operate. This might be problematic if much of the conventional generation fleet is displaced by inverters. To solve this problem, grid-forming control for inverters has been proposed as being capable of autonomously regulating grid voltages and frequency. Presently, the performance of bulk power systems with massive penetration of grid-forming inverters has not been thoroughly studied as to elucidate benefits. Hence, this paper presents inverter models with two grid-forming strategies: virtual oscillator control and droop control. The two models are specifically developed to be used in positive-sequence simulation packages and have been implemented in PSLF. The implementations are used to study the performance of bulk power grids incorporating inverters with gridforming capability. Specifically, simulations are conducted on a modified IEEE 39-bus test system and the microWECC test system with varying levels of synchronous and inverter-based generation. The dynamic performance of the tested systems with gridforming inverters during contingency events is better than cases with only synchronous generation.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2020

Photovoltaic Inverter Momentary Cessation: Recovery Process is Key

Momentary cessation refers to an inverter control mode. When the inverter terminal voltage falls below (or exceeds) a certain level, the inverter ceases to output any current, but attempts to maintain (or quickly regain) phase-locked loop synchronization to allow for quick reinjection of current when the voltage recovers to a certain point. This paper presents a photovoltaic (PV) momentary cessation model developed in PSS/E. Simulations are presented for a high voltage transmission line fault contingency in the Hawaiian island of Oahu power system on a validated PSS/E model, modified to include a custom distributed PV inverter model, and different near-future distributed PV penetration levels. Simulations for the island power system include different penetration levels of PV, and different recovery times (ramp rates and delays) after momentary cessation. The results indicate that during low voltage events, such as faults, momentary cessation can produce severe under frequency events, causing significant load shed and shortly thereafter, in some cases, over frequency events that cause generation to trip offline. The problem is exacerbated with higher penetration levels of PV. If momentary cessation is used (as is typically the case for distribution-connected resources), the recovery process after momentary cessation should be carefully considered to minimize impacts to bulk power system stability.

14 SOLAR ENERGY↗