Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “radiation effects in ICs”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 37 records · Page 2
All sourcesNASA NTRSDOE OSTI
NASA NTRS1989

Product assurance technology for procuring reliable, radiation-hard, custom LSI/VLSI electronics

Advanced measurement methods using microelectronic test chips are described. These chips are intended to be used in acquiring the data needed to qualify Application Specific Integrated Circuits (ASIC's) for space use. Efforts were focused on developing the technology for obtaining custom IC's from CMOS/bulk silicon foundries. A series of test chips were developed: a parametric test strip, a fault chip, a set of reliability chips, and the CRRES (Combined Release and Radiation Effects Satellite) chip, a test circuit for monitoring space radiation effects. The technical accomplishments of the effort include: (1) development of a fault chip that contains a set of test structures used to evaluate the density of various process-induced defects; (2) development of new test structures and testing techniques for measuring gate-oxide capacitance, gate-overlap capacitance, and propagation delay; (3) development of a set of reliability chips that are used to evaluate failure mechanisms in CMOS/bulk: interconnect and contact electromigration and time-dependent dielectric breakdown; (4) development of MOSFET parameter extraction procedures for evaluating subthreshold characteristics; (5) evaluation of test chips and test strips on the second CRRES wafer run; (6) two dedicated fabrication runs for the CRRES chip flight parts; and (7) publication of two papers: one on the split-cross bridge resistor and another on asymmetrical SRAM (static random access memory) cells for single-event upset analysis.

Buehler, M. G.↗
DOE OSTI2023

Oddities in Lightning Measurements from Space Reveal Extreme Flashes and Thunderstorms [Slides]

Space-based sensors are well-suited for detecting intracloud (IC) and Cloud to Ground (CG) lightning over large swaths of the Earth. Current sensors also measure the signals generated by lightning that contain information about the physical discharge process and the radiative transfer effects they experience on their path to orbit. Long records of orbital lightning data reveal rare and exceptional lightning signals push the boundaries of what the sensors are designed to measure and our understanding of what lightning and thunderstorms are capable of. Space-based sensors have revealed long-horizontal “megaflashes,” highly radiant “superbolts,” extremely high flash rate thunderstorms, and more.

58 GEOSCIENCES↗
NASA NTRS1993

On-Chip p-MOSFET Dosimetry

On-chip p-FETs were developed to monitor the radiation dose of n-well CMOS ICs by monitoring threshold voltage shifts due to radiation induced oxide and interface charge.

FETs↗
DOE OSTI2024

FRMAC Laboratory Analysis Manual Volume 1, Revision 0

This manual is written for personnel who respond to a nuclear/radiological incident and will be called upon to provide support to ensure that samples receive appropriate laboratory analyses. Overall, this manual provides general guidance and some specific diagrams and forms. However, it is understood that site- and incident-specific operational decisions and procedures may need to be modified at the time of the incident. This manual is intended to provide guidance for laboratory analysis personnel without limiting FRMAC’s ability to integrate the work with other partners and stakeholders. Some of the titles of management positions with the FRMAC have been changed in order to comply with the structure of the Incident Command System (ICS) under the National Incident Management System (NIMS).

61 RADIATION PROTECTION AND DOSIMETRY↗
NASA NTRSDate not supplied

Progress Towards Prolonged Deployment of SiC JFET-R ICs Into Previously Inaccessible Hostile Environments

This invited presentation describes demonstration of semiconductor integrated circuits (ICs) and ceramic packaging that are arguably the most environmentally durable transistor electronics ever demonstrated. SiC junction field effect transistor-resistor (JFET-R) ICs with two-level interconnect have successfully operated for over 1 year in 500 °C air-ambient [1], 60 days in 460 °C and 9.3 MPa pressure caustic Venus surface environment test chamber [2], and radiation exposure through 7 Mrad(Si) total ionizing dose (TID) and 86 MeV-cm2/mg heavy ion strikes [3]. Furthermore, these ICs have also demonstrated operation from -190 °C to +812 °C (over 1000 °C T-span) without significant change in signal (input /output) or power supply voltages [4]. With modest adjustments, the SiC JFET-R fabrication process is compatible with semiconductor mass-production tools and materials. As an initial step towards this end, the processing that forms the SiC JFETs and resistors (without interconnect) for the NASA Glenn “Generation 12” design prototype JFET-R ICs was conducted at GE Research. Once the COVID-delayed IC interconnect and bond pad fabrication processing on these wafers is completed at NASA Glenn, the resulting chips will be packaged and oven-tested [5]. It is expected that further technology transfer to complete commercial production will lower investment and risk barriers to useful application deployment. For NASA, an initial high-value deployment is opening the Venus surface to extended missions for robotic scientific exploration.

Silicon Carbide↗
NASA NTRS1985

New quantum oscillations in current driven small junctions

The response of current-biased Josephson and normal tunnel junctions (JJs and NTJs) such as those fabricated by Voss and Webb (1981) is predicted from a quantum-mechanical description based on the observation that the response of a current-driven open system is equivalent to that of a closed system subject to an external time-dependent voltage bias. Phenomena expected include voltage oscillations with no dc voltage applied, inverse Shapiro steps of dc voltage in the presence of microwave radiation, voltage oscillation in a JJ and an NTJ coupled by a capacitance to a current-biased junction, JJ voltage oscillation frequency = I/e rather than I/2e, and different NTJ resistance than in the voltage-driven case. The effects require approximate experimental parameter values Ic = 15 nA, C = 1 fF, and T much less than 0.4 K for JJs and Ic = a few nA, C = 1 fF, and R = 3 kiloohms for 100-microV inverse Shapiro steps at 10 GHz in NTJs.

Ben-Jacob, E.↗
NASA NTRS1988

Linear response theory for annealing of radiation damage in semiconductor devices

A theoretical study of the radiation/annealing response of MOS ICs is described. Although many experiments have been performed in this field, no comprehensive theory dealing with radiation/annealing response has been proposed. Many attempts have been made to apply linear response theory, but no theoretical foundation has been presented. The linear response theory outlined here is capable of describing a broad area of radiation/annealing response phenomena in MOS ICs, in particular, both simultaneous irradiation and annealing, as well as short- and long-term annealing, including the case when annealing is nearing completion. For the first time, a simple procedure is devised to determine the response function from experimental radiation/annealing data. In addition, this procedure enables us to study the effect of variable temperature and dose rate, effects which are of interest in spaceflight. In the past, the shift in threshold potential due to radiation/annealing has usually been assumed to depend on one variable: the time lapse between an impulse dose and the time of observation. While such a suggestion of uniformity in time is certainly true for a broad range of radiation annealing phenomena, it may not hold for some ranges of the variables of interest (temperature, dose rate, etc.). A response function is projected which is dependent on two variables: the time of observation and the time of the impulse dose. This dependence on two variables allows us to extend the theory to the treatment of a variable dose rate. Finally, the linear theory is generalized to the case in which the response is nonlinear with impulse dose, but is proportional to some impulse function of dose. A method to determine both the impulse and response functions is presented.

Litovchenko, Vitaly↗
NASA NTRS2018

Goddard Modular SmallSat Architecture (GMSA) Adapter Board H-Bridge MOSEFT ICs Total Ionizing Dose Characterization Report

The purpose of this testing was to obtain total ionizing dose (TID) information about commercial off-the-shelf (COTS) n-channel and p-channel MOFETs that are being considered for use on the Goddard Modular SmallSat Architecture (GMSA) Adapter board in an H-Bridge circuit to drive magnetorquers. Testing took place at NASA Goddard Space Flight Center’s (GSFC) Radiation Effects Facility using the gamma source. Testing occurred from July 31st – August 1st, 2018.

total ionizing dose (TID)↗
NASA NTRS1991

Non-volatile, high density, high speed, Micromagnet-Hall effect Random Access Memory (MHRAM)

The micromagnetic Hall effect random access memory (MHRAM) has the potential of replacing ROMs, EPROMs, EEPROMs, and SRAMs because of its ability to achieve non-volatility, radiation hardness, high density, and fast access times, simultaneously. Information is stored magnetically in small magnetic elements (micromagnets), allowing unlimited data retention time, unlimited numbers of rewrite cycles, and inherent radiation hardness and SEU immunity, making the MHRAM suitable for ground based as well as spaceflight applications. The MHRAM device design is not affected by areal property fluctuations in the micromagnet, so high operating margins and high yield can be achieved in large scale integrated circuit (IC) fabrication. The MHRAM has short access times (less than 100 nsec). Write access time is short because on-chip transistors are used to gate current quickly, and magnetization reversal in the micromagnet can occur in a matter of a few nanoseconds. Read access time is short because the high electron mobility sensor (InAs or InSb) produces a large signal voltage in response to the fringing magnetic field from the micromagnet. High storage density is achieved since a unit cell consists only of two transistors and one micromagnet Hall effect element. By comparison, a DRAM unit cell has one transistor and one capacitor, and a SRAM unit cell has six transistors.

Wu, Jiin C.↗
NASA NTRS2008

Logic Gates Made of N-Channel JFETs and Epitaxial Resistors

Prototype logic gates made of n-channel junction field-effect transistors (JFETs) and epitaxial resistors have been demonstrated, with a view toward eventual implementation of digital logic devices and systems in silicon carbide (SiC) integrated circuits (ICs). This development is intended to exploit the inherent ability of SiC electronic devices to function at temperatures from 300 to somewhat above 500 C and withstand large doses of ionizing radiation. SiC-based digital logic devices and systems could enable operation of sensors and robots in nuclear reactors, in jet engines, near hydrothermal vents, and in other environments that are so hot or radioactive as to cause conventional silicon electronic devices to fail. At present, current needs for digital processing at high temperatures exceed SiC integrated circuit production capabilities, which do not allow for highly integrated circuits. Only single to small number component production of depletion mode n-channel JFETs and epitaxial resistors on a single substrate is possible. As a consequence, the fine matching of components is impossible, resulting in rather large direct-current parameter distributions within a group of transistors typically spanning multiples of 5 to 10. Add to this the lack of p-channel devices to complement the n-channel FETs, the lack of precise dropping diodes, and the lack of enhancement mode devices at these elevated temperatures and the use of conventional direct coupled and buffered direct coupled logic gate design techniques is impossible. The presented logic gate design is tolerant of device parameter distributions and is not hampered by the lack of complementary devices or dropping diodes. In addition to n-channel JFETs, these gates include level-shifting and load resistors (see figure). Instead of relying on precise matching of parameters among individual JFETS, these designs rely on choosing the values of these resistors and of supply potentials so as to make the circuits perform the desired functions throughout the ranges over which the parameters of the JFETs are distributed. The supply rails V(sub dd) and V(sub ss) and the resistors R are chosen as functions of the distribution of direct-current operating parameters of the group of transistors used.

Krasowski, Michael J.↗
NASA NTRS2015

Radiation-Hardened Electronics for Advanced Communications Systems

Novel approach enables high-speed special-purpose processors Advanced reconfigurable and reprogrammable communication systems will require sub-130-nanometer electronics. Legacy single event upset (SEU) radiation-tolerant circuits are ineffective at speeds greater than 125 megahertz. In Phase I of this project, ICs, LLC, demonstrated new base-level logic circuits that provide SEU immunity for sub-130-nanometer high-speed circuits. In Phase II, the company developed an innovative self-restoring logic (SRL) circuit and a system approach that provides high-speed, SEU-tolerant solutions that are effective for sub-130-nanometer electronics scalable to at least 22-nanometer processes. The SRL system can be used in the design of NASA's next-generation special-purpose processors, especially reconfigurable communication processors.

Whitaker, Sterling↗
DOE OSTI2020

Advanced CMOS Reliability Update: Sub 20nm FinFET Assessment

Advances in FinFET design and fabrication enable manufacturing of denser, more compact integrated circuits (ICs) with substantially reduced leakage while shortening the channel-lengths. The same stress-induced leakage and breakdown degradation mechanisms that affect planar transistors also impact FinFET devices. Reliability concerns such as Bias Temperature Instability (BTI), Time Dependent Dielectric Breakdown (TDDB), and Hot Carrier Injection (HCI) become very important with changes to transistor geometry and fin sidewall crystal orientation. Recent testing has shown that FinFETs respond differently to radiation (radiation effects such as total ionizing dose) when compared to planar transistors. These reliability and radiation effects issues become very important when changing transistor geometry and scaling FinFETs towards smaller feature sizes (22-nm, 16-nm, 14- nm, 10-nm, and smaller critical dimensions). The comparable 2019 state of the art transistor densities in current high-volume manufacturing silicon-based foundries is 7-nm (ISMC, Samsung) and 10-nm (Intel) [www.anandtech.com,fuse.wikichip.org]. Released products include supporting components for the cellphone and commercial microprocessor markets respectively. Extensive development in the foundry industry is driving to a 5-nm technology node in late 2020.

47 OTHER INSTRUMENTATION↗
DOE OSTI2020

Cyclone Fani: the tug-of-war between regional warming and anthropogenic aerosol effects

Before Cyclone Amphan took place in 2020, Cyclone Fani (May 2019) is the strongest pre-monsoon cyclone in the Bay of Bengal (BOB) since 1991, killing 90 people in eastern India and Bangladesh while causing US$1.81 billion of damages. Fani developed during a period of high concentration of anthropogenic aerosols in the BOB with abnormally high sea surface temperature (SST), thereby presenting an opportunity to understand the compound effects of atmospheric aerosols and regional climate warming on a tropical cyclone. A quantitative attribution analysis was conducted using the Weather Research and Forecasting model with chemistry (WRF-Chem) run at the convection-permitting (4 km) grid spacing, accompanied by an ensemble of coarser-resolution simulations to quantify the uncertainty. The removal of post-1990 trends in the tropospheric variables and SST from WRF-Chem's initial conditions (IC) and boundary conditions (BC, including the lateral and lower boundary conditions) resulted in a reduction of cyclone precipitation by about 51% during the 5 d of April 28-May 2. The removal of tropospheric warming shows approximately twice as strong an effect on Fani (39% reduction in precipitation) as that of SST warming (22% reduction). When aerosol's direct and indirect effects were removed from the simulations, i.e., no aerosol influence on radiation and cloud microphysics, Fani initially strengthened but later weakened, as measured by geopotential height and precipitation amounts. These results suggest that aerosol and its interaction with the atmosphere acted to mitigate the strengthening effect of anthropogenic warming on Fani, but was not strong enough to entirely counteract it. Although the ensemble of coarser simulations appears to overestimate Cyclone Fani in terms of precipitation, the direction of the effects is in agreement with that obtained from the 4 km simulations. Given the increasing anthropogenic aerosols in the BOB, future attribution studies using more sophisticated dynamical aerosol models on BOB tropical cyclones are urged.

54 ENVIRONMENTAL SCIENCES↗
NASA NTRS2018

Room Temperature Total-Ionizing Dose Testing of Glenn Research Center (GRC) 500 °C Durable 4H-SiC JFET IC Technology

The purpose of this testing was to obtain total ionizing dose (TID) information about custom-built research prototype silicon carbide (SiC) junction field effect transistor (JFET) integrated circuits (ICs) capable of prolonged operation in extremely high-temperature (500 degrees Centigrade) environments. The circuits included ring oscillators and operational amplifiers as well as individual n-channel JFETs. This technology is being considered for use in high temperature, high pressure applications such as Long-Lives Surface System Explorer (LLISSE). These devices were developed at NASA Glenn Research Center (GRC). Testing occurred from July 9th-July 13th, 2018.

Radiation↗
NASA NTRS1979

Radiation hardened PMOS process with ion implanted threshold adjust

By including specific process modifications the effect of ion implantation on radiation hardness can be minimized and radiation hard ion implanted MOS circuits can be fabricated. The experimental procedure followed was to examine key processing steps (with respect to radiation hardness) on ion-implanted individual PMOS transistors. The individual transistors were evaluated by continuously monitoring the threshold voltage as the transistors were being irradiated. By comparing runs it was possible to deduce what is considered a radiation hard ion implanted process. Tests with a complex LSI PMOS IC processor chip containing over 2000 transistors and resistors were also conducted

Jhabvala, M.↗
NASA NTRS2013

Charge Yield at Low Electric Fields: Considerations for Bipolar Integrated Circuits

A significant reduction in total dose damage is observed when bipolar integrated circuits are irradiated at low temperature. This can be partially explained by the Onsager theory of recombination, which predicts a strong temperature dependence for charge yield under low-field conditions. Reduced damage occurs for biased as well as unbiased devices because the weak fringing field in thick bipolar oxides only affects charge yield near the Si/SiO2 interface, a relatively small fraction of the total oxide thickness. Lowering the temperature of bipolar ICs - either continuously, or for time periods when they are exposed to high radiation levels - provides an additional degree of freedom to improve total dose performance of bipolar circuits, particularly in space applications.

ionizing radiation↗
NASA NTRS2011

Variable Depth Bragg Peak Method for Single Event Effects Testing

Traditionally, accelerator SEE testing is accomplished by removing the tops of packages so that the IC chips are accessible to heavy ions. However, ICs in some advanced packages cannot be de-lidded so a different approach is used that involves grinding and/or chemically etching away part of the package and the chip from the back side. The parts are then tested from the back side with ions having sufficient range to reach the sensitive volume. More recently, the entire silicon substrate in an SOI/SRAM was removed, making it possible to use low-energy ions with shorter ranges. Where removal of part of the package is not possible, facilities at Michigan State, NASA Space Radiation Laboratory, GANIL (France) and GSI (Germany) offer high-energy heavy ions with long ranges so that the ions can reach the devices' sensitive volumes without much change in the LET. Unfortunately, a run will typically involve only one ion species having a single energy and LET due to the long time it takes to tune a new energy. The Variable Depth Bragg Peak (VDBP) method is similar to the above method in that it involves the use of high-energy heavy ions that are able to pass through the packaging material and reach the device, obviating the need to remove the package. However, the method provides a broad range of LETs from a single ion by inserting degraders in the beam that modify the ion energy and, therefore, the LET. The crux of the method involves establishing a fiduciary point for degrader thickness, i.e., where the Bragg peak is located precisely at the sensitive volume in the device, for which the measured SEU cross-section and the ion LET are both also maxima and can be calculated using a Monte-Carlo program, TRIM. Once the fiduciary point has been established, calibrated high density polyethylene (HDPE) degraders are inserted into or removed from the beam to vary the ion LET at the device in a known manner. After each change of degrader thickness, the SEU cross-section is measured and the corresponding LET calculated from the change in degrader thickness. That information is used to generate a plot of cross-section as a function of ion LET. The advantages of this approach are that the part does not have to be de-lidded and a broad range of LETs is available from a single heavy ion without having to go to non-normal angles of incidence to change the "effective" LET. As we will show, it is possible to obtain an entire curve of cross-section versus LET using just two or three ions. Fig. 1 shows curves of cross-section vs LET for a Freescale 4 Mbit SOI/SRAM measured at the 88" Cyclotron at Berkeley and at NSRL. The open symbols are the data obtained from Berkeley for top-side and back-side irradiation. The solid data points are for the data obtained at NSRL using a device for which the package was intact. The data are for Iron and Gold and cover a range of LETs from 4 MeV.cm2/mg to 84 MeV.cm2/mg. The agreement between the data obtained from Berkeley and from NSRL is excellent, demonstrating that the VDBP method is capable of providing accurate values of cross-section versus LET, at least for the 4 Mbit SRAM. Details of the technique will be included in the final presentation.

Buchner, S.↗
NASA NTRS2008

Modeling the Diffuse Cloud-Top Optical Emissions from Ground and Cloud Flashes

A number of studies have indicated that the diffuse cloud-top optical emissions from intra-cloud (IC) lightning are brighter than that from normal negative cloud-to-ground (CG) lightning, and hence would be easier to detect from a space-based sensor. The primary reason provided to substantiate this claim has been that the IC is at a higher altitude within the cloud and therefore is less obscured by the cloud multiple scattering medium. CGs at lower altitudes embedded deep within the cloud are more obscured, so CG detection is thought to be more difficult. However, other authors claim that because the CG source current (and hence luminosity) is typically substantially larger than IC currents, the greater CG source luminosity is large enough to overcome the effects of multiple scattering. These investigators suggest that the diffuse cloud top emissions from CGs are brighter than from ICs, and hence are easier to detect from space. Still other investigators claim that the detection efficiency of CGs and ICs is about the same because modern detector sensitivity is good enough to "see" either flash type no matter which produces a brighter cloud top emission. To better assess which of these opinions should be accepted, we introduce an extension of a Boltzmann lightning radiative transfer model previously developed. It considers characteristics of the cloud (geometry, dimensions, scattering properties) and specific lightning channel properties (length, geometry, location, current, optical wave front propagation speed/direction). As such, it represents the most detailed modeling effort to date. At least in the few cases studied thus far, it was found that IC flashes appear brighter at cloud top than the lower altitude negative ground flashes, but additional model runs are to be examined before finalizing our general conclusions.

Solakiewicz, Richard↗