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At least 37 records · Page 2
All sourcesNASA NTRSDOE OSTI
NASA NTRS1993

Bridging faults in BiCMOS circuits

Combining the advantages of CMOS and bipolar, BiCMOS is emerging as a major technology for many high performance digital and mixed signal applications. Recent investigations revealed that bridging faults can be a major failure mode in IC's. Effects of bridging faults in BiCMOS circuits are presented. Bridging faults between logical units without feedback and logical units with feedback are considered. Several bridging faults can be detected by monitoring the power supply current (I(sub DDQ) monitoring). Effects of bridging faults and bridging resistance on output logic levels were examined along with their effects on noise immunity.

Menon, Sankaran M.↗
NASA NTRS2008

Sixty-four-Channel Inline Cable Tester

Faults in wiring are a serious concern for the aerospace and aeronautics (commercial, military, and civil) industries. A number of accidents have occurred because faulty wiring created shorts or opens that resulted in the loss of control of the aircraft or because arcing led to fires and explosions. Some of these accidents have resulted in the massive loss of lives (such as in the TWA Flight 800 accident). Circuits on the Space Shuttle have also failed because of faulty insulation on wiring. STS-93 lost power when a primary power circuit in one engine failed and a second engine had a backup power circuit fault. Cables are usually tested on the ground after the crew reports a fault encountered during flight. Often such failures result from vibration and cannot be replicated while the aircraft is stationary. It is therefore important to monitor faults while the aircraft is in operation, when cables are more likely to fail. Work is in progress to develop a cable fault tester capable of monitoring up to 64 individual wires simultaneously. Faults can be monitored either inline or offline. In the inline mode of operation, the monitoring is performed without disturbing the normal operation of the wires under test. That is, the operations are performed unintrusively and are essentially undetectable for the test signal levels are below the noise floor. A cable can be monitored several times per second in the offline mode and once a second in the inline mode. The 64-channel inline cable tester not only detects the occurrence of a fault, but also determines the type of fault (short/open) and the location of the fault. This will enable the detection of intermittent faults that can be repaired before they become serious problems.

Source record↗
NASA NTRS1980

Base drive for paralleled inverter systems

In a paralleled inverter system, a positive feedback current derived from the total current from all of the modules of the inverter system is applied to the base drive of each of the power transistors of all modules, thereby to provide all modules protection against open or short circuit faults occurring in any of the modules, and force equal current sharing among the modules during turn on of the power transistors.

Nagano, S.↗
NASA NTRS1991

Precise time and time interval applications to electric power systems

There are many applications of precise time and time interval (frequency) in operating modern electric power systems. Many generators and customer loads are operated in parallel. The reliable transfer of electrical power to the consumer partly depends on measuring power system frequency consistently in many locations. The internal oscillators in the widely dispersed frequency measuring units must be syntonized. Elaborate protection and control systems guard the high voltage equipment from short and open circuits. For the highest reliability of electric service, engineers need to study all control system operations. Precise timekeeping networks aid in the analysis of power system operations by synchronizing the clocks on recording instruments. Utility engineers want to reproduce events that caused loss of service to customers. Precise timekeeping networks can synchronize protective relay test-sets. For dependable electrical service, all generators and large motors must remain close to speed synchronism. The stable response of a power system to perturbations is critical to continuity of electrical service. Research shows that measurement of the power system state vector can aid in the monitoring and control of system stability. If power system operators know that a lightning storm is approaching a critical transmission line or transformer, they can modify operating strategies. Knowledge of the location of a short circuit fault can speed the re-energizing of a transmission line. One fault location technique requires clocks synchronized to one microsecond. Current research seeks to find out if one microsecond timekeeping can aid and improve power system control and operation.

Robert E. Wilson↗
NASA NTRS2002

Fail-Safe Operation of a High-Temperature Magnetic Bearing Investigated for Gas Turbine Engine Applications

The Structural Mechanics and Dynamics Branch at the NASA Glenn Research Center has developed a three-axis high-temperature magnetic bearing suspension rig to enhance the safety of the bearing system up to 1000 F. This test rig can accommodate thrust and radial bearings up to a 22.84 cm (9 in.) diameter with a maximum axial loading of 22.25 kN (5000 lb) and a maximum radial loading up to 4.45 kN (1000 lb). The test facility was set up to test magnetic bearings under high-temperature (1100 F) and high-speed (20,000 rpm) conditions. The magnetic bearing is located at the center of gravity of the rotor between two high-temperature grease-packed mechanical ball bearings. The drive-end duplex angular contact ball bearing, which is in full contact, acts as a moment release and provides axial stability. The outboard end ball bearing has a 0.015-in. radial clearance between the rotor to act as a backup bearing and to compensate for axial thermal expansion. There is a 0.020-in. radial air gap between the stator pole and the rotor. The stator was wrapped with three 1-kW band heaters to create a localized hot section; the mechanical ball bearings were outside this section. Eight threaded rods supported the stator. These incorporated a plunger and Bellville washers to compensate for radial thermal expansion and provide rotor-to-stator alignment. The stator was instrumented with thermocouples and a current sensor for each coil. Eight air-cooled position sensors were mounted outside the hot section to monitor the rotor. Another sensor monitored this rotation of the outboard backup bearing. Ground fault circuit interrupts were incorporated into all power amplifier loops for personnel safety. All instrumentation was monitored and recorded on a LabView-based data acquisition system. Currently, this 12-pole heteropolar magnetic bearing has 13 thermal cycles and over 26 hr of operation at 1000 F.

Choi, Benjamin B.↗
NASA NTRS2013

NASA Tech Briefs, January 2013

Topics include: Single-Photon-Sensitive HgCdTe Avalanche Photodiode Detector; Surface-Enhanced Raman Scattering Using Silica Whispering-Gallery Mode Resonators; 3D Hail Size Distribution Interpolation/Extrapolation Algorithm; Color-Changing Sensors for Detecting the Presence of Hypergolic Fuels; Artificial Intelligence Software for Assessing Postural Stability; Transformers: Shape-Changing Space Systems Built with Robotic Textiles; Fibrillar Adhesive for Climbing Robots; Using Pre-Melted Phase Change Material to Keep Payloads in Space Warm for Hours without Power; Development of a Centrifugal Technique for the Microbial Bioburden Analysis of Freon (CFC-11); Microwave Sinterator Freeform Additive Construction System (MS-FACS); DSP/FPGA Design for a High-Speed Programmable S-Band Space Transceiver; On-Chip Power-Combining for High-Power Schottky Diode-Based Frequency Multipliers; FPGA Vision Data Architecture; Memory Circuit Fault Simulator; Ultra-Compact Transputer-Based Controller for High-Level, Multi-Axis Coordination; Regolith Advanced Surface Systems Operations Robot Excavator; Magnetically Actuated Seal; Hybrid Electrostatic/Flextensional Mirror for Lightweight, Large-Aperture, and Cryogenic Space Telescopes; System for Contributing and Discovering Derived Mission and Science Data; Remote Viewer for Maritime Robotics Software; Stackfile Database; Reachability Maps for In Situ Operations; JPL Space Telecommunications Radio System Operating Environment; RFI-SIM: RFI Simulation Package; ION Configuration Editor; Dtest Testing Software; IMPaCT - Integration of Missions, Programs, and Core Technologies; Integrated Systems Health Management (ISHM) Toolkit; Wind-Driven Wireless Networked System of Mobile Sensors for Mars Exploration; In Situ Solid Particle Generator; Analysis of the Effects of Streamwise Lift Distribution on Sonic Boom Signature; Rad-Tolerant, Thermally Stable, High-Speed Fiber-Optic Network for Harsh Environments; Towed Subsurface Optical Communications Buoy; High-Collection-Efficiency Fluorescence Detection Cell; Ultra-Compact, Superconducting Spectrometer-on-a-Chip at Submillimeter Wavelengths; UV Resonant Raman Spectrometer with Multi-Line Laser Excitation; Medicine Delivery Device with Integrated Sterilization and Detection; Ionospheric Simulation System for Satellite Observations and Global Assimilative Model Experiments - ISOGAME; Airborne Tomographic Swath Ice Sounding Processing System; flexplan: Mission Planning System for the Lunar Reconnaissance Orbiter; Estimating Torque Imparted on Spacecraft Using Telemetry; PowderSim: Lagrangian Discrete and Mesh-Free Continuum Simulation Code for Cohesive Soils; Multiple-Frame Detection of Subpixel Targets in Thermal Image Sequences; Metric Learning to Enhance Hyperspectral Image Segmentation; Basic Operational Robotics Instructional System; Sheet Membrane Spacesuit Water Membrane Evaporator; Advanced Materials and Manufacturing for Low-Cost, High-Performance Liquid Rocket Combustion Chambers; Motor Qualification for Long-Duration Mars Missions.

Source record↗
NASA NTRS1984

Finding Open Faults In CMOS Circuits

Algorithm specifies sequence of input test signals and interpretation of resulting output signals for identifying stuck-open faults in complementary metal-oxide semiconductor (CMOS) integrated logic circuits. Incorporated in software for online production testing of CMOS circuits.

Chandramouli, R.↗
NASA NTRS1992

A verified design of a fault-tolerant clock synchronization circuit: Preliminary investigations

Schneider demonstrates that many fault tolerant clock synchronization algorithms can be represented as refinements of a single proven correct paradigm. Shankar provides mechanical proof that Schneider's schema achieves Byzantine fault tolerant clock synchronization provided that 11 constraints are satisfied. Some of the constraints are assumptions about physical properties of the system and cannot be established formally. Proofs are given that the fault tolerant midpoint convergence function satisfies three of the constraints. A hardware design is presented, implementing the fault tolerant midpoint function, which is shown to satisfy the remaining constraints. The synchronization circuit will recover completely from transient faults provided the maximum fault assumption is not violated. The initialization protocol for the circuit also provides a recovery mechanism from total system failure caused by correlated transient faults.

Miner, Paul S.↗
NASA NTRS1991

Fault tolerant sequential circuits using sequence invariant state machines

The idea of introducing redundancy to improve the reliability of digital systems originates from papers published in the 1950's. Since then, redundancy has been recognized as a realistic means for constructing reliable systems. A method using redundancy to reconfigure the Sequency Invariant State Machine (SISM) to achieve fault tolerance is introduced. This new architecture is most useful in space applications, where recovery rather than replacement of faulty modules is the only means of maintenance.

Alahmad, M.↗
NASA NTRS1985

Complementary-Logic Fault Detector

Circuit for checking two-line complementary-logic bits for single faults used as building block for self-checking memory interface for Hammingcoded data. Intended for such applications as fault-tolerant computing, data handling, and data transmission. Circuit performs exclusive-OR function. Many such circuits combined produce complete memory interface with both detection and correction abilities.

Wawrzynek, J. C.↗
NASA NTRS1992

Detection of feed-through faults in CMOS storage elements

In testing sequential circuits, internal faults in the storage elements (SE's) are sometimes modeled as stuck-at faults in the combinational circuits surrounding the SE. The detection of some transistor-level faults that cannot be modeled as stuck-at are considered. These feed-through faults cause the cell to become either data-feed-through, which makes the cell combinational, or clock-feed-through, which causes the clock signal or its complement to appear at the output. Under such faults, the cell does not function as a memory element. Here it is shown that such faults may or may not be detected depending on delays involved. Conditions under which race-ahead occurs are identified.

Al-Assadi, Waleed K.↗
NASA NTRS1982

On testing stuck-open faults in CMOS combinational circuits

Recently it has been found that a class of failure related to a particular technology (CMOS) cannot be modelled as the conventional stuck-at fault model. These failures change the combinational behavior of CMOS logic gates into a sequential one. Such a failure is modelled as a fault, called the Stuck-Open fault (SOP). The object of this paper is to develop a procedure to detect single SOPs in combinational circuits. It is shown, that in general, tests generated for stuck-at faults when applied in a particular sequence will detect all single SOP faults. In case of single redundancy in the network, the SOP fault on the redundant line cannot be detected. When there is reconvergent fan-out in the network, there is a one-one correspondence between the conditions for stuck-at fault and stuck-open fault detectability.

Chandramouli, R.↗
NASA NTRS1975

Testability enhancement in digital system design

A new way of employing hardware redundancy to reduce the number of tests for fault detection in both combinational and synchronous sequential circuits is investigated. An approach is presented for utilizing systematic redundancy to simplify design work. Models for PLM (programmable logic module) and CMM (controllable memory module) are depicted. Systematic design and detection procedures are described. Using these procedures, an easily testable circuit (for stuck faults) can be designed. In contrast to the earlier results on fault detection in logic circuit, two tests are needed to detect any stuck faults of combinational logic circuit. Four tests are necessary and sufficient to detect any stuck faults of elementary logic gates and the malfunction of flip-flops of synchronous sequential circuit using Delay flip-flops or trigger flip-flops.

Chuang, C. S.↗
NASA NTRS1989

Closure of the Africa-Eurasia-North America plate motion circuit and tectonics of the Gloria fault

The current motions of the African, Eurasian, and North American plates are examined. The problems addressed include whether there is resolvable motion of a Spitsbergen microplate, the direction of motion between the African and North American plates, whether the Gloria fault is an active transform fault, and the implications of plate circuit closures for rates of intraplate deformation. Marine geophysical data and magnetic profiles are used to construct a model which predicts about 4 mm/yr slip across the Azores-Gibraltar Ridge, and west-northwest convergence near Gibraltar. The analyzed data are consistent with a rigid plate model with the Gloria fault being a transform fault.

Argus, Donald F.↗
NASA NTRS2011

Impulse Testing of Corporate-Fed Patch Array Antennas

This paper discusses a novel method for detecting faults in antenna arrays. The method, termed Impulse Testing, was developed for corporate-fed patch arrays where the element is fed by a probe and is shorted at its center. Impulse Testing was devised to supplement conventional microwave measurements in order to quickly verify antenna integrity. The technique relies on exciting each antenna element in turn with a fast pulse (or impulse) that propagates through the feed network to the output port of the antenna. The resulting impulse response is characteristic of the path through the feed network. Using an oscilloscope, a simple amplitude measurement can be made to detect faults. A circuit model of the antenna elements and feed network was constructed to assess various fault scenarios and determine fault-detection thresholds. The experimental setup and impulse measurements for two patch array antennas are presented. Advantages and limitations of the technique are discussed along with applications to other antenna array topologies

antenna array↗
NASA NTRS1995

Electrical short circuit and current overload tests on aircraft wiring

The findings of electrical short circuit and current overload tests performed on commercial aircraft wiring are presented. A series of bench-scale tests were conducted to evaluate circuit breaker response to overcurrent and to determine if the wire showed any visible signs of thermal degradation due to overcurrent. Three types of wire used in commercial aircraft were evaluated: MIL-W-22759/34 (150 C rated), MIL-W-81381/12 (200 C rated), and BMS 1360 (260 C rated). A second series of tests evaluated circuit breaker response to short circuits and ticking faults. These tests were also meant to determine if the three test wires behaved differently under these conditions and if a short circuit or ticking fault could start a fire. It is concluded that circuit breakers provided reliable overcurrent protection. Circuit breakers may not protect wire from ticking faults but can protect wire from direct shorts. These tests indicated that the appearance of a wire subjected to a current that totally degrades the insulation looks identical to a wire subjected to a fire; however the 'fire exposed' conductor was more brittle than the conductor degraded by overcurrent. Preliminary testing indicates that direct short circuits are not likely to start a fire. Preliminary testing indicated that direct short circuits do not erode insulation and conductor to the extent that ticking faults did. Circuit breakers may not safeguard against the ignition of flammable materials by ticking faults. The flammability of materials near ticking faults is far more important than the rating of the wire insulation material.

Cahill, Patricia↗