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At least 37 records · Page 2

Photoelectrochemical etching of silicon carbide (SiC) and its characterization

Silicon carbide (SiC) is an attractive semiconductor material for high speed, high density, and high temperature device applications due to its wide bandgap (2.2-3.2 eV), high thermal conductivity, and high breakdown electric field (4 x 10(exp 6) V/cm). An instrumental process in the fabrication of semiconductor devices is the ability to etch in a highly controlled and selective manner for direct patterning techniques. A novel technique in etching using electrochemistry is described. This procedure involves the ultraviolet (UV) lamp-assisted photoelectrochemical etching of n-type 3C- and 6H-SiC to enhance the processing capability of device structures in SiC. While under UV illumination, the samples are anodically biased in an HF based aqueous solution since SiC has photoconductive properties. In order for this method to be effective, the UV light must be able to enhance the production of holes in the SiC during the etching process thus providing larger currents with light from the photocurrents generated than those currents with no light. Otherwise dark methods would be used as in the case of p-type 3C-SiC. Experiments have shown that the I/V characteristics of the SiC-electrolyte interface reveal a minimum etch voltage of 3 V and 4 V for n- and p-type 3C-SiC, respectively. Hence it is possible for etch-stops to occur. Etch rates calculated have been as high as 0.67 micrometer/min for p-type, 1.4 micrometer/min for n-type, and 1.1 micrometer/min for pn layer. On n-type 3C- SiC, an oxide formation is present where after etching a yellowish layer corresponds to a low Si/C ratio and a white layer corresponds to a high Si/C ratio. P-type 3C-SiC shows a grayish layer. Additionally, n-type 6H-SiC shows a brown layer with a minimum etch voltage of 3 V.

Collins, D. M.

Better Ohmic Contacts For InP Semiconductor Devices

Four design modifications enable fabrication of improved ohmic contacts on InP-based semiconductor devices. First modification consists of insertion of layer of gold phosphide between n-doped InP and metal or other overlayer of contact material. Second, includes first modification plus use of particular metal overlayer to achieve very low contact resistivities. Third, also involves deposition of Au(2)P(3) interlayer; in addition, refractory metal (W or Ta) deposited to form contact overlayer. In fourth, contact layer of Auln alloy deposited directly on InP. Improved contacts exhibit low electrical resistances and fabricated without exposing devices to destructive predeposition or postdeposition treatments.

Weizer, Victor G.

Monolithic AlScN/SiC phononic waveguides for scalable acoustoelectric and quantum devices

Unlike conventional surface acoustic wave devices, phononic waveguide systems enable higher circuit density and stronger strain and piezoelectric fields, making them promising for advanced acoustoelectric and quantum applications. One such material system for generating and guiding phonons at gigahertz frequencies is AlScN on SiC, which can be synthesized by sputter depositing AlScN directly onto SiC wafers. The AlScN on the SiC platform allows for tightly vertically-confined acoustic modes with high electromechanical coupling, high speed of sound, and simple fabrication of strip and rib waveguides. Until now, this system has only been studied as a slab waveguide platform, i.e., without any lateral waveguiding. Here, we demonstrate a two-dimensionally confined phononic architecture in AlScN on SiC that supports guided modes at 2.95 and 4.05 GHz. These modes exhibit strong electromechanical coupling coefficients (k 2 = 4.27%) and propagation losses on the order of 10 dB/mm. Furthermore, this architecture is well-suited for phononic routing and power-efficient active or nonlinear devices such as amplifiers, mixers, and oscillators, and is compatible with the integration of quantum systems, including vacancy centers, charge carriers, photons, and spins, either embedded in SiC or heterogeneously integrated on the surface.

Electrical components

Direct integration of atomic precision advanced manufacturing into middle-of-line silicon fabrication

Atomic precision advanced manufacturing (APAM) dopes silicon with enough carriers to change its electronic structure and can be used to create novel devices by defining metallic regions whose boundaries have single-atom abruptness. Incompatibility with the thermal and lithography process requirements for gated silicon transistor manufacturing have inhibited exploration of both how APAM can enhance CMOS performance and how transistor manufacturing steps can accelerate the discovery of new APAM device concepts. In this work, we introduce an APAM process that enables direct integration into the middle of a transistor manufacturing workflow. We show that a process that combines sputtering and annealing with a hardmask preserves a defining characteristic of APAM, a doping density far in excess of the solid solubility limit, while trading another, the atomic precision, for compatibility with manufacturing. The electrical characteristics of a chip combining a transistor with an APAM resistor show that the APAM module has only affected the transistor through the addition of a resistance and not by altering the transistor. This proof-of-concept demonstration also outlines the requirements and limitations of a unified APAM tool, which could be introduced into manufacturing environments, greatly expanding access to this technology and inspiring a new generation of devices with it.

Chemical vapor deposition

Monolithic optoelectronic circuit design for on-chip terahertz applications

We demonstrate a monolithic coplanar stripline platform for on-chip terahertz (THz) generation, transmission, and detection, addressing key challenges of mode purity, bandwidth, and referencing. Capacitive coupling of the photoconductive generator switch enforces pure odd-mode propagation, increases THz field strength, and extends the operational frequency range, achieving 0.05–1.4 THz. Our architecture enables fully monolithic fabrication with amorphous silicon switches, in situ field referencing, and galvanic isolation between generation and detection. Finite-element simulations and experiments confirm that suppressing parasitic modes improves signal integrity, providing a robust platform for high-fidelity THz spectroscopy, ultrafast electronics, and nanoscale quantum materials research.

Capacitive coupling

The role of the dopant in the electronic structure of erbium-doped TiO 2 for quantum emitters

Erbium-doped TiO 2 materials are promising candidates for advancing quantum technologies, necessitating a thorough understanding of their electronic and crystal structures to tailor their properties and enhance coherence times. This study explored epitaxial erbium-doped rutile TiO 2 films deposited on r-sapphire substrates using molecular beam epitaxy. Photoluminescence excitation spectroscopy demonstrated decreasing photoluminescence lifetimes with erbium doping, indicating limited optical coherence times. Lattice distortions associated with Er 3+ were probed by x-ray absorption spectroscopy, indicating that erbium primarily occupies Ti 4+ sites and influences oxygen vacancies. Significant lattice distortions in the higher-order shells and apparent full coordination around erbium suggest that additional defects are likely prevalent in these regions. These findings indicate that defects contribute to limited coherence times by introducing alternative decay pathways, leading to shorter photoluminescence lifetimes.

Crystallographic defects

Evidence for Ga clusters in β-Ga 2 O 3 from Raman spectroscopy and density functional theory

Monoclinic gallium oxide (β-Ga 2 O 3 ) single crystals have a Raman mode at ∼250 cm −1 that is strongly correlated with free-electron density. Prior work attributed this peak to an electronic excitation of a shallow donor impurity band. However, heavily n-type thin films grown by metalorganic chemical vapor deposition or molecular beam epitaxy do not have the peak. In the present work, an alternate model is proposed: the 250 cm −1 Raman peak arises from Ga clusters, defined as two or more Ga atoms that form Ga–Ga bonds. Raman mapping reveals variations in the frequency that are consistent with a distribution of cluster sizes. The intensity of the peak decreases as the temperature is raised, attributed to melting of the Ga clusters. First-principles calculations indicate that the 250 cm −1 mode is due to Ga–Ga bond-stretching vibrations. As the Fermi energy is raised, the formation of Ga–Ga dimers becomes energetically favorable, explaining the correlation between n-type conductivity and the appearance of the Raman peak.

36 MATERIALS SCIENCE

CdSeTe solar-cell performance with different dopant types

Four doping conditions were explored for CdTe-based solar cells: p-type As and P, n-type Al, and no intentional doping. In each case, the CdTe absorber was alloyed with Se, but only near the normal front-side, light entry for the cells, while the dopants were added from the back. Cells with p-dopants showed efficiencies up to 20% with front-side illumination, but the n-doped and undoped ones were close to zero. With back-side illumination, this was reversed with undoped up to 8% and p-doped ones only about 2%. These results are explained by Kelvin-probe measurements of electric-field profiles, which showed that the diode field was near the front for the higher-efficiency p-doping, but near the back for undoped and n-doped.

14 SOLAR ENERGY

Low-temperature etching of silicon oxide and silicon nitride with hydrogen fluoride

Etching of high aspect ratio features into alternating SiO 2 and SiN layers is an enabling technology for the manufacturing of 3D NAND flash memories. In this paper, we study a low-temperature or cryo plasma etch process, which utilizes HF gas together with other gas additives. Compared with a low-temperature process that uses separate fluorine and hydrogen gases, the etching rate of the SiO 2 /SiN stack doubles. Both materials etch faster with this so-called second generation cryo etch process. Pure HF plasma enhances the SiN etching rate, while SiO 2 requires an additional fluorine source such as PF 3 to etch meaningfully. Further, the insertion of H 2 O plasma steps into the second generation cryo etch process boosts the SiN etching rate by a factor of 2.4, while SiO 2 etches only 1.3 times faster. We observe a rate enhancing effect of H 2 O coadsorption in thermal etching experiments of SiN with HF. Ammonium fluorosilicate (AFS) plays a salient role in etching of SiN with HF with and without plasma. AFS appears weakened in the presence of H 2 O. Density functional theory calculations confirm the reduction of the bonding energy when NH 4 F in AFS is replaced by H 2 O.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH

Effects of ultrathin oxides in conducting MIS structures on GaAs

Schottky barrier-type GaAs baseline devices (semiconductor surface etched and then immediately metalized) and GaAs conducting metal oxide-semiconductor devices are fabricated and characterized. The baseline surfaces (no purposeful oxide) are prepared by a basic or an acidic etch, while the surface for the MIS devices are prepared by oxidizing after the etch step. The metallizations used are thin-film Au, Ag, Pd, and Al. It is shown that the introduction of purposeful oxide into these Schottky barrier-type structures examined on n-type GaAs modifies the barrier formation, and that thin interfacial layers can modify barrier formation through trapping and perhaps chemical reactions. For Au- and Pd-devices, enhanced photovoltaic performance of the MIS configuration is due to increased barrier height.

Childs, R. B.

Vapor phase growth technique of III-V compounds utilizing a preheating step

In the vapor phase epitaxy fabrication of semiconductor devices and in particular semiconductor lasers, the deposition body on which a particular layer of the laser is to be grown is preheated to a temperature about 40.degree. to 60.degree. C. lower than the temperature at which deposition occurs. It has been discovered that by preheating at this lower temperature there is reduced thermal decomposition at the deposition surface, especially for semiconductor materials such as indium gallium phosphide and gallium arsenide phosphide. A reduction in thermal decomposition reduces imperfections in the deposition body in the vicinity of the deposition surface, thereby providing a device with higher efficiency and longer lifetime.

Olsen, Gregory Hammond

Method for fabricating an interconnected array of semiconductor devices

A method of forming an array of interconnected solar cells. A flexible substrate carrying semiconductor and conductive layers is divided into individual devices by slitting the substrate along the web length. The individual devices are then connected with one another in series by laminating the substrate onto an insulating backing and by depositing conducting interconnection layers which join the lower conductor of one device with the top conductor of the adjoining device.

Grimmer, Derrick P.

Linear Actuator Has Long Stroke and High Resolution

The term precision linear actuator, direct drive ( PLADD ) refers to a robust linear actuator designed to be capable of repeatedly performing, over a lifetime of the order of 5 to 10 years, positioning maneuvers that include, variously, submicron increments or slews of the order of a centimeter. The PLADD is capable of both long stroke (120 mm) and high resolution (repeatable increments of 20 nm). Unlike precise linear actuators of prior design, the PLADD contains no gears, levers, or hydraulic converters. The PLADD, now at the prototype stage of development, is intended for original use as a coarse-positioning actuator in a spaceborne interferometer. The PLADD could also be adapted to terrestrial applications in which there are requirements for long stroke and high resolution: potential applications include medical imaging and fabrication of semiconductor devices. The PLADD (see figure) includes a commercially available ball-screw actuator driven directly by a commercially available three-phase brushless DC motor. The ball-screw actuator comprises a spring-preloaded ball nut on a ball screw that is restrained against rotation as described below. The motor is coupled directly (that is, without an intervening gear train) to a drive link that, in turn, is coupled to the ball nut. By eliminating the gear train, the direct-drive design eliminates the complexity, backlash, and potential for misalignment associated with a gear train. To prevent inadvertent movement, there is a brake that includes flexured levers compressed against the drive link by preload springs. This is a power-off brake: There are also piezoelectric stacks that can be activated to oppose the springs and push the levers away from the drive link. Hence, power must be applied to the piezoelectric stacks to release the drive link from braking. To help ensure long operational life, all of the mechanical drive components are immersed in an oil bath within hermetically sealed bellows. The outer end of the bellows holds the outer end of the ball screw, thereby preventing rotation of the ball screw. Positioning is controlled by an electronic control system that includes digital and analog subsystems that interact with the motor and brake and with two sensor/encoder units: a Hall-effect-sensor rotation encoder and a linear glass-scale encoder. This system implements a proportional + integral + derivative control algorithm that results in variation of voltage commands to each of the three pairs of windings of the brushless DC motor. In one of two alternative control modes, the voltages are applied to the windings in a trapezoidal commutation scheme on the basis of timing signals obtained from the Hall-effect sensors; this scheme yields relatively coarse positioning - 24 steps per motor revolution. The second control mode involves a sinusoidal commutation scheme in which the output of the linear glass-scale encoder is transposed to rotational increments to yield much finer position feedback - more than 400,000 steps per revolution.

Cook, Brant T.

NASA Tech Briefs, July 2009

Topics covered include: Dual Cryogenic Capacitive Density Sensor; Hail Monitor Sensor; Miniature Six-Axis Load Sensor for Robotic Fingertip; Improved Blackbody Temperature Sensors for a Vacuum Furnace; Wrap-Around Out-the-Window Sensor Fusion System; Wide-Range Temperature Sensors with High-Level Pulse Train Output; Terminal Descent Sensor Simulation; A Robust Mechanical Sensing System for Unmanned Sea Surface Vehicles; Additive for Low-Temperature Operation of Li-(CF)n Cells; Li/CFx Cells Optimized for Low-Temperature Operation; Number Codes Readable by Magnetic-Field-Response Recorders; Determining Locations by Use of Networks of Passive Beacons; Superconducting Hot-Electron Submillimeter-Wave Detector; Large-Aperture Membrane Active Phased-Array Antennas; Optical Injection Locking of a VCSEL in an OEO; Measuring Multiple Resistances Using Single-Point Excitation; Improved-Bandwidth Transimpedance Amplifier; Inter-Symbol Guard Time for Synchronizing Optical PPM; Novel Materials Containing Single-Wall Carbon Nanotubes Wrapped in Polymer Molecules; Light-Curing Adhesive Repair Tapes; Thin-Film Solid Oxide Fuel Cells; Zinc Alloys for the Fabrication of Semiconductor Devices; Small, Lightweight, Collapsible Glove Box; Radial Halbach Magnetic Bearings; Aerial Deployment and Inflation System for Mars Helium Balloons; Steel Primer Chamber Assemblies for Dual Initiated Pyrovalves; Voice Coil Percussive Mechanism Concept for Hammer Drill; Inherently Ducted Propfans and Bi-Props; Silicon Nanowire Growth at Chosen Positions and Orientations; Detecting Airborne Mercury by Use of Gold Nanowires; Detecting Airborne Mercury by Use of Palladium Chloride; Micro Electron MicroProbe and Sample Analyzer; Nanowire Electron Scattering Spectroscopy; Electron-Spin Filters Would Offer Spin Polarization Greater than 1; Subcritical-Water Extraction of Organics from Solid Matrices; A Model for Predicting Thermoelectric Properties of Bi2Te3; Integrated Miniature Arrays of Optical Biomolecule Detectors; A Software Rejuvenation Framework for Distributed Computing; Kurtosis Approach to Solution of a Nonlinear ICA Problem; Robust Software Architecture for Robots; R4SA for Controlling Robots; Bio-Inspired Neural Model for Learning Dynamic Models; Evolutionary Computing Methods for Spectral Retrieval; Monitoring Disasters by Use of Instrumented Robotic Aircraft; Complexity for Survival of Living Systems; Using Drained Spacecraft Propellant Tanks for Habitation; Connecting Node; and Electrolytes for Low-Temperature Operation of Li-CFx Cells.

Source record

Method of fabricating germanium and gallium arsenide devices

A method of semiconductor diode fabrication is disclosed which relies on the epitaxial growth of a precisely doped thickness layer of gallium arsenide or germanium on a semi-insulating or intrinsic substrate, respectively, of gallium arsenide or germanium by either molecular beam epitaxy (MBE) or by metal-organic chemical vapor deposition (MOCVD). The method involves: depositing a layer of doped or undoped silicon dioxide on a germanium or gallium arsenide wafer or substrate, selectively removing the silicon dioxide layer to define one or more surface regions for a device to be fabricated thereon, growing a matched epitaxial layer of doped germanium or gallium arsenide of an appropriate thickness using MBE or MOCVD techniques on both the silicon dioxide layer and the defined one or more regions; and etching the silicon dioxide and the epitaxial material on top of the silicon dioxide to leave a matched epitaxial layer of germanium or gallium arsenide on the germanium or gallium arsenide substrate, respectively, and upon which a field effect device can thereafter be formed.

Jhabvala, Murzban

Improved Method of Manufacturing SiC Devices

The phrase, "common-layered architecture for semiconductor silicon carbide" ("CLASSiC") denotes a method of batch fabrication of microelectromechanical and semiconductor devices from bulk silicon carbide. CLASSiC is the latest in a series of related methods developed in recent years in continuing efforts to standardize SiC-fabrication processes. CLASSiC encompasses both institutional and technological innovations that can be exploited separately or in combination to make the manufacture of SiC devices more economical. Examples of such devices are piezoresistive pressure sensors, strain gauges, vibration sensors, and turbulence-intensity sensors for use in harsh environments (e.g., high-temperature, high-pressure, corrosive atmospheres). The institutional innovation is to manufacture devices for different customers (individuals, companies, and/or other entities) simultaneously in the same batch. This innovation is based on utilization of the capability for fabrication, on the same substrate, of multiple SiC devices having different functionalities (see figure). Multiple customers can purchase shares of the area on the same substrate, each customer s share being apportioned according to the customer s production-volume requirement. This makes it possible for multiple customers to share costs in a common foundry, so that the capital equipment cost per customer in the inherently low-volume SiC-product market can be reduced significantly. One of the technological innovations is a five-mask process that is based on an established set of process design rules. The rules provide for standardization of the fabrication process, yet are flexible enough to enable multiple customers to lay out masks for their portions of the SiC substrate to provide for simultaneous batch fabrication of their various devices. In a related prior method, denoted multi-user fabrication in silicon carbide (MUSiC), the fabrication process is based largely on surface micromachining of poly SiC. However, in MUSiC one cannot exploit the superior sensing, thermomechanical, and electrical properties of single-crystal 6H-SiC or 4H-SiC. As a complement to MUSiC, the CLASSiC five-mask process can be utilized to fabricate multiple devices in bulk single-crystal SiC of any polytype. The five-mask process makes fabrication less complex because it eliminates the need for large-area deposition and removal of sacrificial material. Other innovations in CLASSiC pertain to selective etching of indium tin oxide and aluminum in connection with multilayer metallization. One major characteristic of bulk micromachined microelectromechanical devices is the presence of three-dimensional (3D) structures. Any 3D recesses that already exist at a given step in a fabrication process usually make it difficult to apply a planar coat of photoresist for metallization and other subsequent process steps. To overcome this difficulty, the CLASSiC process includes a reversal of part of the conventional flow: Metallization is performed before the recesses are etched.

Okojie, Robert S.