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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 37 records · Page 2
All sourcesNASA NTRSDOE OSTI
DOE OSTI2021

Materials challenges and opportunities for quantum computing hardware

Combatting noise on the platform The potential of quantum computers to solve problems that are intractable for classical computers has driven advances in hardware fabrication. In practice, the main challenge in realizing quantum computers is that general, many-particle quantum states are highly sensitive to noise, which inevitably causes errors in quantum algorithms. Some noise sources are inherent to the current materials platforms. de Leon et al. review some of the materials challenges for five platforms for quantum computers and propose directions for their solution. Science , this issue p. eabb2823

Science & Technology - Other Topics↗
NASA NTRS1995

Analysis of systems hardware flown on LDEF: New findings and comparison to other retrieved spacecraft hardware

The Long Duration Exposure Facility (LDEF) was retrieved in 1990 after spending 69 months in low-earth-orbit (LEO). A wide variety of mechanical, electrical, thermal, and optical systems, subsystems, and components were flown on LDEF. The Systems Special Investigation Group (Systems SIG) was formed by NASA to investigate the effects of the 69 month exposure on systems related hardware and to coordinate and collate all systems analysis of LDEF hardware. This report is the Systems SIG final report which updates earlier findings and compares LDEF systems findings to results from other retrieved spacecraft hardware such as Hubble Space Telescope. Also included are sections titled (1) Effects of Long Duration Space Exposure on Optical Scatter, (2) Contamination Survey of LDEF, and (3) Degradation of Optical Materials in Space.

Dursch, Harry↗
NASA NTRS2008

Space Telecommunications Radio Systems (STRS) Hardware Architecture Standard: Release 1.0 Hardware Section

This report defines a hardware architecture approach for software-defined radios to enable commonality among NASA space missions. The architecture accommodates a range of reconfigurable processing technologies including general-purpose processors, digital signal processors, field programmable gate arrays, and application-specific integrated circuits (ASICs) in addition to flexible and tunable radiofrequency front ends to satisfy varying mission requirements. The hardware architecture consists of modules, radio functions, and interfaces. The modules are a logical division of common radio functions that compose a typical communication radio. This report describes the architecture details, the module definitions, the typical functions on each module, and the module interfaces. Tradeoffs between component-based, custom architecture and a functional-based, open architecture are described. The architecture does not specify a physical implementation internally on each module, nor does the architecture mandate the standards or ratings of the hardware used to construct the radios.

Reinhart, Richard C.↗
DOE OSTI2018

Advanced Photovoltaic Inverter Control Development and Validation in a Controller-Hardware-in-the-Loop Test Bed

Penetration of solar photovoltaic (PV) installations into the grid has increased in recent years. In the past, photovoltaic installations have not included grid-support functionality. Grid support functions including Volt-VAR (VVAR), Frequency-Watt (FW), Volt-Watt (VW), frequency/voltage-ride through, as well as other inverter functions such as anti-islanding are recommended by standards such as IEEE 1547 to allow PV inverters to contribute to acceptable operation and stability of distribution systems with high penetrations of PV and to ensure predictable response of the PV inverters. First, low-level and high-level grid support inverter control functions were developed and tested in simulation. The developed controller is able to integrate advanced controller functions in a coordinated approach, avoiding any conflict between the different control objectives. The algorithms were then programmed on an off-the-shelf embedded controller that included a dual-core CPU and FPGA. The details of the high-level grid support function and the lower level switching control will be presented. Second, this programmed controller is tested using a controller-hardware-in-the-loop (CHIL) test bed setup using an FPGA-based real-time simulator. The CHIL setup has the capability to run at a 500 nano-second time-step to accommodate the 20 kHz switching frequency of the developed controller. The advanced control function and CHIL test bed details provided here will aide future researchers to design, implement, and test advanced inverter functions for PV inverters.

14 SOLAR ENERGY↗
DOE OSTI2018

Development of Application Function Blocks for Power-Hardware-in-the-Loop Testing of Grid-Connected Inverters: Preprint

Stability and accuracy of the PHIL platform has been a common problem and challenging issue for a long time, thus continuous efforts and research have been devoted to developing interface algorithms to improve upon this. Some of existing works exhibit promising solutions to compensate the errors in the PHIL platform. However, there is a need to harmonize various solutions into a standard framework that provides a general solution for various PHIL test beds and that can be reused with minimum modifications to avoid extra effort. A good way to do this is by using application function blocks (AFBs), which are model-based and can be developed as a standard library component, thus achieving satisfactory reusability and reconfigurability for various platforms. Since PHIL simulation has the flexibility of the software simulation, proper functions can be easily implemented in the digital real-time simulator (DRTS) to preprocess the reference signal before sending it to the power amplifier. Therefore, this paper aims to develop standard AFBs in DRTS for the PHIL interface to test grid-connected inverters. The PHIL interface algorithm is separated into five AFBs that will be presented in detail in this paper.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2022

Demonstrating Distribution System Resiliency through Grid-Edge Microgrids, on a Multi-Site Networked Hardware-in-Loop Platform

With the increasing penetration of Distributed Energy Resources (DERs) at the grid-edge, power systems include more energy storage, remote switches, relays, voltage regulators, and other intelligent electronic devices (IED). Effective control of these grid-edge devices by using Advanced Distribution Management Systems (ADMS) can yield substantial improvements to the resiliency and power quality of distribution systems. In this paper, improvements to the resiliency of a distribution system are demonstrated using a multi-site evaluation environment consisting of a real-time Hardware-in-Loop (HIL) setup in which DERs and other IEDs are modeled; and an ADMS which monitors and is able to control the distribution system assets. The HIL model and the ADMS are located 2400 km away, with communication between the sites enabled by a data manager using Distributed Network Protocol 3 (DNP3), demonstrating the system's capabilities even over long distances. After a simulated transmission system failure in the HIL demonstration setup, DERs and other devices are operated to restore critical loads and node voltage profile (to within the 'nominal +/-5%' band) in the distribution system.

ADMS↗
DOE OSTI2026

Use of Power Hardware-in-the-Loop and Controller Hardware-in-the-Loop to De-Risk the Use Of Grid-Forming Fuel Cell Inverters in Microgrids

Microgrids continue to proliferate, particularly those that rely on inverter-based resources as the microgrid's voltage and frequency leader. Hardware-in-the-loop simulations can de-risk microgrid deployments, and therefore we need power-hardware-in-the-loop (PHIL) interfaces for grid-forming (GFM) inverters to enable simulations of seamless transitions between islanded and grid-connected operation. Such interfaces are particularly challenging when the inverters need to switch modes, i.e., between grid-following (GFL) and GFM as the microgrid transitions between grid-connected and islanded operation. This presentation shows the use of PHIL interfaces for such microgrids and the preliminary experimental results.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2021

Stability enhancement module for grid-following converters: Hardware implementation and validation

Low-frequency oscillations limit power delivery of voltage-source converter interfaced resources, for example, wind and solar, operating in grid-following control mode. Our prior research identified the instability mechanism as the coupling between real power and voltage at point of common coupling. In turn, a stability enhancement control was proposed to weaken the coupling by introducing a simple voltage-based feedback loop. The stability enhancement control has been validated via electromagnetic transient simulation testbeds. The objectives of this paper are (a) to provide a more insightful explanation of the enhancement module by examining the impedance of the grid-following converter and (b) to verify the performance of the stability module using a hardware testbed. The theoretic examination demonstrates that stability enhancement module effectively reduces the negative resistance effect of $Z_{qq}$ and thus boosts stability. The experimental research leads to a hardware testbed of a grid-following converter with the ability of demonstrating low-frequency oscillations. Finally, the experimental results demonstrate the efficacy of the proposed stability enhancement control and the readiness of commercial realization of the stability enhancement unit.

42 ENGINEERING↗
DOE OSTI2016

Cyber-Physical Test Platform for Microgrids: Combining Hardware, Hardware-in-the-Loop, and Network-Simulator-in-the-Loop

This paper presents a cyber-physical testbed, developed to investigate the complex interactions between emerging microgrid technologies such as grid-interactive power sources, control systems, and a wide variety of communication platforms and bandwidths. The cyber-physical testbed consists of three major components for testing and validation: real time models of a distribution feeder model with microgrid assets that are integrated into the National Renewable Energy Laboratory's (NREL) power hardware-in-the-loop (PHIL) platform; real-time capable network-simulator-in-the-loop (NSIL) models; and physical hardware including inverters and a simple system controller. Several load profiles and microgrid configurations were tested to examine the effect on system performance with increasing channel delays and router processing delays in the network simulator. Testing demonstrated that the controller's ability to maintain a target grid import power band was severely diminished with increasing network delays and laid the foundation for future testing of more complex cyber-physical systems.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2021

Energy-efficient Mott activation neuron for full-hardware implementation of neural networks

To circumvent the von Neumann bottleneck, substantial progress has been made towards in-memory computing with synaptic devices. However, compact nanodevices implementing non-linear activation functions are required for efficient full-hardware implementation of deep neural networks. Here, in this work, we present an energy-efficient and compact Mott activation neuron based on vanadium dioxide and its successful integration with a conductive bridge random access memory (CBRAM) crossbar array in hardware. The Mott activation neuron implements the rectified linear unit function in the analogue domain. The neuron devices consume substantially less energy and occupy two orders of magnitude smaller area than those of analogue complementary metal–oxide semiconductor implementations. The LeNet-5 network with Mott activation neurons achieves 98.38% accuracy on the MNIST dataset, close to the ideal software accuracy. We perform large-scale image edge detection using the Mott activation neurons integrated with a CBRAM crossbar array. Our findings provide a solution towards large-scale, highly parallel and energy-efficient in-memory computing systems for neural networks.

electrical and electronic engineering↗
DOE OSTI2017

Trans-oceanic Remote Power Hardware-in-the-Loop: Multi-site Hardware, Integrated Controller, and Electric Network Co-simulation

Electric system operators are increasingly concerned with the potential system-wide impacts of the large-scale integration of distributed energy resources (DERs) including voltage control, protection coordination, and equipment wear. This prompts a need for new simulation techniques that can simultaneously capture all the components of these large integrated smart grid systems. This paper describes a novel platform that combines three emerging research areas: power systems co-simulation, power hardware in the loop (PHIL) simulation, and lab-lab links. The platform is distributed, real-time capable, allows for easy internet-based connection from geographically-dispersed participants, and is software platform agnostic. We demonstrate its utility by studying real-time PHIL co-simulation of coordinated solar PV firming control of two inverters connected in multiple electric distribution network models, prototypical of U.S. and Australian systems. Here, the novel trans-pacific closed-loop system simulation was conducted in real-time using a power network simulator and physical PV/battery inverter at power at the National Renewable Energy Laboratory in Golden, CO, USA and a physical PV inverter at power at the Commonwealth Scientific and Industrial Research Organisation's Energy Centre in Newcastle, NSW, Australia. This capability enables smart grid researchers throughout the world to leverage their unique simulation capabilities for multi-site collaborations that can effectively simulate and validate emerging smart grid technology solutions.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2025

OPET Hardware (Open PV Electrical Tool Hardware) [SWR-25-42]

OPET (Open-source Photovoltaic Electrical Tool) is used for performance measurements of solar photovoltaic (PV) devices in the field under natural sunlight or in the lab under artificial light. Its primary use is in research and development of solar cells and modules, specifically in reliability and durability research of PV devices. Some features and functions include: -IV curve measurements with linear or cosine distributed measurement points -PV device active loading at open circuit voltage (Voc), short circuit current (Isc) and maximum power point (Pmp) -Bias power supply to overcome series resistance in contact wires for Isc measurements and loading -PV voltage input in five ranges from 1V to 100V -PV current input ranges -Low current version, six current ranges from 1.1mA to 340mA -High current version, six current ranges from 50mA to 15A -IO ports for I2C and SPI temperature sensor Arduino extension boards -Integrated fan control This repository contains everything relating to the hardware of the OPET device. If you are looking for the firmware or software repositories, links are below: https://github.com/NREL/opet-firmware https://github.com/NREL/opet-control

McDanold, Byron [National Renewable Energy Laborat↗
NASA NTRS2002

Pre-Hardware Optimization of Spacecraft Image Processing Algorithms and Hardware Implementation

Spacecraft telemetry rates and telemetry product complexity have steadily increased over the last decade presenting a problem for real-time processing by ground facilities. This paper proposes a solution to a related problem for the Geostationary Operational Environmental Spacecraft (GOES-8) image data processing and color picture generation application. Although large super-computer facilities are the obvious heritage solution, they are very costly, making it imperative to seek a feasible alternative engineering solution at a fraction of the cost. The proposed solution is based on a Personal Computer (PC) platform and synergy of optimized software algorithms, and reconfigurable computing hardware (RC) technologies, such as Field Programmable Gate Arrays (FPGA) and Digital Signal Processors (DSP). It has been shown that this approach can provide superior inexpensive performance for a chosen application on the ground station or on-board a spacecraft.

Kizhner, Semion↗
DOE OSTI2021

Considerations for testing full-scale wind turbine nacelles with hardware-in-the-loop

In this paper, pole placement control techniques are utilized to compensate for variations in the torsional dynamics resulting from the different boundary conditions experienced by a wind turbine nacelle when mounted on a test bench. Simulation case studies are used to understand the baseline torsional characteristics of the nacelle coupled to the test bench versus that coupled to the rotor. It was found that the frequency shifts by up to 200% and 400% for the first and second torsional modes, respectively. The feasibility of utilizing pole placement technique to match the torsional characteristics of the turbine on the test bench is investigated using PI and PID controllers. Here, the performance of the tuned controller is then verified under two test scenarios: Low Voltage Ride Through (LVRT), and a highly dynamic turbulent wind input. It is demonstrated that tuning the test bench speed controller can effectively shift the poles of the closed-loop system to match the desired first and second modes of the full turbine and replicate transient field events on the test bench.

17 WIND ENERGY↗
DOE OSTI2018

Design and Assembly of SPT-3G Cold Readout Hardware

The third-generation upgrade to the receiver on the South Pole Telescope, SPT-3G, was installed at the South Pole during the 2016–2017 austral summer to measure the polarization of the cosmic microwave background. Increasing the number of detectors by a factor of 10 to ~16,000 required the multiplexing factor to increase to 68 and the bandwidth of the frequency-division readout electronics to span 1.6–5.2 MHz. This increase necessitates low-thermal conductance, low-inductance cryogenic wiring. Our cold readout system consists of planar thin-film aluminum inductive–capacitive resonators, wired in series with the detectors, summed together, and connected to 4K SQUIDs by 10-μm -thick niobium–titanium (NbTi) broadside-coupled striplines. Here, we present an overview of the cold readout electronics for SPT-3G, including assembly details and characterization of electrical and thermal properties of the system. We report, for the NbTi striplines, values of R≤10 -4 Ω , L=21±1 nH , and C=1.47±.02 nF . Additionally, the striplines’ thermal conductivity is described by kA=6.0±0.3 T 0.92±0.04 μW mm K -1 . Finally, we provide projections for cross talk induced by parasitic impedances from the stripline and find that the median value of percentage cross talk from leakage current is 0.22 and 0.09% from wiring impedance.

79 ASTRONOMY AND ASTROPHYSICS↗