Development and Demonstration of Data-driven Compact Device Models for Circuit Simulation and Analysis.
Abstract not provided.
SEARCH · Engineering Papers
Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.
Abstract not provided.
Abstract not provided.
The numerical simulation of quantum circuits is an indispensable tool for development, verification, and validation of hybrid quantum-classical algorithms intended for near-term quantum co-processors. The emergence of exascale high-performance computing (HPC) platforms presents new opportunities for pushing the boundaries of quantum circuit simulation. Here, we present a modernized version of the Tensor Network Quantum Virtual Machine (TNQVM) that serves as the quantum circuit simulation backend in the eXtreme-scale ACCelerator (XACC) framework. The new version is based on the scalable tensor network processing library ExaTN (Exascale Tensor Networks). It provides multiple configurable quantum circuit simulators that perform either an exact quantum circuit simulation via the full tensor network contraction or an approximate simulation via a suitably chosen tensor factorization scheme. Upon necessity, stochastic noise modeling from real quantum processors is incorporated into the simulations by modeling quantum channels with Kraus tensors. By combining the portable XACC quantum programming frontend and the scalable ExaTN numerical processing backend, we introduce an end-to-end virtual quantum development environment that can scale from laptops to future exascale platforms. We report initial benchmarks of our framework, which include a demonstration of the distributed execution, incorporation of quantum decoherence models, and simulation of the random quantum circuits used for the certification of quantum supremacy on Google’s Sycamore superconducting architecture.
High-performance quantum circuit simulation in a classic HPC is still imperative in the NISQ era. Observing that the major obstacle of scalable state-vector quantum simulation arises from the massively fine-grained irregular data-exchange with remote nodes, in this paper we present SV-Sim to apply the emerging PGAS-based communication models (i.e., direct peer access for intra-node CPUs/GPUs and SHMEM for inter-node CPU/GPU clusters) for efficient scalable quantum circuit simulation. Through an orchestrated device functional pointer design, SV-Sim is able to abstract the quantum gate sets across various heterogeneous backends, including IBM/Intel/AMD CPUs, NVIDIA /AMD GPUs, and Intel MIC, in a unified framework, but still asserting outstanding performance and tractable interface to higher-level quantum programming environments, such as IBM Qiskit, Microsoft Q\# and Google Cirq. Circumventing the disability of polymorphism in GPUs and leveraging the device-initiated one-sided communication, SV-Sim can process dynamically synthesized quantum circuit in a single GPU/CPU kernel without the need of expensive JIT or runtime branching, significantly improving the performance and simplifying the programming complexity for the emerging variational quantum algorithms. Evaluations on NVIDIA A100-DGX-1, V100-DGX-2, AMD MI100, ALCF Theta, and OLCF Summit HPCs show that SV-Sim can delivery scalable performance on various state-of-the-art HPC platforms, offering a useful tool for quantum algorithm validation and verification.
Abstract We provide an approach for compiling quantum simulation circuits that appear in Trotter, qDRIFT and multi-product formulas to Clifford and non-Clifford operations that can reduce the number of non-Clifford operations. The total number of gates, especially CNOT, reduce in many cases. We show that it is possible to implement an exponentiated sum of commuting Paulis with at most m (controlled)-rotation gates, where m is the number of distinct non-zero eigenvalues (ignoring sign). Thus we can collect mutually commuting Hamiltonian terms into groups satisfying one of several symmetries identified in this work. This allows an inexpensive simulation of the entire group of terms. We further show that the cost can in some cases be reduced by partially allocating Hamiltonian terms to several groups and provide a polynomial time classical algorithm that can greedily allocate the terms to appropriate groupings.
Quantum circuit simulations are applied in more and more circum- stances as the quantum computing community becomes broader. It helps researchers to evaluate quantum algorithms and relieve the burden of limited quantum computing resources. However, most of the state-of-the-art quantum simulators utilize either CPU or GPU to store and calculate the state vector, which results in resource starvation. Moreover, the maximum number of qubits supported by the simulator is bounded by the memory, since the memory utilization increases exponentially with the number of qubits. In this study, we leverage Heterogeneous computing to utilize both CPU and GPU to store and update state vectors. We also integrate lossy data compression to reduce memory requirements. Specifically, we develop a heterogeneous framework that has a dynamic scheduler to fully utilize the computing resources. We apply lossy compression to chunked state vector to make the maximum number of qubits higher than the regular simulators, the compression also benefits the data movement between CPU and GPU.
Large-scale simulations of quantum circuits pose significant challenges, especially in the context of quantum chemistry, due to the number of qubits, circuit depth, and the number of circuits needed per problem. High-performance computing (HPC) systems offer massive computational capabilities that could help overcome these obstacles. We developed a high-performance quantum circuit simulator, called NWQ-Sim, and demonstrate its capability to simulate large quantum chemistry problems on NERSC's Perlmutter supercomputer. Integrating NWQ-Sim with XACC, we have executed QPE and VQE algorithms for downfolded quantum chemistry systems at unprecedented scales. Our work demonstrates the potential of leveraging HPC resources to advance quantum chemistry and other applications of near-term quantum devices.
With the elimination of underground nuclear testing and declining defense budgets, science-based stockpile stewardship requires increased reliance on high performance modeling and simulation of weapon systems. Today's weapon systems are comprised of various electrical components and systems. As a result, there is a need for tools that will allow the use of massively parallel modeling and simulation techniques on high performance computers in existing and future weapons' electrical systems models. The Xyce Parallel Electronic Simulator is a SPICE (Simulation Program with Integrated Circuit Emphasis)- compatible circuit simulator designed to run on large-scale parallel computing platforms, though it can also execute efficiently on a variety of architectures including single processor workstations. As a mature platform for large-scale parallel circuit simulation, Xyce supports standard capabilities available in commercial simulators, in addition to various devices and models specific to Sandia's needs. Specifically, Xyce aids in the design and verification of electrical and electronic circuits and systems prior to weapons' manufacturing and deployment.
With the elimination of underground nuclear testing and declining defense budgets, science-based stockpile stewardship requires increased reliance on high performance modeling and simulation of weapon systems. Today's weapon systems are comprised of various electrical components and systems. As a result, there is a need for tools that will allow the use of massively parallel modeling and simulation techniques on high performance computers in existing and future weapons' electrical systems models. The Xyce Parallel Electronic Simulator is a SPICE (Simulation Program with Integrated Circuit Emphasis)- compatible circuit simulator designed to run on large-scale parallel computing platforms, though it can also execute efficiently on a variety of architectures including single processor workstations. As a mature platform for large-scale parallel circuit simulation, Xyce supports standard capabilities available in commercial simulators, in addition to various devices and models specific to Sandia's needs. Specifically, Xyce aids in the design and verification of electrical and electronic circuits and systems prior to weapons' manufacturing and deployment.
This paper presents a combined full-wave and circuit-based simulation study to investigate the important topic of cable insulation aging and physical damage. The analysis employs the time-frequency domain reflectometry (TFDR) technique that combines the advantages of both time domain reflectometry (TDR) and frequency domain reflectometry (FDR) for improved location identification and feature resolution. Coaxial cable sections with a location containing insulation aging or physical damage are simulated using Ansys High Frequency Structure Simulator (HFSS). Simulated scattering (S) parameters are then imported into the Advanced Design System (ADS) solver for time domain simulation where a Gaussian windowed chirp signal or ‘chirplet’ is launched. Finally, continuous wavelet transform (CWT) is applied in MATLAB to perform time-frequency analysis of the reflected waveforms. The results reveal that a small change in the relative permittivity of the insulation or the presence of a small point of physical damage on the insulation is reflected as a considerable change in the CWT magnitude demonstrating the efficacy of the method.
Abstract Radiation‐induced photocurrent in semiconductor devices can be simulated using complex physics‐based models, which are accurate, but computationally expensive. This presents a challenge for implementing device characteristics in high‐level circuit simulations where it is computationally infeasible to evaluate detailed models for multiple individual circuit elements. In this work we demonstrate a procedure for learning compact delayed photocurrent models that are efficient enough to implement in large‐scale circuit simulations, but remain faithful to the underlying physics. Our approach utilizes dynamic mode decomposition (DMD), a system identification technique for learning reduced‐order discrete‐time dynamical systems from time series data based on singular value decomposition. To obtain physics‐aware device models, we simulate the excess carrier density induced by radiation pulses by solving numerically the ambipolar diffusion equation, then use the simulated internal state as training data for the DMD algorithm. Our results show that the significantly reduced‐order delayed photocurrent models obtained via this method accurately approximate the dynamics of the internal excess carrier density—which can be used to calculate the induced current at the device boundaries—while remaining compact enough to incorporate into larger circuit simulations.
Simulation circuit operates under remote, automatic, or manual control to produce electrical outputs similar to pressure transducer. Specific circuit designed for simulations of Space Shuttle main engine. General circuit concept adaptable to other simulation and control systems involving several operating modes. Switches and amplifiers respond to external control signals and panel control settings to vary differential excitation of resistive bridge. Output voltage or passive terminal resistance made to equal pressure transducer in any of four operating modes.
Ballast resistors deposited on top of circuit structure. Cascadable, programmable binary connection matrix fabricated in VLSI form as basic building block for assembly of like units into content-addressable electronic memory matrices operating somewhat like networks of neurons. Connections formed during storage of data, and data recalled from memory by prompting matrix with approximate or partly erroneous signals. Redundancy in pattern of connections causes matrix to respond with correct stored data.
An iterative, simulation-based design procedure for a neural network chip is introduced. For this design procedure, the goal is to produce a chip layout for a neural network in which the weights are determined by transistor gate width-to-length ratios. In a given iteration, the current layout is simulated using the circuit simulator SPICE, and layout adjustments are made based on conventional gradient-decent methods. After the iteration converges, the chip is fabricated. Monte Carlo analysis is used to predict the effect of statistical fabrication process variations on the overall performance of the neural network chip.
We introduce TensorFlow Quantum (TFQ), an open source library for the rapid prototyping of hybrid quantum-classical models for classical or quantum data. This framework offers high-level abstractions for the design and training of both discriminative and generative quantum models under TensorFlow and supports high-performance quantum circuit simulators. We provide an overview of the software architecture and building blocks through several examples and review the theory of hybrid quantum-classical neural networks. We illustrate TFQ functionalities via several basic applications including supervised learning for quantum classification, quantum control, simulating noisy quantum circuits, and quantum approximate optimization. Moreover, we demonstrate how one can apply TFQ to tackle advanced quantum learning tasks including meta-learning, layerwise learning, Hamiltonian learning, sampling thermal states, variational quantum eigensolvers, classification of quantum phase transitions, generative adversarial networks, and reinforcement learning. We hope this framework provides the necessary tools for the quantum computing and machine learning research communities to explore models of both natural and artificial quantum systems, and ultimately discover new quantum algorithms which could potentially yield a quantum advantage.
This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas: Capability to solve extremely large circuit problems by supporting large-scale parallel computing platforms (up to thousands of processors). This includes support for most popular parallel and serial computers. A differential-algebraic-equation (DAE) formulation, which better isolates the device model package from solver algorithms. This allows one to develop new types of analysis without requiring the implementation of analysis-specific device models. Device models that are specifically tailored to meet Sandias needs, including some radiation-aware devices (for Sandia users only). Object-oriented code design and implementation using modern coding practices. Xyce is a parallel code in the most general sense of the phrase - a message passing parallel implementation - which allows it to run efficiently a wide range of computing platforms. These include serial, shared-memory and distributed-memory parallel platforms. Attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows.
This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas: Capability to solve extremely large circuit problems by supporting large-scale parallel computing platforms (up to thousands of processors). This includes support for most popular parallel and serial computers; A differential-algebraic-equation (DAE) formulation, which better isolates the device model package from solver algorithms. This allows one to develop new types of analysis without requiring the implementation of analysis-specific device models; Device models that are specifically tailored to meet Sandia's needs, including some radiation-aware devices (for Sandia users only); Object-oriented code design and implementation using modern coding practices. Xyce is a parallel code in the most general sense of the phrase—a message passing parallel implementation—which allows it to run efficiently a wide range of computing platforms. These include serial, shared-memory and distributed-memory parallel platforms. Attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows.