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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 37 records · Page 2
All sourcesNASA NTRSDOE OSTI
DOE OSTI2026

CMOS-fabricated ultraviolet light modulator using low-loss alumina piezo-optomechanical photonics

Ultra-violet (UV) and near-UV wavelengths are necessary for many important optical transitions for quantum technologies and various sensing mechanisms for biological and chemical detection. However, all well-known photonic platforms have excessively high losses in the UV, which has prevented photonic integrated circuits (PICs) being used to address these and other important application spaces. Photonic waveguides using low-loss alumina cores and silicon dioxide cladding have emerged as a promising solution because of alumina’s large optical bandgap and the high quality of films enabled by atomic layer deposition. These properties allow passive, low-loss waveguide operation down to at least 266 nm using multimode widths. However, to the best of our knowledge, active alumina PICs have only been realized using thermo-optic tuning, which precludes switching speeds shorter than approximately 100 microseconds, high circuit densities, and cryogenically compatible operation. Here, we introduce a CMOS-fabricated, piezo-optomechanical PIC platform using alumina waveguides and piezoelectric aluminum nitride strain actuators. The platform allows for sub-microsecond switching times, high circuit densities, and cryogenic operation which is desired in many UV PIC applications. We demonstrate a high-performance, reconfigurable optical filter operating at wavelengths as low as 320 nm. The filter has a 6-nanosecond switching time, a loaded linewidth of 3.3 GHz, tuning rate of 28 V/linewidth, and a hold power of less than 20 nW at one linewidth detuning. This work establishes the foundations for a new class of CMOS-fabricated, rapidly reconfigurable, and low-power UV photonic circuits compatible with wavelengths as low as 225 nm.

Castillo, Zachary A. [Sandia National Laboratories↗
DOE OSTI2022

LGAD-in-CMOS Design Studies

We describe a process flow for a CMOS sensor with intrinsic gain. The design is based on a base wafer which is prepared with closely spaced buried n and p doping layers that form an amplifying high field gain region when the device is biased. A deep n-well forms the collecting electrode. The buried n layer serves to moderate the internal field so that the CMOS transistors within the n-well remain within their operating region.

43 PARTICLE ACCELERATORS↗
DOE OSTI2024

Development of CMOS Sensors for HEP with a US-based foundry

We will present a program to establish the first development and manufacturing of HEP-specific sensors monolithically integrated into a standard CMOS process using a US-based foundry. In collaboration with several US universities the project aims to develop Monolithic Active Pixel Sensors (MAPS) designs implemented in the 90 nm technology node, including simple test structures and multi-pixel arrays, and monolithic CMOS sensors with readout integrated circuits, perform detailed characterization of the detector prototypes and quantify their performance for HEP applications.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2023

Design and Characterization of a Burst Mode 20 Mfps Low Noise CMOS Image Sensor

This paper presents a novel ultra-high speed, high conversion-gain, low noise CMOS image sensor (CIS) based on charge-sweep transfer gates implemented in a standard 180 nm CIS process. Through the optimization of the photodiode geometry and the utilization of charge-sweep transfer gates, the proposed pixels achieve a charge transfer time of less than 10 ns without requiring any process modifications. Moreover, the gate structure significantly reduces the floating diffusion capacitance, resulting in an increased conversion gain of 183 µV/e−. This advancement enables the image sensor to achieve the lowest reported noise of 5.1 e− rms. To demonstrate the effectiveness of both optimizations, a proof-of-concept CMOS image sensor is designed, taped-out and characterized.

47 OTHER INSTRUMENTATION↗
DOE OSTI2023

A low noise CMOS camera system for 2D resonant inelastic soft X-ray scattering

Resonant Inelastic X-ray Scattering (RIXS) is a powerful spectroscopic technique to study quantum properties of materials in the bulk. A novel variant of RIXS, called 2D RIXS, enables concurrent measurement of the scattered X-ray spectrum for a wide range of input energies, improving on the typically low throughput of 1D RIXS. In the soft X-ray domain, 2D RIXS demands an X-ray camera system with small pixels, large area, high quantum efficiency and low noise to limit the false detection rate in long duration exposures. We designed and implemented a 7.5 Megapixel back-illuminated CMOS detector with 5 μm pixels and high quantum efficiency in the 200–1,000 eV X-ray energy range for the QERLIN 2D RIXS spectrometer at the Advanced Light Source. The QERLIN beamline and detector are currently in commissioning. The camera noise from in-situ 3 s long dark exposures is 7e - or less and the leakage current is 6.5 × 10 -3 e - /(pixel ∙ s). For individual 500 eV X-rays, the expected efficiency is greater than 75% and the false detection rate is ~1 × 10 -5 per pixel.

47 OTHER INSTRUMENTATION↗
DOE OSTI2022

Topological Antiferromagnetic Van der Waals Phase in Topological Insulator/Ferromagnet Heterostructures Synthesized by a CMOS-Compatible Sputtering Technique

Breaking time-reversal symmetry by introducing magnetic order, thereby opening a gap in the topological surface state bands, is essential for realizing useful topological properties such as the quantum anomalous Hall and axion insulator states. In this work, a novel topological antiferromagnetic (AFM) phase is created at the interface of a sputtered, c-axis-oriented, topological insulator/ferromagnet heterostructure—Bi 2 Te 3 /Ni 80 Fe 20 because of diffusion of Ni in Bi 2 Te 3 (Ni-Bi 2 Te 3 ). The AFM property of the Ni-Bi2Te3 interfacial layer is established by observation of spontaneous exchange bias in the magnetic hysteresis loop and compensated moments in the depth profile of the magnetization using polarized neutron reflectometry. Analysis of the structural and chemical properties of the Ni-Bi2Te3 layer is carried out using selected-area electron diffraction, electron energy loss spectroscopy, and X-ray photoelectron spectroscopy. These studies, in parallel with first-principles calculations, indicate a solid-state chemical reaction that leads to the formation of Ni=Te bonds and the presence of topological antiferromagnetic (AFM) compound NiBi 2 Te 4 in the Ni-Bi 2 Te 3 interface layer. The Neél temperature of the Ni-Bi 2 Te 3 layer is ≈ 63 K, which is higher than that of typical magnetic topological insulators (MTIs). The presented results provide a pathway toward industrial complementary metal-oxide-semiconductor (CMOS)-process-compatible sputtered-MTI heterostructures, leading to novel materials for topological quantum devices.

36 MATERIALS SCIENCE↗
DOE OSTI2023

Demonstration of sub-micron UCN position resolution using room-temperature CMOS sensor

High spatial resolution of ultracold neutron (UCN) measurement is of growing interest to UCN experiments such as UCN spectrometers, UCN polarimeters, quantum physics of UCNs, and quantum gravity. Here we utilize physics informed deep learning to enhance the experimental position resolution and to demonstrate sub-micron spatial resolutions for UCN position measurements obtained using a room-temperature CMOS sensor, extending our previous work that demonstrated a position uncertainty of 1.5 microns. We explore the use of the open-source software Allpix Squared to generate experiment-like synthetic hit images with ground-truth position labels. We use physics-informed deep learning by training a fully connected neural network (FCNN) to learn a mapping from input hit images to output hit position. The automated analysis for sub-micron position resolution in UCN detection combined with the fast data rates of current and next generation UCN sources will enable improved precision for future UCN research and applications.

10B nanometer thin film↗
DOE OSTI2025

Gigahertz-frequency acousto-optic phase modulation of visible light in a CMOS-fabricated photonic circuit

Optical phase modulators operating at visible wavelengths are essential components for photonic technologies such as those for quantum control, communications, and laser ranging. However, they remain challenging to implement in scalable, integrated platforms capable of handling high optical powers. Here we present a visible-light, gigahertz-frequency acousto-optic phase modulator, fabricated on a 200-mm wafer in a volume CMOS foundry, that supports greater than 500 mW of optical power at 730 nm. The device combines a piezoelectric transducer and a photonic waveguide within a single, wavelength-scale structure that confines both a propagating optical mode and an electrically excitable breathing-mode mechanical resonance. By tuning the device’s geometry to optimize the optomechanical interaction, we achieve modulation depths up to 4.85 rad with 80 mW of applied microwave power at 2.31 GHz in a 2-mm-long device. This corresponds to resonant modulation figures of merit of V π = 1.32V and V π ⋅ L = 0.26V cm. To our knowledge, this is the lowest V π ever demonstrated in any acousto-optic phase modulator and represents a 15-fold reduction in V π and a 100-fold reduction in required microwave power relative to state-of-the-art modulators with high visible-wavelength power handling commonly employed in quantum control systems.

Freedman, Jacob M. [Univ. of Arizona, Tucson, AZ (↗
DOE OSTI2024

Characterization of a CMOS camera based film digitization platform for gated x-ray imaging diagnostics at the National Ignition Facility

Hardened gated x-ray detectors use photographic film as the data recording medium due to its low sensitivity to the high-yield neutron environments at the National Ignition Facility (NIF). The photographic film is digitized with a Photometric Data Systems (PDS) microdensitometer, which measures the film’s optical density. The PDS scanner is able to measure a dynamic range of 0–5 OD; however, raster scanning the film is time consuming and maintenance of the instrument is challenging due to legacy technology. Since film usage at NIF is expected to continue in the foreseeable future, a digitization platform that is faster and more maintainable would benefit the NIF’s current and future operations. Here, this work presents the characterization of the digital transitions (DT) atom, a CMOS camera-based digitization platform that records film data in a single image capture very quickly and has widely available user support. The preliminary results suggest that the DT atom is able to reconstruct exposures accurately enough to be a competitive alternative to the PDS Scanner.

47 OTHER INSTRUMENTATION↗
DOE OSTI2024

The Impact of Bias Row Noise to Photometric Accuracy: Case Study Based on a Scientific CMOS Detector

Abstract We tested a new model of CMOS detector manufactured by the Gpixel Inc, for potential space astronomical application. In laboratory, we obtain some bias images under the typical application environment. In these bias images, clear random row noise pattern is observed. The row noise also contains some characteristic spatial frequencies. We quantitatively estimated the impact of this feature to photometric measurements, by making simulated images. We compared different bias noise types under strict parameter control. The result shows the row noise will significantly deteriorate the photometric accuracy. It effectively increases the readout noise by a factor of 2–10. However, if it is properly removed, the image quality and photometric accuracy will be significantly improved.

Astronomy & Astrophysics↗
DOE OSTI2022

QTIA, a 2.5 or 10 Gbps 4-channel array optical receiver ASIC in a 65 nm CMOS technology

Here, the Quad transimpedance and limiting amplifier (QTIA) is a 4-channel array optical receiver ASIC, developed using a 65 nm CMOS process. It is configurable between the bit rate of 2.56 Gbps and 10 Gbps per channel. QTIA offers careful matching to both GaAs and InGaAs photodiodes. At this R&D stage, each channel has a different biasing scheme to the photodiode for optimal coupling. A charge pump is implemented in one channel to provide a higher reverse bias voltage, which is especially important to mitigate radiation effects on the photodiodes. The circuit functions of QTIA successfully passed the lab tests with GaAs photodiodes.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2024

Embedded FPGA developments in 130 nm and 28 nm CMOS for machine learning in particle detector readout

Embedded field programmable gate array (eFPGA) technology allows the implementation of reconfigurable logic within the design of an application-specific integrated circuit (ASIC). This approach offers the low power and efficiency of an ASIC along with the ease of FPGA configuration, particularly beneficial for the use case of machine learning in the data pipeline of next-generation collider experiments. An open-source framework called "FABulous" was used to design eFPGAs using 130 nm and 28 nm CMOS technology nodes, which were subsequently fabricated and verified through testing. The capability of an eFPGA to act as a front-end readout chip was assessed using simulation of high energy particles passing through a silicon pixel sensor. A machine learning-based classifier, designed for reduction of sensor data at the source, was synthesized and configured onto the eFPGA. A successful proof-of-concept was demonstrated through reproduction of the expected algorithm result on the eFPGA with perfect accuracy. Finally, further development of the eFPGA technology and its application to collider detector readout is discussed.

47 OTHER INSTRUMENTATION↗
DOE OSTI2024

A 32-Channel Cryo-CMOS ASIC for SNSPD Biasing and Readout with Picosecond

Superconducting nanowire single-photon detectors (SNSPD) are a promising technology for particle detection. Although SNSPDs have demonstrated picosecond timing accuracy, scaling up large arrays has proved challenging. In this work, we introduce a 32-channel cryo-CMOS application-specific integrated circuit (ASIC) that can be tightly integrated with SNSPD arrays. The ASIC is designed to operate at a temperature of 4K and can perform up to 32 simultaneous timing measurements with a root-mean-square (RMS) accuracy of 8.0ps. The ASIC includes on-chip circuitry for externally biasing superconducting devices, low-noise amplifiers for reading superconducting devices, high-resolution time-to-digital converters (TDC) for time-tagging events, and serializers for transmitting data to room-temperature electronics. The ASIC is manufactured in a 22nm FDSOI process and occupies an area of 4.0mm x 1.0mm. The performance of the ASIC was verified using custom cryogenic device models internally developed for the 22nm SOI process. Measurement results will be presented at the conference.

Fredenburg, Jeff↗
DOE OSTI2022

High-bandwidth CMOS-voltage-level electro-optic modulation of 780 nm light in thin-film lithium niobate

Integrated photonics operating at visible-near-infrared (VNIR) wavelengths offer scalable platforms for advancing optical systems for addressing atomic clocks, sensors, and quantum computers. The complexity of free-space control optics causes limited addressability of atoms and ions, and this remains an impediment on scalability and cost. Networks of Mach-Zehnder interferometers can overcome challenges in addressing atoms by providing high-bandwidth electro-optic control of multiple output beams. Here, we demonstrate a VNIR Mach-Zehnder interferometer on lithium niobate on sapphire with a CMOS voltage-level compatible full-swing voltage of 4.2 V and an electro-optic bandwidth of 2.7 GHz occupying only 0.35 mm 2 . Our waveguides exhibit 1.6 dB/cm propagation loss and our microring resonators have intrinsic quality factors of 4.4 × 10 5 . This specialized platform for VNIR integrated photonics can open new avenues for addressing large arrays of qubits with high precision and negligible cross-talk.

77 NANOSCIENCE AND NANOTECHNOLOGY↗
DOE OSTI2024

CMOS photonic integrated circuit for flex-grid polarization entanglement

We showcase a CMOS-fabricated silicon photonic integrated circuit employing a bidirectionally pumped microring and polarization splitter-rotators for high-fidelity polarization entanglement. Spanning the optical C+L-band, this source is ideal for wavelength-multiplexed entanglement distribution in multi-user networks.

Miloshevsky, Alex↗
DOE OSTI2024

CMOS photonic integrated source of broadband polarization-entangled photons

We showcase a fully on-chip CMOS-fabricated silicon photonic integrated circuit employing a bidirectionally pumped microring and polarization splitter-rotators tailored for the generation of broadband (>9 THz), high-fidelity (90–98%) polarization-entangled photons. Spanning the optical C+L-band and producing over 116 frequency-bin pairs on a 38.4-GHz-spaced grid, this source is ideal for flex-grid wavelength-multiplexed entanglement distribution in multiuser networks.

42 ENGINEERING↗
DOE OSTI2021

Nanosecond Gated CMOS Camera (NSGCC) ICD (Rev. 2.1)

The Ultra-Fast X-ray Imager (UXI) program is an ongoing effort at Sandia National Laboratories to create high speed, multi-frame, time-gated Read Out Integrated Circuits (ROICs), and a corresponding suite of photodetectors to image a wide variety of High Energy Density (HED) physics experiments on both Sandia’s Z-Machine and LLNL’s National Ignition Facility (NIF). Several cameras have been designed over the length of the program; one of the most recent is the Icarus, which is an improvement on past imagers (Furi and Hippogriff). A second sensor that can be connected is the Daedalus sensor. The Icarus is a 1024 × 512-pixel array with either 25 μm or 8 µm spatial resolution containing four frames of storage per pixel and has improved timing generation and distribution components while achieved 2 ns time gating. The Daedalus sensor is also a 1024 x 512-pixel array with 25 µm special resolution containing three frames of storage per pixel and has an increased set of features for a wider variety of applications from interlacing of rows in each frame to configurability of all shutters. See Section 14 for details regarding the Icarus implementation of the firmware and Section 15 for details regarding the Daedalus implementation. Due to the unique test environments UXI sensors are targeted for, full custom hardware was required to physically mount an Icarus or Daedalus sensor, manage its various functions, and read out pixel data for transfer to a host computer. Beyond experimental functionality, the hardware also needed to accommodate sensor characterization requirements. Lawrence Livermore National Laboratory’s ‘Version 4.0 Board’ was the result of these efforts. It mounts all the components required to fully utilize the Icarus and Daedalus sensors including analog to digital converters to convert pixel data and various system voltages to digital form for readout and analysis, DAC channels for remote configuration of critical bias voltages, static random-access memories to buffer pixel data, RS422 and Gigabit Ethernet communications for remote access, and an FPGA to tie these components together. This document describes the FPGA electrical interfaces in detail to allow the reader a greater understanding of the device, and to facilitate implementation of custom software to control and manage it. The Version 4.0 Board is a continuation of the Nano-second Gated CMOS hardware design that retains much of the functionality of the Version 1.0 Board while adding features including a DAC instead of digital potentiometers, as well as sensors for pressure and radiation. The Version 4.0 board is intended for applications requiring tight form-factor enclosures. It is composed of two stacking boards; one holds the FPGA and regulators to power the various components of the board while the other contains the mating connector to the sensor, image-readoff ADCs, the DAC, and other components.

42 ENGINEERING↗
DOE OSTI2024

A 32-Channel Cryo-CMOS ASIC for SNSPD Biasing and Readout with Picosecond Timing

Superconducting nanowire single-photon detectors (SNSPD) are a promising technology for particle detection. Although SNSPDs have demonstrated picosecond timing accuracy, scaling up large arrays has proved challenging. In this work, we introduce a 32-channel cryo-CMOS application-specifc integrated circuit (ASIC) that can be tightly integrated with SNSPD arrays. The ASIC is designed to operate at a temperature of 4K and can perform up to 32 simultaneous timing measurements with a root-mean-square (RMS) accuracy of 8.0ps. The ASIC includes on-chip circuitry for externally biasing superconducting devices, low-noise amplifers for reading superconducting devices, high-resolution time-to-digital converters (TDC) for time-tagging events, and serializers for transmitting data to room-temperature electronics. The ASIC is manufactured in a 22nm FDSOI process and occupies an area of 4.0mm x 1.0mm. The performance of the ASIC was verifed using custom cryogenic device models internally developed for the 22nm SOI process. Measurement results will be presented at the conference.

Fredenburg, Jeff↗