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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 307 records · Page 17
All sourcesNASA NTRSDOE OSTI
DOE OSTI2025

Development of a reliable Potting process for Photoconductive Semiconductor Switches (PCSS)

Electrical potting is an important process to protect semiconductor devices from damaging external elements (mechanical stress, moisture, high voltage, etc.) and provides structural support for delicate devices for electrical connectivity to a larger platform. This internship will focus on the development of a universal potting jig for photoconductive semiconductor switches (PCSS). The goal is to design a reliable compression jig that is cross compatible with various PCSS designs that allow for easy potting of devices with a high dielectric breakdown strength material. The challenge with the current potting jig is that the design is only compatible with one style of PCSS and applies uneven pressure that can lead to leakage of potting material. Our approach is to move from a design that applies pressure by binder clip to utilizing a micrometer based compressing jig for a reliable packaging process that can pot a variety of devices without having to have a unique compressing jig for each of style of PCSS. Possible roadblocks with the new design include epoxy leakage into the optical path and misalignment of the electrode – metal contact bond.

42 ENGINEERING↗
NASA NTRS1983

Semiconductor photoelectrochemistry

Semiconductor photoelectrochemical reactions are investigated. A model of the charge transport processes in the semiconductor, based on semiconductor device theory, is presented. It incorporates the nonlinear processes characterizing the diffusion and reaction of charge carriers in the semiconductor. The model is used to study conditions limiting useful energy conversion, specifically the saturation of current flow due to high light intensity. Numerical results describing charge distributions in the semiconductor and its effects on the electrolyte are obtained. Experimental results include: an estimate rate at which a semiconductor photoelectrode is capable of converting electromagnetic energy into chemical energy; the effect of cell temperature on the efficiency; a method for determining the point of zero zeta potential for macroscopic semiconductor samples; a technique using platinized titanium dioxide powders and ultraviolet radiation to produce chlorine, bromine, and iodine from solutions containing their respective ions; the photoelectrochemical properties of a class of layered compounds called transition metal thiophosphates; and a technique used to produce high conversion efficiency from laser radiation to chemical energy.

Buoncristiani, A. M.↗
NASA NTRS1987

Nondestructive SEM for surface and subsurface wafer imaging

The scanning electron microscope (SEM) is considered as a tool for both failure analysis as well as device characterization. A survey is made of various operational SEM modes and their applicability to image processing methods on semiconductor devices.

Propst, Roy H.↗
DOE OSTI2024

Optimized Viewing Techniques to Minimize Radiation Damage From X-ray Imaging Systems

X-ray inspection of ball grid arrays (BGAs) is typically performed at one or more viewing angles to examine adhesion sites for errors such as voids, joint cracking, or head-in-pillow. During this inspection process, the cir cuit board assembly is subject to ionizing radiation exposure, which can cause trapped charge within oxide layers of semiconductor devices. Some x-ray machines allow for programmable inspection routines, which could be used to optimize radiation exposure to semiconductor components. Using Monte Carlo methods, x-ray inspection of a BGA was simulated to determine a range of acceptable viewing angles. Dose rates to circuit board components were estimated at each inspection angle to determine the view resulting in optimized radiation exposure. Results showed that for each BGA, the maximum unobstructed viewing times without exceeding a 5 Gy dose limit to a single part ranged from 82 to 94 minutes. Using a radiation cost function method, optimized viewing across all components was found. Here, it was observed that for a consistent dose limit applied to silicon-based components, performing inspection with BGAs facing the x-ray source was optimal. A third method was applied, assigning individual dose limits based on empirical data from the NASA Goddard Space Flight Center radiation database. This method showed that optimized viewing maximizes the distance between the radiation source and highly sensitive components. It was also observed that cumulative effects from viewing two BGAs will influence viewing angles, causing the optimal view of one BGA to exist nearly 180° from the other.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
NASA NTRS1975

Correlation of displacement effects produced by electrons, protons and neutrons in silicon

The correlation of displacement effects produced by electrons, protons, and neutrons in silicon is studied. Available data from the literature is employed. In particular the scope of the study is limited to the degradation of excess carrier lifetime and device electrical parameters directly related to it. The degree to which displacement effects may be correlated in order to predict semiconductor device response based on response data to another type of radiation is discussed. Useful ranges of the correlation factors (lifetime damage constant ratios) as a function of device majority carrier type, device resistivity, and injection level are presented. A significant dependence on injection level for the correlation factors is found.

Van Lint, V. A. J.↗
NASA NTRS1983

Silicon carbide, a high temperature semiconductor

Electronic applications are described that would benefit from the availability of high temperature semiconductor devices. Potential materials for these devices are compared and the problems of each are discussed. Recent progress in developing silicon carbide as a high temperature semiconductor is described.

Powell, J. A.↗
NASA NTRS1997

Simulation of Ultra-Small Electronic Devices: The Classical-Quantum Transition Region

Concern is increasing about how quantum effects will impact electronic device operation as down-scaling continues along the SIA Roadmap through 2010. This document describes part of a new semiconductor device modeling (SDM) program at NAS to investigate these concerns by utilizing advanced NAS and third-party numerical computation software to rapidly implement and investigate electronic device models including quantum effects. This SDM project will investigate quantum effects in devices in the classical-quantum transition region, especially sub-0.1 mm MOSFETs. Specific tasks planned for this project include the use of quantum corrections to the classical drift-diffusion and hydrodynamic models of electron transport, arid the use of nominally quantum models including significant scattering.

Biegel, Bryan A.↗
DOE OSTI2025

Next-generation tunnel FETs: exploring material perspectives and areal tunneling configurations

The end of Dennard scaling, which facilitated proportional increases in computing power without added energy costs until the mid-2000s, has underscored the urgent need for innovative semiconductor devices that can enhance energy efficiency. Tunnel field-effect transistors (TFETs) have emerged as promising candidates to surpass the energy efficiency of conventional metal oxide semiconductor field-effect transistors (MOSFETs). Unlike MOSFETs, which rely on thermionic emission to overcome the source-channel potential barrier, TFETs operate through quantum tunneling, potentially enabling sub-60 mV dec −1 subthreshold swing (SS) for low-voltage operation. However, lateral TFETs have faced challenges in achieving adequate on-state current (I ON ) and a broad SS operation window, limiting their practical utility. This review article advocates for areal TFETs, which utilize face-to-face tunnel junctions that ideally offer step-function current turn-on characteristics and allow I ON to scale with device area rather than width. We highlight recent advancements in integrating 2D materials into tunneling structures, which could facilitate efficient band-to-band tunneling through atomically thin layers, while addressing challenges of gate field screening. We then discuss the nearer-term prospects of epitaxial areal TFETs comprising III–V compound semiconductors and group-IV semiconductors based on recent experimental progress. The review examines both quantum mechanical and semiclassical modeling approaches for TFETs, including techniques to reduce the computational complexity. The article delves into ongoing challenges in material synthesis, interface engineering, device fabrication, and integration pathways, concluding with recommendations for future research directions to overcome the fundamental power density limitations of conventional transistor technology.

2D materials↗
DOE OSTI2026

TCAD-Machine Learning Enabled TID Compact Model Development for Commercial SiC MOSFET

We propose a TCAD (Technology Computer Aided Design)-machine learning coupled approach that combines a TCAD tool (Charon), optimization/uncertainty quantification tool (Dakota), surrogate models, and Bayesian learning capabilities. The coupling approach is used for accurate modeling and calibration of total ionizing dose (TID) induced threshold voltage (V th ) shifts in Commercial-Off-The-Shelf (COTS) semiconductor devices and to develop physics-informed TID compact models. This versatile approach is applied to model the TID effect in an exemplar COTS 3.3 kV SiC power MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor). With the Charon-Dakota coupling, we can determine key device geometry and doping values based on device physics, which are difficult to obtain or not available for COTS devices but important for TCAD simulation; additionally, we can efficiently generate thousands of simulation results in a large parameter space, which makes it possible to develop data-driven surrogate models and perform Bayesian calibration. Utilizing the full tool-coupling approach, we achieve calibrated TCAD simulation models that accurately capture the average TID-induced V th shifts behavior with total doses and V th shifts saturation at high doses as observed in experimental data. More importantly, the calibrated TCAD simulations are obtained with determined TID model parameters (e.g., hole trap density and capture cross section) values that contain well quantified uncertainties. Furthermore, we can isolate and quantify the noises that are not captured by the TCAD models but exist in the measured data due to measurements and devices variabilities. Lastly, the calibrated surrogate models are used to develop physics-informed TID compact models. The method is generalizable to other devices and/or radiation conditions with few modifications and can provide well-determined uncertainties.

COTS↗
DOE OSTI2024

A strategy to eliminate selenium oxide islands formed on the ZnSe/GaAs epilayer

Atomically clean and smooth surfaces are essential for semiconductor device fabrication and epitaxial regrowth. In this regard, spontaneously formed oxide islands or clusters on the surfaces of II-VI semiconductor exposures to air can disrupt interface formation. Using ZnSe/GaAs heterostructures grown by molecular beam epitaxy (MBE), we investigated the effect of surface treatments in eliminating oxide islands. The samples were probed with atomic force microscopy, low-temperature photoluminescence, and scanning electron microscopy. Here, it was found that ultra-high vacuum (UHV) annealing at 200°C, regardless of annealing duration, largely removed the islands while leaving the crystallinity of the ZnSe and GaAs epilayers unaffected. UHV annealing at higher temperatures of 300°C completely removed the islands, but the optical properties of ZnSe and/or GaAs epilayers deteriorated depending on the annealing duration. Our observations provide guidance to set thermal annealing strategies for removing oxide islands from the surfaces of II-VI/III-V semiconductor heterostructures depending on the desired properties.

36 MATERIALS SCIENCE↗
NASA NTRS1997

High-Tc SNS Junctions: A New Generation of Proximity-Coupled Josephson Devices

This paper reviews this evolution of proximity - coupled Josephson jucntion from the early investigations on low temperature superconductor-normal -superconductor junctions through the introduction of hybrid superconductor-semiconductor devices and the resulting interest in mesoscopic Josephson junctions, to the recent development of high temperature devices.

Proximity-Coupled Josephson↗
NASA NTRS1998

Semiconductor apparatus utilizing gradient freeze and liquid-solid techniques

Transition metals of Group VIII (Co, Rh and Ir) have been prepared as semiconductor compounds with the general formula TSb.sub.3. The skutterudite-type crystal lattice structure of these semiconductor compounds and their enhanced thermoelectric properties results in semiconductor materials which may be used in the fabrication of thermoelectric elements to substantially improve the efficiency of the resulting thermoelectric device. Semiconductor materials having the desired skutterudite-type crystal lattice structure may be prepared in accordance with the present invention by using vertical gradient freezing techniques and/or liquid phase sintering techniques. Measurements of electrical and thermal transport properties of selected semiconductor materials prepared in accordance with the present invention, demonstrated high Hall mobilities (up to 1200 cm.sup.2.V.sup.-1.s.sup.-1) and good Seebeck coefficients (up to 150 .mu.VK.sup.-1 between 300.degree. C. and 700.degree. C.). Optimizing the transport properties of semiconductor materials prepared from elemental mixtures Co, Rh, Ir and Sb resulted in a substantial increase in the thermoelectric figure of merit (ZT) at temperatures as high as 400.degree. C. for thermoelectric elements fabricated from such semiconductor materials.

Fleurial, Jean-Pierre↗
NASA NTRS1997

High performance thermoelectric materials and methods of preparation

Transition metals (T) of Group VIII (Co, Rh and Ir) have been prepared as semiconductor alloys with Sb having the general formula TSb.sub.3. The skutterudite-type crystal lattice structure of these semiconductor alloys and their enhanced thermoelectric properties results in semiconductor materials which may be used in the fabrication of thermoelectric elements to substantially improve the efficiency of the resulting thermoelectric device. Semiconductor alloys having the desired skutterudite-type crystal lattice structure may be prepared in accordance with the present invention by using vertical gradient freeze techniques, liquid-solid phase sintering techniques, low temperature powder sintering and/or hot-pressing. Measurements of electrical and thermal transport properties of selected semiconductor materials prepared in accordance with the present invention, demonstrated high Hall mobilities (up to 8000 cm.sup.2.V.sup.-1.s.sup.-1), good Seebeck coefficients (up to 400 .mu.VK.sup.-1 between 300.degree. C. and 700.degree. C.), and low thermal conductivities (as low as 15 mW/cmK). Optimizing the transport properties of semiconductor materials prepared from elemental mixtures Co, Rh, Ir and Sb resulted in a two fold increase in the thermoelectric figure of merit (ZT) at temperatures as high as 400.degree. C. for thermoelectric elements fabricated from such semiconductor materials.

Fleurial, Jean-Pierre↗
DOE OSTI2022

Boron Nitride Solid-State Neutron Detectors

The goal of this project is to build upon the work performed under the Texas Tech IDEAS project (DE-AR0000964 monitored by Dr. Isik Kizilyalli) to bring the developed B-10 enriched hexagonal boron nitride (h- 10 BN or 10 BN or BN) semiconductor neutron detector technology to the next level of maturity. In comparison to He-3 ( 3 He) gas detectors, BN neutron detectors possess all the intrinsic advantages of semiconductor devices: light weight, compact size, fast response speed, high spatial resolution, high temperature and low voltage operation capability, ease of mass production via existing semiconductor infrastructures, low cost of operation and maintenance, flexible form factors, and durability. The project will develop a prototype h- 10 BN neutron detector as a potential replacement for the 3 He gas neutron detectors (LND 25185 or equivalent) used in various neutron survey meters currently produced and commercialized by Ludlum Measurements, Inc. (LMI). To increase the overall detection efficiency, it is essential to maximize the collection efficiency of charge carriers (electrons and holes) generated by the nuclear reaction, which demands a further push to achieve 10 BN epilayers with improved material quality. The material growth processes will be guided by characterization of structural, optical, and electrical properties of h-BN. Selective devices will be calibrated at LMI. During ARPA-E supporting period, the key material parameters of h-BN produced by metal organic chemical vapor deposition (MOCVD), including the layer thickness, mobility-lifetime product, surface recombination field and detector size for maintaining a high charge collection efficiency all have been improved by several orders of magnitude. These improvements have enabled the realization of high-performance h 10BN semiconductor thermal neutron detectors. Presently, h- 10 BN thermal neutron detectors developed under ARPA-E’s support hold the record high detection efficiency among all solid-state detectors at 59%. With further development in manufacturing, there is no question that h-BN detectors will replace the traditional He-3 gas detectors in certain application areas by offering obvious advantages of semiconductor technologies over gas detectors and opportunities for users to dedicate the scarce and expensive supply of He-3 gas to other application areas where substitutes of He-3 gas are not possible.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2023

Power Electronic Substrates for Space Restricted Application

High-power modules use substrates to house the semiconductor device and for electrical insulation. These substrates are constructed with thermally conductive dielectric material sandwiched between two metals to extract heat from semiconductor chips. Thus, the required cooling performance of a power module is linked to the substrate’s thermal performance and can vary based on the substrate technologies. In this study, four substrate technologies were evaluated for space-restricted applications: direct-bonded copper, an insulated metal substrate, a thermally annealed pyrolytic graphite–based insulated metal substrate, and direct-bonded aluminum, where the heat sink is directly attached without thermal interface materials. The finite element results suggest that the popular direct-bonded copper substrate has better thermal performance than the rest of the substrates for space-restricted applications. Furthermore, a modified direct-bonded copper is proposed to further improve thermal performance. The evaluation results show that the modified substrate can handle 30% more losses than its traditional counterpart.

Chowdhury, Shajjad↗
DOE OSTI2025

A Modified DBC Substrate Improving Thermal Performance for Confined Space Applications

High-power modules use substrates to house the semiconductor device and for electrical insulation. These substrates are constructed with thermally conductive dielectric material sandwiched between two metals to extract heat from semiconductor chips. Thus, the required cooling performance of a power module is linked to the substrate’s thermal performance and can vary based on the substrate technologies. Here, in this study, five substrate technologies were evaluated for space-restricted applications: direct-bonded copper (DBC), an insulated metal substrate (IMS), a thermally annealed pyrolytic graphite (TPG)-based IMS, DBC-based double-sided cooling, and direct-bonded aluminum (DBA) where the heat sink is directly attached without thermal interface materials (TIMs). The finite element (FE) analysis results suggest that the popular DBC substrate has thermal performance better than that of the other substrates for space-constrained applications. To further improve the thermal performance, a modified DBC substrate was proposed where a copper block was added between the semiconductor and the DBC substrate to achieve heat spreading underneath the chip. The modified DBC performance was then compared with the aforementioned substrates and the results showed significant thermal performance improvement. The results were verified with experimental results where the proposed substrate showed 20% more loss handling capability compared to an identical DBC substrate.

42 ENGINEERING↗
DOE OSTI2024

Machine Learning of Plasma Science for Next Generation Microelectronics (Project Final Report)

Low temperature plasmas (LTPs) are an enabling technology behind reducing device dimensions and the continuation of Moore’s Law. It is estimated that 40-45% of all process steps necessary to manufacture semiconductor devices involve LTPs. However, challenges in plasma process design and continuous incorporation of novel materials for new device architectures are pushing the limits of what is possible with current plasma technology. For example, creating higher aspect ratio structures and etching features at the atomic scale both require finer control of the ion energy/velocity at wafer surfaces. To support these types of future innovations in the plasma processing systems that Sandia and the DOE rely upon, we have developed novel diagnostics, simulations, and machine learning capabilities to discover, characterize, and predict plasma phenomena affecting the ion energy/velocity distribution function (IEDF). These efforts also supported research program development and external collaboration with industry and academia through Sandia’s Plasma Research Facility (PRF). This report will focus on the following topics and accomplishments of this three year LDRD project, briefly summarized.

42 ENGINEERING↗