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DOE OSTI2020

Xyce Case Study

With the elimination of underground nuclear testing and declining defense budgets, science-based stockpile stewardship requires increased reliance on high performance modeling and simulation of weapon systems. Today's weapon systems are comprised of various electrical components and systems. As a result, there is a need for tools that will allow the use of massively parallel modeling and simulation techniques on high performance computers in existing and future weapons' electrical systems models. The Xyce Parallel Electronic Simulator is a SPICE (Simulation Program with Integrated Circuit Emphasis)- compatible circuit simulator designed to run on large-scale parallel computing platforms, though it can also execute efficiently on a variety of architectures including single processor workstations. As a mature platform for large-scale parallel circuit simulation, Xyce supports standard capabilities available in commercial simulators, in addition to various devices and models specific to Sandia's needs. Specifically, Xyce aids in the design and verification of electrical and electronic circuits and systems prior to weapons' manufacturing and deployment.

45 MILITARY TECHNOLOGY, WEAPONRY, AND NATIONAL DEF↗

DOE OSTI2020

Combined Environments: Driving multiple loads on Z

Pulsed power drivers such as the Z generator of Sandia National Laboratories typically deliver high current (>20MA) to single experiments. This project is intended to develop and assess ways to simultaneously drive multiple targets on a single pulsed power driver (specifically a neutron and an x-ray producing target driven in a single experiment). The combined x-ray/neutron environment produced will then be used to investigate potential synergistic effects in integrated circuits. A pre-requisite for being able to design and study multiple targets on Z is first adapting simulation tools to be able to model them effectively. This will enable us to assess the tradeoffs between the different ways multiple targets can be combined, and to better understand how existing and future pulsed power machines can be used to generate combined testing environments. This report is limited to documenting the initial development of a parallel load modeling capability that is presently being applied to design experiments to produce combined neutron/x-ray environments on Z.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗

DOE OSTI2020

Advanced CMOS Reliability Update: Sub 20nm FinFET Assessment

Advances in FinFET design and fabrication enable manufacturing of denser, more compact integrated circuits (ICs) with substantially reduced leakage while shortening the channel-lengths. The same stress-induced leakage and breakdown degradation mechanisms that affect planar transistors also impact FinFET devices. Reliability concerns such as Bias Temperature Instability (BTI), Time Dependent Dielectric Breakdown (TDDB), and Hot Carrier Injection (HCI) become very important with changes to transistor geometry and fin sidewall crystal orientation. Recent testing has shown that FinFETs respond differently to radiation (radiation effects such as total ionizing dose) when compared to planar transistors. These reliability and radiation effects issues become very important when changing transistor geometry and scaling FinFETs towards smaller feature sizes (22-nm, 16-nm, 14- nm, 10-nm, and smaller critical dimensions). The comparable 2019 state of the art transistor densities in current high-volume manufacturing silicon-based foundries is 7-nm (ISMC, Samsung) and 10-nm (Intel) [www.anandtech.com,fuse.wikichip.org]. Released products include supporting components for the cellphone and commercial microprocessor markets respectively. Extensive development in the foundry industry is driving to a 5-nm technology node in late 2020.

47 OTHER INSTRUMENTATION↗

DOE OSTI2021

A Low Cost SIPM Evaluation and Control Prototyping System including accurate bias voltage generation, leakage current measurement, and temperature control using Peltier cooling

We describe an electronics system to operate SIPMs in the laboratory. The system is comprised of a single channel amplifier board (SIPM Amp) and a 4-channel control board to which up to 4 SIPM Amp boards can be connected. The control board supplies a common low voltage power for the amplifiers. All channels feature individually regulated bias and Peltier power voltages, along withPt10K RTD readout. A graphical user interface allows control of the bias voltages, amplifier voltage, Peltier voltages, and also provides for readback of leakage currents and other voltages. The GUI app has a feedback loop to measure the SIPM temperature (with the PT10K) and generate correction voltages to the Peltier to regulate the temperature. The temperatures, which can be achieved by Peltier cooling depend on the thermal design of the setup, the practical limit being about 50C below ambient. The SIPM Amp. board is a small (3x5cm) PCB that has a single SIPM readout channel. The SIPM scan be surface mounted on the pcb or connected to a 2-pin 0.100" socket. The area around the SIPM footprint is thermally isolated by perforations in the PCB. The RTD is located inside the thermal break. Onboard is BV and LV filtering. The 10X amplifier is based on MiniCircuits' GALI-S66+ integrated circuit, tweaked for a 6V power. The amplifier was selected for a combination of high bandwidth, low noise, and low power. An accoupled amplifier output is connected to an SMA connector. For best operation of this inverting amplifier the output signal should be in the range of 0 to -1V.The Amplifier board is connected to the Control board with a 10-conductor 0.025" pitch ribbon cable, carrying all the services. Peltier power for currents more than 1A should use a separate 2-contact connector.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

DOE OSTI2021

High-resolution magnetic microscopy applications using nitrogen-vacancy centers in diamond

Magnetic microscopy with high spatial resolution helps to solve a variety of technical problems in condensed-matter physics, electrical engineering, biomagnetism, and geomagnetism. In this work we used quantum diamond magnetic microscope (QDMM) setups, which use a dense uniform layer of magnetically-sensitive nitrogen-vacancy (NV) centers in diamond to image an external magnetic field using a fluorescence microscope. We used this technique for imaging few-micron ferromagnetic needles used as a physically unclonable function (PUF) and to passively interrogate electric current paths in a commercial 555 timer integrated circuit (IC). As part of the QDMM development, we also found a way to calculate ion implantation recipes to create diamond samples with dense uniform NV layers at the surface. This work opens the possibility for follow-up experiments with 2D magnetic materials, ion implantation, and electronics characterization and troubleshooting.

36 MATERIALS SCIENCE↗

DOE OSTI2021

Nanosecond Gated CMOS Camera (NSGCC) ICD (Rev. 2.1)

The Ultra-Fast X-ray Imager (UXI) program is an ongoing effort at Sandia National Laboratories to create high speed, multi-frame, time-gated Read Out Integrated Circuits (ROICs), and a corresponding suite of photodetectors to image a wide variety of High Energy Density (HED) physics experiments on both Sandia’s Z-Machine and LLNL’s National Ignition Facility (NIF). Several cameras have been designed over the length of the program; one of the most recent is the Icarus, which is an improvement on past imagers (Furi and Hippogriff). A second sensor that can be connected is the Daedalus sensor. The Icarus is a 1024 × 512-pixel array with either 25 μm or 8 µm spatial resolution containing four frames of storage per pixel and has improved timing generation and distribution components while achieved 2 ns time gating. The Daedalus sensor is also a 1024 x 512-pixel array with 25 µm special resolution containing three frames of storage per pixel and has an increased set of features for a wider variety of applications from interlacing of rows in each frame to configurability of all shutters. See Section 14 for details regarding the Icarus implementation of the firmware and Section 15 for details regarding the Daedalus implementation. Due to the unique test environments UXI sensors are targeted for, full custom hardware was required to physically mount an Icarus or Daedalus sensor, manage its various functions, and read out pixel data for transfer to a host computer. Beyond experimental functionality, the hardware also needed to accommodate sensor characterization requirements. Lawrence Livermore National Laboratory’s ‘Version 4.0 Board’ was the result of these efforts. It mounts all the components required to fully utilize the Icarus and Daedalus sensors including analog to digital converters to convert pixel data and various system voltages to digital form for readout and analysis, DAC channels for remote configuration of critical bias voltages, static random-access memories to buffer pixel data, RS422 and Gigabit Ethernet communications for remote access, and an FPGA to tie these components together. This document describes the FPGA electrical interfaces in detail to allow the reader a greater understanding of the device, and to facilitate implementation of custom software to control and manage it. The Version 4.0 Board is a continuation of the Nano-second Gated CMOS hardware design that retains much of the functionality of the Version 1.0 Board while adding features including a DAC instead of digital potentiometers, as well as sensors for pressure and radiation. The Version 4.0 board is intended for applications requiring tight form-factor enclosures. It is composed of two stacking boards; one holds the FPGA and regulators to power the various components of the board while the other contains the mating connector to the sensor, image-readoff ADCs, the DAC, and other components.

42 ENGINEERING↗

DOE OSTI2022

Real-Time Seismic System for Monitoring, Imaging, and Characterization (RT-SEISMIC)

The goal of this Laboratory Directed Research and Development (LDRD) project was to develop a borehole seismic source and sensor array to enable real-time seismic imaging at scales and conditions relevant to the energy industry including both fossil-energy and geothermal. In FY21 and FY22, we designed, built, and tested both a prototype impulse source module for generating seismic energy and a sensing module for recording ground motions generated by the source module array. A pneumatically driven vibratory source was also designed. The source modules were fabricated with all high temperature components and the team has worked to incorporate the current RT-SEISMIC electronics design into a commercially available, high temperature silicon-on-insulator chip integrated circuit. Several issues were identified during fabrication and lab testing that led to redesign of several system components and subsequent retesting. The final round of testing showed that while metal/graphite-based seals worked quite well for static seals, they were unable to provide an adequate gas seal for dynamic, reciprocating part movements which necessitated a final redesign using Kalrez. This change will result in a continuous temperature rating of approximately 275 degrees C for the system. While a field test of the RT-SEISMIC system was targeted in FY22, due to the extended lab testing and redesign efforts, field testing was not achieved. As a result of this LDRD investment, several sponsors have expressed interest in RT-SEISMIC and we expect to continue towards a field demonstration of the full system in the future.

58 GEOSCIENCES↗

DOE OSTI2023

Final Report DE-SC0020773

The DOE/NNSA sought development of innovative portable neutron/x-ray cameras for imaging and, when coupled with a portable source, also for radiography. This project focused on developing such a device that promises to have excellent resolution, while also providing neutron/gamma separation. We developed an Application Specific Integrated Circuit (ASIC) to be employed in conjunction with existing sensor technologies and modern assembly techniques. The concepts developed were a combination of new novel techniques and an innovative implementation of existing methods boosted by technological advances in ASIC performance.

61 RADIATION PROTECTION AND DOSIMETRY↗

DOE OSTI2023

A Digital System-On-Chip CO 2 Sensor (Final Report)

The overall goal of the project was to build a low-cost digital CO 2 sensor made of N5’s patented sensing architecture using a digital application specific integrated circuit (ASIC) to reduce the amount of energy usage in residential and commercial buildings. The proposed small form-factor CO 2 monitoring device contains a molecular sieve membrane filter capable of monitoring indoor air quality which indicates the content of CO 2 inside a residential or commercial building.

36 MATERIALS SCIENCE↗

DOE OSTI2022

Radiation-Hardened GaN-Based Wireless Communications Architectures for Terrestrial Nuclear Reactor Sensing and Instrumentation

Wireless technologies have become increasingly common in applications, ranging from close proximity inductive communication links in medical devices to short-range Bluetooth and WiFi communications and longer-range cellular communications. Nonetheless, these technologies are unsuitable for use in or around nuclear reactors due to the extreme radiation and temperatures inherent in these environments and their associated significant degradative effects on electronics hardware. However, recent work in wide bandgap– based electronics has shown promise for gallium nitride (GaN) as an emerging technology for the realization of practical wireless communications systems for use in harsh environments. This report presents initial progress on the development of wireless communications architectures designed specifically for nuclear reactor application, based on inherently radiation-hardened (rad-hard) GaN technology. Prior work on rad-hard analog communications topologies is reviewed, and several digital modulation and encoding schemes that utilize GaN-based electronics devices are newly proposed for application in reactor environments. Continuous-time and discrete-time system simulations were performed, and results are presented for the preliminary transmitter and receiver designs, respectively. In addition, an overview of a software-defined radio testbed, designed for communications protocol development, is provided. Future work will focus on implementing candidate radiation-resistant wireless architectures using a research AlGaN/GaN high electron mobility transistor (HEMT) integrated circuit process, which is available at the Ohio State University, and irradiation studies will be carried out to assess the true potential of this technology for reactor application.

22 GENERAL STUDIES OF NUCLEAR REACTORS↗

DOE OSTI2024

Development of CMOS Sensors for HEP with a US-based foundry

We will present a program to establish the first development and manufacturing of HEP-specific sensors monolithically integrated into a standard CMOS process using a US-based foundry. In collaboration with several US universities the project aims to develop Monolithic Active Pixel Sensors (MAPS) designs implemented in the 90 nm technology node, including simple test structures and multi-pixel arrays, and monolithic CMOS sensors with readout integrated circuits, perform detailed characterization of the detector prototypes and quantify their performance for HEP applications.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

DOE OSTI2024

Smart pixel sensors Towards on-sensor filtering of pixel clusters with deep learning

High granularity silicon pixel sensors are at the heart of energy frontier particle physics collider experiments. At an collision rate of 40\,MHz, these detectors create massive amounts of data. Signal processing that handles data incoming at those rate and intelligently reduces the data within the pixelated region of the detector \textit{at rate} will enhance physics performance and enable physics analyses that are not currently possible. Using the shape of charge clusters deposited in an array of small pixels, the physical properties of the traversing particle can be extracted with locally customized neural networks. In this first work, we present a neural network that can be embedded into the on-sensor readout and filter out hits from low momentum tracks, reducing the detector's data volume by 54.4-75.4\%. The network is designed and simulated as a custom readout integrated circuit with 28\,nm CMOS technology and is expected to operate at less than 300\,$\mu W$ with an area of less than 0.2\,mm$^2$.

43 PARTICLE ACCELERATORS↗

DOE OSTI2024

CryoPDK Development for 22nm FDSOI CryoCMOS

Cryogenic Process Design Kits (PDKs) are an indispensable tool in the design of complex integrated circuits across a wide spectrum of applications, from noble element detectors to Quantum Information Science, Superconducting Nanowire Single Photon Detectors (SNSPDs), and precision atomic clocks. The development of PDK-compatible SPICE models is a complex endeavor requiring test structures, measurements, model extraction and fitting. We will present the cryogenic modeling and development of a cryo-PDK for a 22nm FDSOI CMOS process for operation at 3.8 Kelvin.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗

DOE OSTI2024

ASIC Scoping Study Final Report

This report documents the results and findings of a one-year scoping study investigating multichannel readout application specific integrated circuits (ASICs) for interfacing to, and processing data from, silicon photomultiplier (SiPM) arrays. We document ASIC desired and required specifications for four applications supporting national security mission areas: neutron radiography, associated particle imaging, and two versions of kinematic neutron imaging cameras. While each application has a few unique requirements that stress capability, there is generally good agreement among most. Two recently developed ASIC devices were evaluated in a system-like configuration by interfacing these to scintillator crystals exposed to gamma and neutron sources. The 64-channel ORNL device delivered functional capability while meeting most mission requirements for neutron radiography. The Nalu Scientific device, a 32-channel full waveform digitizer, did not demonstrate reliable neutron / gamma separation but it is unclear if this was an ASIC issue or problems with test setup or firmware. A literature survey of other commercial and academic ASICs was undertaken to with the conclusion that existing devices do not meet all requirements.

42 ENGINEERING↗

DOE OSTI2023

IceNet for FireBox - A Berkeley Warehouse-Scale Computer

Berkeley’s FireBox is a next-generation warehouse-scale computer (WSC) that utilizes the energy-efficiency and bandwidth density of integrated silicon-photonic interconnects to enable a new high-bandwidth and low-latency network fabric connecting thousands of compute nodes to petabytes of DRAM and Flash storage. The high bandwidth, low latency and high connectivity of FireBox’s WSC network fabric (IceNet) will enable dramatic improvements in the overall system energy efficiency enabling fine-grain power control on system resources (processors, links and memory/storage components). IceNet is a special 3-stage photonic Clos network architected to achieve ultra-low-latency connectivity between processor nodes and memory, drastically cutting down on the energy wasted in resource idling (processors and memory stalled due to pending network requests). This is achieved by integration of the first and last switch stages into processor/memory hub clients and by heavy over-provisioning of the high-radix middle switches (FlareSwitches). A key hardware component developed in this program is an active laser power management photonic integrated circuits called LightSpark. It interacts with the FlareSwitch and provides laser power to a subset of occupied switch ports, increasing the utilization of laser light in the photonic network by an order of magnitude. In addition to guiding the laser power where it is needed, the laser-power management module enables both wavelength and laser redundancy, significantly increasing the robustness of the system. The goal of the IceNet fabric is to enable communication between 1000s of processor nodes and PBs of memory/storage with <100ns latency, <10pJ/b wall-plug energy cost at multiple Pb/s of available connectivity bandwidth. These metrics represent two-orders of magnitude improvement with respect to the status of current data-center technology.

42 ENGINEERING↗

DOE OSTI2024

Smart Pixels: In-pixel AI for on-sensor data filtering

We present a smart pixel prototype readout integrated circuit (ROIC) designed in CMOS 28 nm bulk process, with in-pixel implementation of an artificial intelligence (AI) / machine learning (ML) based data filtering algorithm designed as proof-of-principle for a Phase III upgrade at the Large Hadron Collider (LHC) pixel detector. The first version of the ROIC consists of two matrices of 256 smart pixels, each 25$\times$25 µm\textsuperscript{2} in size. Each pixel consists of a charge-sensitive preamplifier with leakage current compensation and three auto-zero comparators for a 2-bit flash-type ADC. The frontend is capable of synchronously digitizing the sensor charge within 25 ns. Measurement results show an equivalent noise charge (ENC) of $\sim$30e\textsuperscript{-} and a total dispersion of $\sim$100e\textsuperscript{-} The second version of the ROIC uses a fully connected two-layer neural network (NN) to process information from a cluster of 256 pixels to determine if the pattern corresponds to highly desirable high-momentum particle tracks for selection and readout. The digital NN is embedded in-between analog signal processing regions of the 256 pixels without increasing the pixel size and is implemented as fully combinatorial digital logic to minimize power consumption and eliminate clock distribution, and is active only in the presence of an input signal. The total power consumption of the neural network is $\sim$ 300 $\mu$W. The NN performs momentum classification based on the generated cluster patterns and even with a modest momentum threshold, it is capable of 54.4\% – 75.4\% total data rejection, opening the possibility of using the pixel information at 40MHz for the trigger. The total power consumption of analog and digital functions per pixel is $\sim$ 6 $\mu$W per pixel, which corresponds to $\sim$ 1 W/cm\textsuperscript{2} staying within the experimental constraints.

Parpillon, Benjamin↗

DOE OSTI2024

Integrated Spatial, Spectral, & Temporal Optical Reflectance System for Precision Occupancy & Location Sensing to Improve Building Energy Efficiency

Buildings consume approximately 35% of the electricity used in the U.S. and building owners can significantly reduce this energy use by providing services like heating, electrical power and lighting only when people are present. The ARPAe funded program titled “INTEGRATED SPATIAL, SPECTRAL, & TEMPORAL OPTICAL REFLECTANCE SYSTEM FOR PRECISION OCCUPANCY & LOCATION SENSING TO IMPROVE BUILDING ENERGY EFFICIENCY” demonstrates how a low cost sensor technology developed for measuring distances can be used to count and locate occupants with a high degree of precision with a very low error rates. This platform tells a building control system where occupants are located (but not who they are) so that energy consuming services can be provided only when the services are needed by building occupants. The original proof of concept involved using low cost, commercially available time-of-flight (TOF) sensors that measure distance, but the performance of these existing sensors was lacking, as they could not operate properly in the presence of sunlight, which blinded the simple TOF sensors and limited their utility in buildings. This project proposed a powerful new class of TOF sensors that used state-of-the-art integrated circuit (IC) fabrication processes that combined advanced photonics with conventional silicon chip circuitry for improved sensor performance. An equally important part of this project was to find ways to maximize occupant count and location accuracy while using the fewest number of sensors possible, in order to keep costs low. By using building blueprints to create digital twins of commercial building spaces, the team developed new algorithms to maximize occupant count and tracking accuracy by properly locating the minimum number of sensors at just the right spots in the building. This capability not only minimizes system costs but also simplified sensor installation and system commissioning. Our simulations of our sensor networks for a range of commercial floorplan designs demonstrated that our installed cost target of $0.08/sqft was attainable, though not fully demonstrated during the project. Finally, we noted that the TOF sensor concept could provide a valuable role in health and eldercare by tracking patients without the need for worn sensors and would be useful for fall detection and other patient safety metrics, including tracking healthcare/patient interactions. We feel that, when fully developed, this new class of sophisticated TOF sensors and support software will be a powerful new approach to improving building energy efficiency based on occupant centric control platforms and will also open new levels of patient safety in healthcare operations. To realize this potential, the team formed the Troy Sensor Company LLC to oversee licensing of the programs patents and continue to seek commercialization of this program’s activity sensing technologies.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗

DOE OSTI2025

ECE 4396 (Final Report)

In the summer of 2025, I was fortunate enough intern at Sandia National Laboratories in Albuquerque, New Mexico. I was hired into the Southwest Analysis Laboratories for Semiconductor Advancement (SALSA) intern program. In this internship, I applied my knowledge and skills in electrical engineering to conduct hardware failure analysis. I utilized various failure analyze techniques involving the use of Infrared Thermography (IRT) and Laser Scanning Microscopy (LSM) to test different Application-Specific Integrated Circuits (ASIC) chips that are available in the public market.

42 ENGINEERING↗