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At least 253 records · Page 14

InP Heterojunction Bipolar Transistor Amplifiers to 255 GHz

Two single-stage InP heterojunction bipolar transistor (HBT) amplifiers operate at 184 and 255 GHz, using Northrop Grumman Corporation s InP HBT MMIC (monolithic microwave integrated circuit) technology. At the time of this reporting, these are reported to be the highest HBT amplifiers ever created. The purpose of the amplifier design is to evaluate the technology capability for high-frequency designs and verify the model for future development work.

Radisic, Vesna↗

Experiments on Evolving Software Models of Analog Circuits

Analog circuits are of great importance in electronic system design since the world is fundamentally analog in nature. While the amount of digital design activity far outpaces that of analog design, most digital systems require analog modules for interfacing with the external world. It was recently estimated that approximately 60% of digital application- specific integrated circuit designs incorporated analog circuits. With challenging analog circuit design problems and few analog design engineers, there are economic reasons for automating the analog design process, especially time-to-market considerations. Techniques for analog circuit design automation began appearing about two decades ago. These methods incorporated heuristics [6], knowledge bases [1], simulated annealing [5], and other algorithms. Efforts using techniques from evolutionary computation began appearing over the last few years. These include the use of genetic algorithms to select electronic component values (for example, the resistance value of a resistor), to select circuit topologies, and to design amplifiers using a limited set of canned topologies [4]. A genetic programming-based analog circuit design system has been demonstrated in which the circuit sizes, component values, and the circuit topologies are determined automatically [3]. The genetic-algorithm systems typically represent circuit structures as vectors of parameters encoded in binary strings, while the genetic programming system manipulates tree data structures.

Lohn, Jason D.↗

A Comparison of Three-Dimensional Simulations of Traveling-Wave Tube Cold-Test Characteristics Using CST MICROWAVE STUDIO and MAFIA

Previously, it was shown that MAFIA (solutions of Maxwell's equations by the Finite Integration Algorithm), a three-dimensional simulation code, can be used to produce accurate cold-test characteristics including frequency-phase dispersion, interaction impedance, and attenuation for traveling-wave tube (TWT) slow-wave structures. In an effort to improve user-friendliness and simulation time, a model was developed to compute the cold-test parameters using the electromagnetic field simulation software package CST MICROWAVE STUDIO (MWS). Cold-test parameters were calculated for several slow-wave circuits including a ferruled coupled-cavity, a folded waveguide, and a novel finned-ladder circuit using both MWS and MAFIA. Comparisons indicate that MWS provides more accurate cold-test data with significantly reduced simulation times. Both MAFIA and MWS are based on the finite integration (FI) method; however, MWS has several advantages over MAFIA. First, it has a Windows based interface for PC operation, making it very user-friendly, whereas MAFIA is UNIX based. MWS uses a new Perfect Boundary Approximation (PBA), which increases the accuracy of the simulations by avoiding stair step approximations associated with MAFIA's representation of structures. Finally, MWS includes a Visual Basic for Applications (VBA) compatible macro language that enables the simulation process to be automated and allows for the optimization of user-defined goal functions, such as interaction impedance.

Chevalier, C. T.↗

Fast inversion, preconditioned quantum linear system solvers, fast Green's-function computation, and fast evaluation of matrix functions

Preconditioning is the most widely used and effective way for treating ill-conditioned linear systems in the context of classical iterative linear system solvers. We introduce a quantum primitive called fast inversion, which can be used as a preconditioner for solving quantum linear systems. The key idea of fast inversion is to directly block encode a matrix inverse through a quantum circuit implementing the inversion of eigenvalues via classical arithmetics. We demonstrate the application of preconditioned linear system solvers for computing single-particle Green's functions of quantum many-body systems, which are widely used in quantum physics, chemistry, and materials science. We analyze the complexities in three scenarios: the Hubbard model, the quantum many-body Hamiltonian in the plane-wave-dual basis, and the Schwinger model. We also provide a method for performing Green's function calculation in second quantization within a fixed-particle manifold and note that this approach may be valuable for simulation more broadly. Aside from solving linear systems, fast inversion also allows us to develop fast algorithms for computing matrix functions, such as the efficient preparation of Gibbs states. Furthermore, we introduce two efficient approaches for such a task, based on the contour-integral formulation and the inverse transform, respectively.

97 MATHEMATICS AND COMPUTING↗

PRISTINE: An Emulation Platform for PCB-Level Hardware Trojans

Printed circuit Boards (PCBs) are becoming increasingly vulnerable to malicious design alteration, also known as Trojan attacks, due to a distributed business model that often involves various untrusted parties. Such attacks can be mounted at various stages in the PCB life cycle. The relative ease of alteration of PCB hardware even after fabrication (due to physical access to surface-mounted critical components and traces) makes them attractive for an adversary to manipulate their functional/physical behavior for malicious intent. There is a growing need to explore viable Trojan attacks in a PCB, analyze their functional and physical characteristics (e.g., impact on power or delay), and study the effectiveness of countermeasures against these attacks. While simulation-based approaches for PCB Trojan insertion are effective at creating a large population of possible Trojans, they fail to provide functional feasibility analysis with a realistic workload for a trigger circuit. Also, they cannot estimate a Trojan’s side-channel footprint due to the unavailability of physical models of diverse PCB components. To address these deficiencies, in this paper, we present PRISTINE, a PCB-level emulation system for any integrity or physical tampering issues, specifically, hardware Trojan insertion. The need for building such an emulation platform to resolve PCB trust issues in the supply chain is also surveyed and discussed. Both custom Hardware Hacking (HaHa) boards and multiple commercial PCBs are then used to test the ability of the proposed system to emulate various hardware Trojans specially designed to exploit board-specific hardware characteristics. Experimental results on emulated board-level Trojans show that a wide range of Trojans can be successfully activated, thus enabling the expected payload effects on both types of boards to be studied and quantified. The resulting data are further analyzed to create PCB-level Trojan benchmarks. In particular, a comparative evaluation of the experimental results is used to propose a risk level metric that quantifies the probability of detection and degree of payload impact of each Trojan on a given commercial PCB.

47 OTHER INSTRUMENTATION↗

Microwave characteristics of GaAs MMIC integratable optical detectors

Interdigitated photoconductive detectors were fabricated on microwave device structures, making them easily integratable with Monolithic Microwave Integrated Circuits (MMIC). Detector responsivity as high as 2.5 A/W and an external quantum efficiency of 3.81 were measured. Response speed was nearly independent of electrode geometry, and all detectors had usable response at frequencies to 6 GHz. A small signal model of the detectors based on microwave measurements was also developed.

Claspy, Paul C.↗

Circuit Modeling, Simulation, and Experimental Validation of a 100-kW Polyphase Wireless Power Transfer System for EV Applications

Polyphase wireless power transfer (WPT) systems can achieve much higher surface power densities (kW/m2) and specific power levels (kW/kg) compared to the conventional circular single phase WPT systems. Therefore, polyphase WPT systems can reduce the size, weight, volume, and cost of the WPT systems and can simplify the electric vehicle integration with less demand for space. This study presents the high-performance and compact 100-kW WPT development using polyphase electromagnetic coupling coils with rotating magnetic fields.

Onar, Omer [ORNL] (ORCID:0000000292028857)↗

On the applicability of integrated circuit technology to general aviation orientation estimation

The criteria of the significant value of the panel instruments used in general aviation were examined and kinematic equations were added for comparison. An instrument survey was performed to establish the present state of the art in linear and angular accelerometers, pressure transducers, and magnetometers. A very preliminary evaluation was done of the computers available for data evaluation and estimator mechanization. The mathematical model of a light twin aircraft employed in the evaluation was documented, the results of the sensor survey and the results of the design studies were presented.

Debra, D. B.↗

Testing self-timed circuits using scan paths

Testing is an essential part of any digital system design and one that can be made much easier if testing is considered during the design process rather than after the system is complete. There are a number of techniques for integrating testability into system design, but many of these traditional testing methods used for synchronous circuits are not directly applicable to non-clocked asynchronous circuits. As a result, many asynchronous circuits do not employ design for testability techniques. A method of using the familiar model of scan paths modified to test self-timed systems are presented. Specifically, circuits designed using a library of self-timed modules to assemble systems with two-phase transition control and bundled data paths are considered. The method involves modifying these self-timed modules such that circuits designed from them have a built-in scan path.

Khoche, Ajay↗

PRINTED, PLANAR MICROWAVE CONNECTOR WITH MULTIPLE SIGNAL LINES

Microwave connectors with a planar geometry have been demonstrated using additive manufacturing techniques. This planar form factor is expected to enable connectors to be integrated directly with other components onto a printed circuit board. The connectors were developed with multiple signal lines that will increase the density of signal connections to PCBs, eliminating the physical constraints of single-signal COTS microwave connectors. This work developed electromagnetic models (using Ansys HFSS) of these planar connectors to predict performance and optimize connector design. Materials and printing processes were developed to fabricate the connectors based on high-temperature PEEK thermoplastics. The multiple signal connectors were designed to operate over the 1-6GHz band and are built upon the single signal printed planar geometry connector introduced in a previous paper [1].

Additive Manufacturing↗

LENS: Learning Enabled Network Synthesis

RTRC and UMD have developed novel machine learning based methods under the ARPA-E DIFFERENTIATE program for rapid acceleration of hypothesis generation in complex architecture design spaces involving both discrete choices of component inclusion and interconnection and continuous parametric decisions. The project named Learning Enabled Network Synthesis (LENS) further demonstrated the developed methods on challenging electrical power converter design problems by identifying the most suitable circuit topologies and simultaneously selecting the most appropriate components to achieve optimized design of power converter with improved performances. We demonstrated that LENS could enable exploration of very large design space of circuit topologies and components by addressing the limitations of conventional design process in non-linear, high switching speed, multi-dimensional power converter design and optimization. The key innovation developed in LENS is the seamless integration of statistical learning and logical reasoning techniques and building on the individual strengths of these techniques for rapid hypothesis discovery. The main component of LENS comprises of: 1) Graph Reasoning Engine (GRE) to enforce composition rules that rapidly reject all discrete architectures that are composed incorrectly and generates an adaptive database of feasible designs which can be used by ML modules, 2) Graph Generative Learning module which is a deep neural network based generative model for graph architectures which can enable design space exploration beyond the dataset generated by the GRE, 3) Graph Reduced Order Model (ROM) for graph domains for accelerating computation of output metrics, and 4) Active learning and Rule Discovery module for sample efficient learning and extracting logical rules from the learned ML models which will be integrated in the GRE to enhance the filtering effectiveness. LENS approach can be applied to any design domains where designs can be represented as multi-attribute graphs. The LENS team integrated the various technical innovations listed above into an optimization pipeline and exercised the optimization pipeline on the converter design problem. The LENS project demonstrated that the developed AI/ML technologies can be used to generate novel converter circuits >45x faster than experts on chosen use-cases. This can enable faster design space exploration and identification of new designs which are not considered by experts due to the increasing design space complexity. This has significant potential impact on the public and energy needs of the country. It is currently estimated that 30% of all electrical powers generated passes through power converters. The future estimate is that 80% of all power generated would be passing through converters. LENS fills a critical gap in this space since by accelerating the design process the designers would be able to generate more efficient converters which can lead to significant energy savings for the country.

42 ENGINEERING↗

Guidelines for SEU-Resistant Integrated Circuits

Paper presents recent results of continuing program for increasing resistance of integrated circuits to single-event upset (SEU). Results based on study of test data for heavy-ion SEU in more than 180 different types of devices. (Some devices perform identical functions but made by different processes.) Program also examines developments in mathematical models for SEU.

Nichols, D. K.↗

Progress in knowledge representation research

Brief descriptions are given of research being carried out in the field of knowledge representation. Dynamic simulation and modelling of planning systems with real-time sensor inputs; development of domain-independent knowledge representation tools which can be used in the development of application-specific expert and planning systems; and development of a space-borne very high speed integrated circuit processor are among the projects discussed.

Lum, Henry↗

A 10-GHz amplifier using an epitaxial lift-off pseudomorphic HEMT device

A process to integrate epitaxial lift-off devices and microstrip circuits has been demonstrated using a pseudomorphic HEMT on an alumina substrate. The circuit was a 10 GHz amplifier with the interconnection between the device and the microstrip circuit being made with photolithographically patterned metal. The measured and modeled response correlated extremely well with a maximum gain of 6.8 dB and a return loss of -14 dB at 10.4 GHz.

Young, Paul G.↗

Void formation in operator growth, entanglement, and unitarity

The structure of the Heisenberg evolution of operators plays a key role in explaining diverse processes in quantum many-body systems. In this paper, we discuss a new universal feature of operator evolution: an operator can develop a void during its evolution, where its nontrivial parts become separated by a region of identity operators. Such processes are present in both integrable and chaotic systems, and are required by unitarity. We show that void formation has important implications for unitarity of entanglement growth and generation of mutual information and multipartite entanglement. We study explicitly the probability distributions of void formation in a number of unitary circuit models, and conjecture that in a quantum chaotic system the distribution is given by the one we find in random unitary circuits, which we refer to as the random void distribution. We also show that random unitary circuits lead to the same pattern of entanglement growth for multiple intervals as in (1 + 1)-dimensional holographic CFTs after a global quench, which can be used to argue that the random void distribution leads to maximal entanglement growth.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗

Functional and Evolutionary Integration of a Fungal Gene With a Bacterial Operon

Abstract Siderophores are crucial for iron-scavenging in microorganisms. While many yeasts can uptake siderophores produced by other organisms, they are typically unable to synthesize siderophores themselves. In contrast, Wickerhamiella/Starmerella (W/S) clade yeasts gained the capacity to make the siderophore enterobactin following the remarkable horizontal acquisition of a bacterial operon enabling enterobactin synthesis. Yet, how these yeasts absorb the iron bound by enterobactin remains unresolved. Here, we demonstrate that Enb1 is the key enterobactin importer in the W/S-clade species Starmerella bombicola. Through phylogenomic analyses, we show that ENB1 is present in all W/S clade yeast species that retained the enterobactin biosynthetic genes. Conversely, it is absent in species that lost the ent genes, except for Starmerella stellata, making this species the only cheater in the W/S clade that can utilize enterobactin without producing it. Through phylogenetic analyses, we infer that ENB1 is a fungal gene that likely existed in the W/S clade prior to the acquisition of the ent genes and subsequently experienced multiple gene losses and duplications. Through phylogenetic topology tests, we show that ENB1 likely underwent horizontal gene transfer from an ancient W/S clade yeast to the order Saccharomycetales, which includes the model yeast Saccharomyces cerevisiae, followed by extensive secondary losses. Taken together, these results suggest that the fungal ENB1 and bacterial ent genes were cooperatively integrated into a functional unit within the W/S clade that enabled adaptation to iron-limited environments. This integrated fungal-bacterial circuit and its dynamic evolution determine the extant distribution of yeast enterobactin producers and cheaters.

59 BASIC BIOLOGICAL SCIENCES↗