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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 253 records · Page 14
All sourcesNASA NTRSDOE OSTI
DOE OSTI2024

Investigation on gate oxide reliability under gate bias screening for commercial SiC planar and trench MOSFETs

This paper evaluates the impact of the fast high gate-voltage screening technique on gate oxide reliability of commercial 1.2 kV 4H-SiC power metal-oxide-semiconductor field-effect transistors (MOSFETs) with planar and trench gate structures. The measurements are conducted on packaged devices with the intent that the results will be applicable to wafer-level screening. The threshold voltage (V th ) of SiC MOSFETs is measured before and after various screening treatments and recovery process. In addition, constant-voltage time-dependent dielectric breakdown (TDDB) measurements are performed on SiC MOSFETs to obtain the intrinsic lifetime of gate oxide. The objective of this study is to determine the optimal screening conditions and improve screening efficiency without degradation of gate oxide reliability, such as V th shift and reduced oxide intrinsic lifetime. Due to the differences in the gate oxidation process and structural design of SiC planar and trench MOSFETs, the two types of devices exhibit different oxide reliability in the screening process. The recommended screening conditions obtained in this paper reveal that SiC trench MOSFETs can accept higher screening voltages compared to SiC planar MOSFETs. Hence, it can be concluded that more efficient screening techniques can be adopted for SiC MOSFETs with thicker gate oxide to meet the requirements of industrial applications.

36 MATERIALS SCIENCE↗
NASA NTRS1988

A test for interfacial effects and stress transfer in ceramic matrix composites

A test specimen was devised for measuring stress transfer between a high modulus fiber and a ceramic matrix. Single filaments of SiC were embedded in chemically vapor deposited SiC on a thin plate of molybdenum. The CVD overcoating which encapsulated the fiber was continuous with a coating of SiC on the molybdenum. When placed in a microtensile test device and loaded in the fiber direction, the fiber fracture characteristics provide information on the fiber/matrix adhesion and stress transfer. Problems were encountered due to the formation of a weak boundary between the SiC and the molybdenum which obviated any meaningful tensile tests. Also, the high CVD temperature used in fabricating these specimens restrict the fiber, matrix (and substrate) to materials having similar thermal coefficients of expansion in order to minimize thermal stresses.

Source record↗
NASA NTRS2004

Multi-functional micro electromechanical devices and method of bulk manufacturing same

A method of bulk manufacturing SiC sensors is disclosed and claimed. Materials other than SiC may be used as the substrate material. Sensors requiring that the SiC substrate be pierced are also disclosed and claimed. A process flow reversal is employed whereby the metallization is applied first before the recesses are etched into or through the wafer. Aluminum is deposited on the entire planar surface of the metallization. Photoresist is spun onto the substantially planar surface of the Aluminum which is subsequently masked (and developed and removed). Unwanted Aluminum is etched with aqueous TMAH and subsequently the metallization is dry etched. Photoresist is spun onto the still substantially planar surface of Aluminum and oxide and then masked (and developed and removed) leaving the unimidized photoresist behind. Next, ITO is applied over the still substantially planar surface of Aluminum, oxide and unimidized photoresist. Unimidized and exposed photoresist and ITO directly above it are removed with Acetone. Next, deep reactive ion etching attacks exposed oxide not protected by ITO. Finally, hot phosphoric acid removes the Al and ITO enabling wires to connect with the metallization. The back side of the SiC wafer may be also be etched.

Okojie, Robert S.↗
DOE OSTI2023

A Smart Silicon Carbide Power Module With Pulse Width Modulation Over Wi-Fi and Wireless Power Transfer-Enabled Gate Driver, Featuring Onboard State of Health Estimator and High-Voltage Scaling Capabilities

A wide range of utility applications require controllable switches with features such as high-voltage blocking and high-current carrying capacity, especially at high pulse width modulation (PWM) frequency. Low- and medium-voltage utility applications such as motor drives and flexible AC transmission systems as well as solid state transformers could also benefit from a low-cost high-voltage switching module. Wide-bandgap semiconductors such as silicon carbide (SiC) and gallium nitride (GaN) metal oxide semiconductor field effect transistors (MOSFETs) are considered to be the present and next-generation device choices, although they have limitations. For relatively high-voltage applications with demanding thermal management, SiC is still the only choice, and GaN dominates the low-voltage regime. This manuscript proposes a new half-bridge power MOSFET module that is suitable for conventional H-bridge of multilevel configurations used in high-voltage applications. Constructed from bare SiC dies, this half-bridge module takes advantage of (1) optimized MOSFET placement inside the module, (2) customized heat exchanger, manifold, and cooling, (3) integrated gate driver module with pulse width modulation (PWM) over wi-fi to eliminate the need for low-voltage signals, (4) wireless power transfer (WPT)-enabled gate driver and other ancillary circuits, (5) and the option to incorporate an onboard state-of-health (SOH) estimator module. The entire architecture has been designed and built at the National Renewable Energy Laboratory (NREL) in Golden, CO.

Ga2O3 devices↗
DOE OSTI2020

Plasma etching of wide bandgap and ultrawide bandgap semiconductors

The precise patterning of front-side mesas, backside vias, and selective removal of ternary alloys are all needed for power device fabrication in the various wide bandgap (AlGaN/GaN, SiC) and ultrawide bandgap (high Al-content alloys, boron nitride, Ga2O3, diamond) semiconductor technologies. The plasma etching conditions used are generally ion-assisted because of the strong bond strengths in these materials, and this creates challenges for the choice of masks in order to have sufficient selectivity over the semiconductor and to avoid mask erosion and micromasking issues. It can also be challenging to achieve practical etch rates without creating excessive damage in the patterned surface. The authors review the optimum choices for plasma chemistries for each of the semiconductors and acknowledge the pioneering work of John Coburn, who first delineated the ion-assisted etch mechanism.

42 ENGINEERING↗
NASA NTRS2002

High-Temperature Electronics: A Role for Wide Bandgap Semiconductors?

It is increasingly recognized that semiconductor based electronics that can function at ambient temperatures higher than 150 C without external cooling could greatly benefit a variety of important applications, especially-in the automotive, aerospace, and energy production industries. The fact that wide bandgap semiconductors are capable of electronic functionality at much higher temperatures than silicon has partially fueled their development, particularly in the case of SiC. It appears unlikely that wide bandgap semiconductor devices will find much use in low-power transistor applications until the ambient temperature exceeds approximately 300 C, as commercially available silicon and silicon-on-insulator technologies are already satisfying requirements for digital and analog very large scale integrated circuits in this temperature range. However, practical operation of silicon power devices at ambient temperatures above 200 C appears problematic, as self-heating at higher power levels results in high internal junction temperatures and leakages. Thus, most electronic subsystems that simultaneously require high-temperature and high-power operation will necessarily be realized using wide bandgap devices, once the technology for realizing these devices become sufficiently developed that they become widely available. Technological challenges impeding the realization of beneficial wide bandgap high ambient temperature electronics, including material growth, contacts, and packaging, are briefly discussed.

Neudeck, Philip G.↗
DOE OSTI2022

A High-Accuracy Power Loss Model of SiC MOSFETs in Current Source Inverter Considering Current Commutation and Parasitic Parameters

Power loss estimation of power electronic devices is important to the efficiency optimization of motor drives used in many applications. However, most existing simplified power loss models of silicon carbide (SiC) MOSFETs are not sufficiently accurate due to their neglect of parasitic parameters in the current commutation loop. In addition, the loss model of the voltage source inverter (VSI) cannot be directly applied to the current source inverter (CSI) because of differences between their commutation loops. First, the commutation processes for VSIs and CSIs are compared. The voltage and current trajectories of SiC MOSFETs in the switching transition of a CSI-based motor drive system are analyzed in detail. Based on these results, the conduction and switching losses of SiC MOSFETs in CSIs are modeled considering the current commutation details. In addition, the proposed analytical model includes parasitic inductances and capacitances in the current commutation loop. Experimental results have verified that the proposed power loss model delivers higher accuracy loss predictions than the conventional loss model.

current commutation, current source inverter, powe↗
DOE OSTI2025

Evaluating switch lifetime in soft-switched single-stage differential-mode SST

The reliability of semiconductor switches in single-stage differential-mode solid-state transformers (DM-SSTs) has not been systematically evaluated under soft-switching operation and realistic grid conditions. This paper presents a switch-level reliability analysis for soft-switched and hard-switched DM-SST configurations by integrating converter-specific power loss modeling with empirical lifetime prediction. Analytical derivation of device current profiles specific to the DM-SST is used to characterize electrothermal stress, which is then mapped to lifetime using degradation models obtained from power cycling tests (PCTs). Applied to realistic SST load profiles and grid voltage variations, this approach provides a probabilistic prediction of switch lifetime for the DM-SST. Lifetime estimates for both SiC MOSFETs and Si IGBTs are presented, offering insight into device degradation under converter operating conditions. The results quantify the reliability benefits of soft switching in single-stage SSTs, highlighting how switching dynamics influence long-term switch degradation.

14 SOLAR ENERGY↗
DOE OSTI2025

Photoconductive Semiconductor Switches: Materials, Physics, and Applications

Photoconductive semiconductor switching (PCSS) devices have unique characteristics to address the growing need for electrically isolated, optically gated, picosecond-scale jitter devices capable of operating at high voltage, current, and frequency. The state of the art in material selection, doping, triggering, and system integration in PCSSs is presented. The material properties and doping considerations of GaN, GaAs, SiC, diamond, and β-Ga2O3 in the fabrication of PCSS devices are discussed. A review of the current understanding of the physics of the high-gain mode known as lock-on is presented.

36 MATERIALS SCIENCE↗
NASA NTRS2020

Ultrafast Melting at Metal-Semiconductor Interfaces: A Molecular Dynamics Study

Quantifying the thermodynamics of interfacial melting is important for several applications such as laser machining and designing radiation hardened electronic devices. Due to the short time and length scales that are involved in the process, molecular simulations provide an ideal path for understating the interfacial melting phenomena. In this work we investigate tungsten (W) – silicon carbide (SiC) interfaces which are relevant in modern high-power electronic devices. Classical molecular dynamics simulations along with the two-temperature model (TTM) were used to study the radiation induced melting of the interface while a neural network-based machine learning framework was used to track the transient re-crystallization process. The damage endured by the semiconductor at the interface following the radiation event is discussed in detail while the re-crystallization of the metal is described in terms of the classical nucleation theory.

Ashwin Ravichandran↗
DOE OSTI2023

A New Class of SiC Power MOSFETs with Record-Low Resistance

Silicon carbide (SiC) power transistors are used in the main traction inverter of electric vehicles (EVs). Tesla began installing SiC power MOSFETs in 2017, and has now produced 4.8 million EVs containing over 169 million SiC power MOSFETs. Looking ahead, the worldwide EV market is projected to exceed 50 million vehicles per year by 2030 (Reuters, Oct. 25, 2022). This will create a demand for over two billion SiC power MOSFETs per year. Our program aims to double the efficiency of today's commercial power MOSFETs. This will cut the number of MOSFETs per EV in half, reducing cost, simplifying assembly, decreasing weight, and increasing vehicle reliability through reduced parts count. Our approach is to apply innovative design and advanced processing to increase the density of current-controlling channels in SiC power MOSFET. We have developed two new MOSFET devices, each of which increases the channel density by a factor of six over today's best commercial MOSFETs. This required implementing new fabrication processes, creating new device designs, and integrating the processing steps and device designs into a manufacturable technology. In this project we have developed two innovative devices: (i) a novel three-dimensional structure, the "tri-gate MOSFET," and (ii) a deeply-scaled, fully self-aligned trench MOSFET, the "IMOSFET". Both products were experimentally demonstrated during this project and meet the program goals of increased efficiency relative to the current state-of-the art commercial products. In the process we have generated significant IP, with two US patents issued and three applications pending. We have also published three journal articles and given reports on this technology at seven international conferences. The success of this program has led to significant follow-on funding from industry. In May 2023 Purdue University signed a five-year R&D contract with GlobalFoundries to transfer our novel technology to commercial production. With headquarters in Malta, NY, Global Foundries is one of the largest pure-play silicon foundries in the world, with annual revenue of $\$$8.1B. Their SiC foundry will be built around the next-generation 200-mm diameter SiC wafers, which will double the number of die per wafer and reduce per-die production cost.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗
DOE OSTI2022

Longevity evaluation of SiC based alpha voltaic batteries with surface alpha sources

The alpha emitting actinide 241 Am is electrodeposited on the surface of the Pt electrode of in-house fabricated SiC Schottky diodes. With 17 nCi 241 Am directly coated on the top of a device, the 2-pi geometry yields a high energy (5.486 MeV) and a long-term irradiation accumulating to a high fluence (1.6 × 10 9 alpha particles’ infusion/month). The forward, reverse I/V, and dark current, are periodically measured to monitor key characteristics of device durability for any sign of degradation over time. The direct deposition of actinides on the surface of the device also enables the evaluation of radiation damage through alpha particles’ energy spectroscopic performance, which shows a clear spectrum degradation that can be reversed by optical excitation of the device prior to spectrum acquisition. As an analytical aide, the device performance is also simulated by Allpix 2 . Lastly, this study provides an insight into the durability of 4H-SiC as an energy converter option for alpha-voltaic batteries and the survivability in the other harsh environment found in nuclear fuel cycle, high energy physics, fission, fusion, and space exploration where rad-hard sensors are required.

Americium↗
DOE OSTI2021

Evaluation of silicon carbide as a divertor armor material in DIII-D H-mode discharges

Silicon carbide (SiC) represents a promising but largely untested plasma-facing material (PFM) for next-step fusion devices. In this work, an analytic mixed-material erosion model is developed by calculating the physical (via SDTrimSP) and chemical (via empirical scalings) sputtering yield from SiC, Si, and C. The Si content in the near-surface SiC layer is predicted to increase during D plasma bombardment due to more efficient physical and chemical sputtering of C relative to Si. Silicon erosion from SiC thereby occurs primarily from sputtering of the enriched Si layer, rather than directly from the SiC itself. SiC coatings on ATJ graphite, manufactured via chemical vapor deposition, were exposed to repeated H-mode plasma discharges in the DIII-D tokamak to test this model. The qualitative trends from analytic modeling are reproduced by the experimental measurements, obtained via spectroscopic inference using the S/XB method. Quantitatively the model slightly under-predicts measured erosion rates, which is attributed to uncertainties in the ion impact angle distribution, as well as the effect of edge-localized modes. After exposure, minimal changes to the macroscopic or microscopic surface morphology of the SiC coatings were observed. Compositional analysis reveals Si enrichment of about 10%, in line with expectations from the erosion model. Extrapolating to a DEMO-type device, an order-of-magnitude decrease in impurity sourcing, and up to a factor of 2 decrease in impurity radiation, is expected with SiC walls, relative to graphite, if low C plasma impurity content can be achieved. Furthermore, these favorable erosion properties motivate further investigations of SiC as a low-Z, non-metallic PFM.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗
DOE OSTI2025

Amorphization and siliconization of silicon carbide as a first wall material

The understanding and prediction of silicon carbide (SiC) material evolution exposed to SOL plasma conditions is of prime interest because SiC represents a promising main chamber wall plasma-facing material for next-step fusion devices (low hydrogenic diffusion, good mechanical and thermal properties under neutron irradiation). Gross and net Si erosion rates from SiC surfaces in contact with a well-diagnosed L-mode plasma in the DIII-D tokamak have been simulated and the surface concentrations of impurities have been tracked as a function of time. Coupled simulation of surface model and impurity transport demonstrates amorphization of crystalline SiC exposed to L-mode plasma due to the accumulation of displacement damages under ion irradiation. This affects the lifetime of SiC plasma facing components. Surface evolution is tightly coupled to impurity transport in the plasma and therefore needs to be integrated with impurity transport simulations to effectively predict Si erosion rates and sub-surface concentrations as a function of time. The simulation workflow couples a semi-analytical surface model to the impurity transport code GITR. The surface model is a homogeneous mixed-material model that tracks physical & chemical sputtering and reflection of impurities. Gross erosion is primarily influenced by the background plasma parameters and redeposition patterns are mainly influenced by the prompt redeposition due to the gyro-orbits of impurity ions. Although crystalline form of SiC is preferable for fusion wall applications because of resistance to neutron irradiation, this work indicates that crystalline SiC will undergo amorphization under D plasma contact with implications of higher sputtering and fuel retention. These results direct us to explore the effects of amorphization on crystalline SiC and further the physics basis of SiC usage as first wall material for fusion environments.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗
DOE OSTI2021

Energy barriers for Dy and H penetrating graphene on 6 H -SiC(0001) and freestanding bilayer graphene from first-principles calculations

Currently, intercalation of foreign guest atoms into two-dimensional (2D) layered van der Waals materials is an active research area motivated in part by the development of next-generation energy-storage technologies and optoelectronic devices. One such extensively studied 2D material is the graphene-on-SiC system. To realize and control the desired intercalated structures, it is fundamentally important to understand the kinetic process of intercalation. For the intercalation of a guest atom into graphene layers on SiC substrate, a critical kinetic parameter is the energy barrier of a guest atom penetrating the perfect graphene top layer into the gallery under it. However, accurate theoretical calculations for such penetration barriers are unavailable in literature. From our first-principles density functional theory calculations, we obtain the global energy barriers of 3.47 and 1.80 eV for single Dy and H atoms penetrating the graphene top layer on a graphene buffer layer supported by a Si-terminated 6H-SiC(0001) substrate, respectively. Furthermore, for comparison as well as for examining the lateral strain effects, we also obtain the global barriers of 5.05 and 1.50 eV for single Dy and H atoms penetrating freestanding bilayer graphene with a tensile strain of about 8.8% to match our model for supported graphene, as well as the global barriers of 7.21 and 4.18 eV for penetrating unstrained freestanding bilayer graphene, respectively. From corresponding minimum energy paths with multiple energy minima and saddle points, we can also obtain various local energy barriers and the global backward barrier from the graphene gallery back to the top surface.

2D materials↗
DOE OSTI2022

A 4 kV/120 A SiC Solid-State DC Circuit Breaker Powered By a Load-Independent IPT System

This article introduces a 4 kV/120 A solid-state dc circuit breaker (DCCB) based on discrete SiC mosfets. The DCCB is designed in a five-layer tower structure. Each layer consists of a circular main conduction branch and an attached gate driver. There are two primary benefits of the proposed DCCB. First, it reduces conduction loss with multiple devices in parallel. Second, it achieves an ultrafast response speed with SiC mosfets. Moreover, the gate drivers of the DCCB are powered by a domino inductive power transfer (IPT) system. It achieves the load-independent constant-voltage output characteristics, which means the outputs are immune to load variations. Additionally, an IPT system prototype is implemented to test the power transfer performance. At 500-kHz frequency, the total output power reaches 15.73 W, which is sufficient to power on five gate drivers, with a peak transfer efficiency of 75.4%. The IPT system is tested to power a 4 kV/120 A DCCB prototype. It validates that the DCCB is effective to turn off 120 A current within 3.5 μs.

42 ENGINEERING↗
DOE OSTI2023

SiC Microchannel Heat Sinks for High Heat Flux Dissipation of 1 kW/cm 2

Thermal management has become a major barrier in the development of high-power micro-devices. Microchannel heat sinks (MCHS) are a promising method to dissipate high heat fluxes from high power density devices. Reducing the thermal resistance will reduce the temperature increase of the electronic device, allowing for higher powers to be achieved while maintaining a safe operating temperature. This paper reports on the use of silicon carbide (Sic) microchannels to dissipate high heat fluxes up to 1 kW/cm 2 over a footprint of 0.25 cm 2 . The use of high aspect ratio and decreased hydraulic diameter channels has allowed for very low thermal resistances to be achieved at higher heat duties compared to previous studies. The experiments performed resulted in heater temperatures of less than 60 °C and thermal resistances as low as 0.024 cm 2 . ° $C$/W between the heater surface and fluid inlet temperature. In conclusion, the demonstrated thermal performance of the SiC MCHS is an encouraging means for dissipating heat from high power density microelectronic devices.

42 ENGINEERING↗