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At least 235 records · Page 13

A superconducting nanowire binary shift register

We present a design for a superconducting nanowire binary shift register, which stores digital states in the form of circulating supercurrents in high-kinetic-inductance loops. Adjacent superconducting loops are connected with nanocryotrons, three-terminal electrothermal switches, and fed with an alternating two-phase clock to synchronously transfer the digital state between the loops. A two-loop serial-input shift register was fabricated with thin-film NbN and a bit error rate of less than 10 –4 was achieved, when operated at a maximum clock frequency of 83 MHz and in an out-of-plane magnetic field of up to 6 mT. A shift register based on this technology offers an integrated solution for low-power readout of superconducting nanowire single photon detector arrays and is capable of interfacing directly with room-temperature electronics and operating unshielded in high magnetic field environments.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Microwave microscope studies of trapped vortex dynamics in superconductors

Trapped vortices in superconductors introduce residual resistance in superconducting radio-frequency (SRF) cavities and disrupt the operation of superconducting quantum and digital electronic circuits. Understanding the detailed dynamics of trapped vortices under oscillating magnetic fields is essential for advancing these technologies. We have developed a near-field magnetic microwave microscope to study the dynamics of a limited number of trapped vortices under the probe when stimulated by a localized rf magnetic field. By measuring the local second-harmonic response (𝑃 2⁢f ) at subfemto-Watt levels, we isolate signals exclusively arising from trapped vortices, excluding contributions from surface defects and Meissner screening currents. Toy models of niobium superconductor hosting vortex pinning sites are introduced and studied with time-dependent Ginzburg-Landau (TDGL) simulations of probe/sample interaction to better understand the measured second-harmonic response. The simulation results demonstrate that the second-harmonic response of trapped vortex motion under a localized rf magnetic field shares key features with the experimental data. Here, this measurement technique provides access to vortex dynamics at the micrometer scale, such as depinning events and spatially resolved pinning properties, as demonstrated in measurements on a niobium film with an antidot flux pinning array.

43 PARTICLE ACCELERATORS↗

Probing critical phenomena in open quantum systems using atom arrays

At continuous phase transitions, quantum many-body systems exhibit complex, emergent behavior. Most notably, at a quantum critical point, correlations decay as a power law, with exponents determined by a set of universal scaling dimensions. Experimentally probing such power law correlations is extremely challenging, owing to the interplay between decoherence, the vanishing energy gap, and boundary effects. In this work, we used a Rydberg quantum simulator to adiabatically prepare critical ground states of both a one-dimensional ring and a two-dimensional square lattice. By accounting for and tuning the openness of our quantum system, which is well-captured by a single phenomenological length scale, we directly observed power law correlations and extracted the corresponding scaling dimensions. Our work complements recent studies of quantum criticality that use the Kibble-Zurek mechanism and digital quantum circuits.

Fang, Fang [Harvard Univ., Cambridge, MA (United S↗

New television camera eliminates vidicon tube

Small, lightweight camera systems use solid state imaging devices in the form of phototransistor mosaic sensors instead of vidicon tubes for light sensing and image conversion. The digital logic circuits scan the sensor mosaic at 60 frames per second to produce pictures composed of a series of dots rather than lines.

Source record↗

Solid-state switch increases switching speed

Solid state switch for commutating capacitors in an RC commutated network increases switching speed and extends the filtering or commutating frequency spectrum well into the kilocycle region. The switch is equivalent to the standard double- pole double-throw /DPDT/ relay and is driven from digital micrologic circuits.

Mc~gowan, G. F.↗

Program computes single-point failures in critical system designs

Computer program analyzes the designs of critical systems that will either prove the design is free of single-point failures or detect each member of the population of single-point failures inherent in a system design. This program should find application in the checkout of redundant circuits and digital systems.

Brown, W. R.↗

Advanced test techniques

Voltage margin tests, infrared scanning, and RF NOISE spectra measurements for digital test circuits

INFRARED SCANNER↗

Efficient digital comparison technique for logic circuits

Tolerance compare technique indicates discompare only when numerical difference value exceeds prescribed limit. Algorithm involving binary number properties is defined, in lieu of arithmetic operation which requires relatively complex circuitry. Extension of algorithm may be made to encompass tolerances other than one unit.

Mccarthy, C. E.↗

Analog-to-digital converter

An analog to digital converter circuit arrangement is reported that is suitable for use in ultra fast pulse height analysis. The circuit uses series connected tunnel diodes to quantize a voltage signal into discrete levels.

Lewyn, L. L.↗

A very high speed hard decision sequential decoder.

Description of a 40-megabit-per-second hard decision sequential decoder which employs the fastest commercially available digital integrated circuits - MECL III. With this decoder an internal computational rate of 70,000,000 computations per second has been achieved. The computational efficiency of the decoding algorithm has been improved by incorporating two modifications to the Fano algorithm - namely, 'double quick threshold loosening' and 'diagonal steps.' On the basis of preliminary results, an output error rate of 0.00001 can be achieved with E sub b/N sub zero less than 5.4 dB at data rates up to 40 megabits per second. The very high internal operating speed of the decoder represents a factor of five increase in speed over any previous sequential decoder.

Gilhousen, K. S.↗

A very high speed hard decision sequential decoder.

Description of a 40-Mbps hard-decision sequential decoder for high-data-rate coding systems for earth-orbiting space missions with power-limited links. A prototype decoder has been designed and fabricated using the fastest commercially available digital integrated circuits, MECL III. Thus far, an internal computational rate of 70 million computations per second has been achieved. Computational efficiency of the decoding algorithm was greatly improved by incorporating two modifications to the Fano algorithm - 'double quick threshold loosening' and 'diagonal steps.' Preliminary results indicate that an output error rate of 0.00001 can be achieved with E sub b/N sub zero less than 5.4 dB at data rates up to 40 Mbps. At lower data rates, even less signal energy is required. This decoder is believed to be at least five times faster than any previous sequential decoder.

Gilhousen, K. S.↗

Shuttle extravehicular activity signal processor pulse amplitude modulation decommutator

To provide data with long-term stability and accuracy, the pulse amplitude modulation (PAM) decommutator was synchronized to the PAM-return to zero wavetrain, and each channel was sampled with a common sample and hold circuit and digitized sequentially. The digital value of each channel was then scaled by the digital value of the calibration channels. The corrected digital value of each channel was stored for one complete frame and then transferred to the multiplexer-demultiplexer at a high rate in one block of serial digital data. A test model was built to demonstrate this design approach taken for the PAM decom and performance data was provided. The accuracies obtained with various signal to noise ratios are shown.

Noble, D. E.↗

Solid-state RF switch

Consisting of NAND gates, switch can be expanded to multipole input and can switch at frequencies up to 30MHz. Device uses digital integrated circuits to provide isolation between inputs and between input and output ports.

Hanna, M. F.↗