Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “programmable devices”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 217 records · Page 12
All sourcesNASA NTRSDOE OSTI
NASA NTRS2007

Filling the Assurance Gap on Complex Electronics

Many of the methods used to develop software bare a close resemblance to Complex Electronics (CE) development. CE are now programmed to perform tasks that were previously handled by software, such as communication protocols. For example, the James Webb Space Telescope will use Field Programmable Gate Arrays (FPGAs), which can have over a million logic gates, to send telemetry. System-on-chip (SoC) devices, another type of complex electronics, can combine a microprocessor, input and output channels, and sometimes an FPGA for programmability. With this increased intricacy, the possibility of software-like bugs such as incorrect design, logic, and unexpected interactions within the logic is great. Since CE devices are obscuring the hardware/software boundary, mature software methodologies have been proposed, with slight modifications, to develop these devices. By using standardized S/W Engineering methods such as checklists, missing requirements and bugs can be detected earlier in the development cycle, thus creating a development process for CE that can be easily maintained and configurable based on the device used.

Plastow, Richard A.↗
DOE OSTI2020

Measuring Cities with Software-Defined Sensors

The Chicago Array of Things (AoT) project, funded by the US National Science Foundation, created an experimental, urban-scale measurement capability to support diverse scientific studies. Initially conceived as a traditional sensor network, collaborations with many science communities guided the project to design a system that is remotely programmable to implement Artificial Intelligence (AI) within the devices-at the “edge” of the network-as a means for measuring urban factors that heretofore had only been possible with human observers, such as human behavior including social interaction. The concept of “software-defined sensors” emerged from these design discussions, opening new possibilities, such as stronger privacy protections and autonomous, adaptive measurements triggered by events or conditions. We provide examples of current and planned social and behavioral science investigations uniquely enabled by software-defined sensors as part of the SAGE project, an expanded follow-on effort that includes AoT.

97 MATHEMATICS AND COMPUTING↗
NASA NTRS1987

Implementation of a robotic flexible assembly system

As part of the Intelligent Task Automation program, a team developed enabling technologies for programmable, sensory controlled manipulation in unstructured environments. These technologies include 2-D/3-D vision sensing and understanding, force sensing and high speed force control, 2.5-D vision alignment and control, and multiple processor architectures. The subsequent design of a flexible, programmable, sensor controlled robotic assembly system for small electromechanical devices is described using these technologies and ongoing implementation and integration efforts. Using vision, the system picks parts dumped randomly in a tray. Using vision and force control, it performs high speed part mating, in-process monitoring/verification of expected results and autonomous recovery from some errors. It is programmed off line with semiautomatic action planning.

Benton, Ronald C.↗
NASA NTRS2001

Microshutter Arrays for the NGST NIRSpec

We are developing a programmable multiobject field selector for the NGST NIRSpec. This device is a microshutter array, a close-packed 2000 x 2000 array of 100 micrometer x 100 micrometer shutters fabricated with Micro-ElectroMechanical Systems (MEMS) technologies. The shutters are opened using a magnet scanned over the array. The shutters are held open by electrostatic potentials on adjacent vertical electrodes. Modeling of the magnetic actuation of the microshutters allowed optimization of the magnetic field configuration, the distance between magnet and shutters, and the force and torque produced by the magnet. The results of laboratory tests are consistent with our modeling. We have demonstrated actuation, latching and addressing. We are able to rotate shutters out of the plane up to 90 degree and more, to latch them electrostatically to the walls and release them selectively. During the last six month all critical elements of the array have been demonstrated. Fabrication processes were developed to deposit vertical electrodes on support grid side walls and insulated light-shields that block the gaps between shutters and the support grid. Physical optics analysis was performed to assess the expected optical performance of the microshutters. A preliminary Fourier optics analysis on the microshutter array performance has been carried out. More detailed analysis of wave propagation through 3D structures is a next step. An optical test station for verifying optical parameters of the shutter array at room temperature has been developed. It allows to measure parameters, such as transmission, scattering, contrast ratio, and diffraction of the array structure. Initial data have been acquired and are being analyzed and compared to theoretical predictions.

Moseley, Harvey↗
NASA NTRS2007

Risk Reduction for Use of Complex Devices in Space Projects

We present guidel!nes to reduce risk to an acceptable level when using complex devices in space applications. Application to Virtex 4 Field Programmable Gate Array (FPGA) on Express Logistic Carrier (ELC) project is presented.

Berg, Melanie↗
NASA NTRS2009

Digital Beamforming Scatterometer

This paper discusses scatterometer measurements collected with multi-mode Digital Beamforming Synthetic Aperture Radar (DBSAR) during the SMAP-VEX 2008 campaign. The 2008 SMAP Validation Experiment was conducted to address a number of specific questions related to the soil moisture retrieval algorithms. SMAP-VEX 2008 consisted on a series of aircraft-based.flights conducted on the Eastern Shore of Maryland and Delaware in the fall of 2008. Several other instruments participated in the campaign including the Passive Active L-Band System (PALS), the Marshall Airborne Polarimetric Imaging Radiometer (MAPIR), and the Global Positioning System Reflectometer (GPSR). This campaign was the first SMAP Validation Experiment. DBSAR is a multimode radar system developed at NASA/Goddard Space Flight Center that combines state-of-the-art radar technologies, on-board processing, and advances in signal processing techniques in order to enable new remote sensing capabilities applicable to Earth science and planetary applications [l]. The instrument can be configured to operate in scatterometer, Synthetic Aperture Radar (SAR), or altimeter mode. The system builds upon the L-band Imaging Scatterometer (LIS) developed as part of the RadSTAR program. The radar is a phased array system designed to fly on the NASA P3 aircraft. The instrument consists of a programmable waveform generator, eight transmit/receive (T/R) channels, a microstrip antenna, and a reconfigurable data acquisition and processor system. Each transmit channel incorporates a digital attenuator, and digital phase shifter that enables amplitude and phase modulation on transmit. The attenuators, phase shifters, and calibration switches are digitally controlled by the radar control card (RCC) on a pulse by pulse basis. The antenna is a corporate fed microstrip patch-array centered at 1.26 GHz with a 20 MHz bandwidth. Although only one feed is used with the present configuration, a provision was made for separate corporate feeds for vertical and horizontal polarization. System upgrades to dual polarization are currently under way. The DBSAR processor is a reconfigurable data acquisition and processor system capable of real-time, high-speed data processing. DBSAR uses an FPGA-based architecture to implement digitally down-conversion, in-phase and quadrature (I/Q) demodulation, and subsequent radar specific algorithms. The core of the processor board consists of an analog-to-digital (AID) section, three Altera Stratix field programmable gate arrays (FPGAs), an ARM microcontroller, several memory devices, and an Ethernet interface. The processor also interfaces with a navigation board consisting of a GPS and a MEMS gyro. The processor has been configured to operate in scatterometer, Synthetic Aperture Radar (SAR), and altimeter modes. All the modes are based on digital beamforming which is a digital process that generates the far-field beam patterns at various scan angles from voltages sampled in the antenna array. This technique allows steering the received beam and controlling its beam-width and side-lobe. Several beamforming techniques can be implemented each characterized by unique strengths and weaknesses, and each applicable to different measurement scenarios. In Scatterometer mode, the radar is capable to.generate a wide beam or scan a narrow beam on transmit, and to steer the received beam on processing while controlling its beamwidth and side-lobe level. Table I lists some important radar characteristics

Rincon, Rafael F.↗
NASA NTRS2024

Single-Event Effects Test Report Lattice Semiconductor, LCMXO3D-9400HC-5BG484I Field Programmable Gate Array

The purpose of this test was to characterize single event effects (SEE) in the LCMXO3D-9400HC-5BG484I, a low power and low density field programmable gate array (FPGA). The SEE concerns for the device that were investigated in this testing are single event upsets (SEUs) in the configuration static random-access memory (SRAM), SEUs in the FPGA fabric, single event latch up (SEL), and single event functional interrupts (SEFIs). Testing was conducted at Lawrence Berkeley National Laboratory (LBNL) on August 26th, 2024 and August 28th, 2024.

Adia M Wood↗
DOE OSTI2021

Cycle accurate and cycle reproducible memory for an FPGA based hardware accelerator

A method, system and computer program product are disclosed for using a Field Programmable Gate Array (FPGA) to simulate operations of a device under test (DUT). The DUT includes a device memory having a number of input ports, and the FPGA is associated with a target memory having a second number of input ports, the second number being less than the first number. In one embodiment, a given set of inputs is applied to the device memory at a frequency Fd and in a defined cycle of time, and the given set of inputs is applied to the target memory at a frequency Ft. Ft is greater than Fd and cycle accuracy is maintained between the device memory and the target memory. In an embodiment, a cycle accurate model of the DUT memory is created by separating the DUT memory interface protocol from the target memory storage array.

Asaad, Sameh W.↗
NASA NTRS1993

Programmable DMA controller

In a data system having a memory, plural input/output (I/O) devices and a bus connecting each of the I/O devices to the memory, a direct memory access (DMA) controller regulating access of each of the I/O devices to the bus, including a priority register storing priorities of bus access requests from the I/O devices, an interrupt register storing bus access requests of the I/O devices, a resolver for selecting one of the I/O devices to have access to the bus, a pointer register storing addresses of locations in the memory for communication with the one I/O device via the bus, a sequence register storing an address of a location in the memory containing a channel program instruction which is to be executed next, an ALU for incrementing and decrementing addresses stored in the pointer register, computing the next address to be stored in the sequence register, computing an initial contents of each of the register. The memory contains a sequence of channel program instructions defining a set up operation wherein the contents of each of the registers in the channel register is initialized in accordance with the initial contents computed by the ALU and an access operation wherein data is transferred on the bus between a location in the memory whose address is currently stored in the pointer register and the one I/O device enabled by the resolver.

Hendry, David F.↗
DOE OSTI2022

KokkACC: Enhancing Kokkos with OpenACC

Template metaprogramming is gaining popularity as a high-level solution for achieving performance portability on heterogeneous computing resources. Kokkos is a representative approach that offers programmers high-level abstractions for generic programming while most of the device-specific code generation and optimizations are delegated to the compiler through template specializations. For this, Kokkos provides a set of device-specific code specializations in multiple back ends, such as CUDA and HIP. Unlike CUDA or HIP, OpenACC is a high-level and directive-based programming model. This descriptive model allows developers to insert hints (pragmas) into their code that help the compiler to parallelize the code. The compiler is responsible for the transformation of the code, which is completely transparent to the programmer. This paper presents an OpenACC back end for Kokkos: KokkACC. As an alternative to Kokkos’s existing device-specific back ends, KokkACC is a multi-architecture back end providing a high-productivity programming environment enabled by OpenACC’s high-level and descriptive programming model. Moreover, we have observed competitive performance; in some cases, KokkACC is faster (up to 9×) than NVIDIA’s CUDA back end and much faster than OpenMP’s GPU offloading back end. This work also includes implementation details and a detailed performance study conducted with a set of mini-benchmarks (AXPY and DOT product) and three mini-apps (LULESH, miniFE and SNAP, a LAMMPS proxy mini-app).

Valero Lara, Pedro↗
NASA NTRS2009

NASA Tech Briefs, October 2009

Topics covered include: Light-Driven Polymeric Bimorph Actuators; Guaranteeing Failsafe Operation of Extended-Scene Shack-Hartmann Wavefront Sensor Algorithm; Cloud Water Content Sensor for Sounding Balloons and Small UAVs; Pixelized Device Control Actuators for Large Adaptive Optics; T-Slide Linear Actuators; G4FET Implementations of Some Logic Circuits; Electrically Variable or Programmable Nonvolatile Capacitors; System for Automated Calibration of Vector Modulators; Complementary Paired G4FETs as Voltage-Controlled NDR Device; Three MMIC Amplifiers for the 120-to-200 GHz Frequency Band; Low-Noise MMIC Amplifiers for 120 to 180 GHz; Using Ozone To Clean and Passivate Oxygen-Handling Hardware; Metal Standards for Waveguide Characterization of Materials; Two-Piece Screens for Decontaminating Granular Material; Mercuric Iodide Anticoincidence Shield for Gamma-Ray Spectrometer; Improved Method of Design for Folding Inflatable Shells; Ultra-Large Solar Sail; Cooperative Three-Robot System for Traversing Steep Slopes; Assemblies of Conformal Tanks; Microfluidic Pumps Containing Teflon[Trademark] AF Diaphragms; Transparent Conveyor of Dielectric Liquids or Particles; Multi-Cone Model for Estimating GPS Ionospheric Delays; High-Sensitivity GaN Microchemical Sensors; On the Divergence of the Velocity Vector in Real-Gas Flow; Progress Toward a Compact, Highly Stable Ion Clock; Instruments for Imaging from Far to Near; Reflectors Made from Membranes Stretched Between Beams; Integrated Risk and Knowledge Management Program -- IRKM-P; LDPC Codes with Minimum Distance Proportional to Block Size; Constructing LDPC Codes from Loop-Free Encoding Modules; MMICs with Radial Probe Transitions to Waveguides; Tests of Low-Noise MMIC Amplifier Module at 290 to 340 GHz; and Extending Newtonian Dynamics to Include Stochastic Processes.

Source record↗
DOE OSTI2023

Generalized Theory and Realization of Continuously Loss-Programmable Bandpass Filtering Attenuators

With the increased demand for modern wireless systems in various applications, the need for adjustable radio frequency (RF) systems has dramatically increased. These modern systems rely on operating in the microwave frequency spectrum (1 GHz to 1 THz) without interference from other devices while also retaining the ability to detect very low and very high power signals simultaneously. There is also an ever-increasing demand for reducing the cost, size, weight, and power (C-SWaP) of these modern RF systems, driving the demand for more agile filters in the microwave frequency spectrum. In this paper, a generalized theory of bandpass filtering attenuators (filtenuators) is proposed. A filtenuator is a device that combines the frequency- selective characteristics of a filter and the loss-programmable characteristics of an attenuator into a single component. The loss- programmable aspect of the filtenuator is based on the tuning of a π-network of resistances, which are implemented using PIN diodes to control the individual resistance values electronically. A loss-programmable, third-order Chebyshev bandpass filtenuator is designed, fabricated, and measured to verify the generalized theory. The filtenuator is designed to operate at 1 GHz and have a tunable attenuation range of 2-10 dB. This proposed filtenuator demonstrates the feasibility of a tunable, low C-SWaP solution to increase RF system dynamic range and a design process that allows for future development of filtenuators.

42 ENGINEERING↗
DOE OSTI2021

Wireless optofluidic systems for programmable in vivo pharmacology and optogenetics

Provided are implantable, injectable and/or surface mounted biomedical devices and related methods for interfacing with a target tissue. The devices have a substrate, one or more microfluidic channels embedded in or supported by the substrate and a fluid actuator in operational communication with one or more reservoirs and responsive to a wireless control signal. The components of the device are specially configured and packaged to be ultra-thin and mechanically compliant. In some embodiments, the devices are self-powered and fully implantable. The devices can be shaped to provide injection in a minimally invasive manner, thereby avoiding unnecessary tissue damage and providing a platform for long-term implantation for interfacing with biological tissue.

Rogers, John A.↗
DOE OSTI2026

High-bandwidth frequency domain multiplexed readout of transition-edge sensors for neutrinoless double beta decay searches

The next-generation of cryogenic neutrinoless double-beta decay experiments require increasingly fast readout in order to improve background discrimination. These experiments, operated as cryogenic calorimeters at ∼ 10 mK, are usually read out by high-impedance neutron transmutation doped (NTD) thermistors, which provide good energy resolution, but are limited by ∼ 1 ms response times. Superconducting detectors, such as transition-edge sensors (TESs) with a time resolution of ∼ 100 μs, offer superior timing performance over NTD semiconductor bolometers. To make this technology viable for an application to a thousand or more channels, multiplexed readout is necessary in order to minimize the thermal load and radioactive contamination induced by the readout. Frequency-domain multiplexing readout (fMUX) for TESs, previously developed at Berkeley Lab and McGill University, is currently in use for mm-wave telescopes with detector sampling rates in the order of 100 Hz. We demonstrate a new readout system, based on the McGill/Berkeley digital fMux readout, to satisfy the higher bandwidth and noise requirements of the next generation of TES-instrumented cryogenic calorimeters. Each multiplexing readout module comprises 10 superconducting resonators in the 1–5 MHz range and a DC superconducting quantum interference device (DC-SQUID), interfaced to high-speed field programmable gate array (FPGA)-based electronics for digital signal processing and low-latency SQUID feedback. The new readout samples detectors at 156 kHz, three orders of magnitude faster than its cosmology-oriented predecessor, and demonstrates a stable feedback bandwidth of 3 kHz in a real TES-based system.

47 OTHER INSTRUMENTATION↗
NASA NTRS1992

ACSYNT - A standards-based system for parametric, computer aided conceptual design of aircraft

A group of eight US aerospace companies together with several NASA and NAVY centers, led by NASA Ames Systems Analysis Branch, and Virginia Tech's CAD Laboratory agreed, through the assistance of Americal Technology Initiative, in 1990 to form the ACSYNT (Aircraft Synthesis) Institute. The Institute is supported by a Joint Sponsored Research Agreement to continue the research and development in computer aided conceptual design of aircraft initiated by NASA Ames Research Center and Virginia Tech's CAD Laboratory. The result of this collaboration, a feature-based, parametric computer aided aircraft conceptual design code called ACSYNT, is described. The code is based on analysis routines begun at NASA Ames in the early 1970's. ACSYNT's CAD system is based entirely on the ISO standard Programmer's Hierarchical Interactive Graphics System and is graphics-device independent. The code includes a highly interactive graphical user interface, automatically generated Hermite and B-Spline surface models, and shaded image displays. Numerous features to enhance aircraft conceptual design are described.

Jayaram, S.↗
NASA NTRS2005

Hardware platforms for MEMS gyroscope tuning based on evolutionary computation using open-loop and closed -loop frequency response

We propose a tuning method for MEMS gyroscopes based on evolutionary computation to efficiently increase the sensitivity of MEMS gyroscopes through tuning. The tuning method was tested for the second generation JPL/Boeing Post-resonator MEMS gyroscope using the measurement of the frequency response of the MEMS device in open-loop operation. We also report on the development of a hardware platform for integrated tuning and closed loop operation of MEMS gyroscopes. The control of this device is implemented through a digital design on a Field Programmable Gate Array (FPGA). The hardware platform easily transitions to an embedded solution that allows for the miniaturization of the system to a single chip.

evolvable hardware↗
NASA NTRS2005

A Hardware Platform for Tuning of MEMS Devices Using Closed-Loop Frequency Response

We report on the development of a hardware platform for integrated tuning and closed-loop operation of MEMS gyroscopes. The platform was developed and tested for the second generation JPL/Boeing Post-Resonator MEMS gyroscope. The control of this device is implemented through a digital design on a Field Programmable Gate Array (FPGA). A software interface allows the user to configure, calibrate, and tune the bias voltages on the micro-gyro. The interface easily transitions to an embedded solution that allows for the miniaturization of the system to a single chip.

gyroscope controls↗
DOE OSTI2023

Creating a Digital Twin for a Hydropower System through 3D Object Modeling: Alder Dam FY23

Hydropower stands as the world's leading source of renewable electricity, with hydropower plants spanning the globe. A typical hydropower plant comprises essential components including the governor, excitation system, generator, thrust bearing, hydraulic turbine, transformer, main lead, metering and control devices, tailwater depression system, and dissolved oxygen monitoring. Each of these components undergoes various measures and monitoring procedures. These measurements are collected through a diverse array of systems, encompassing standalone sensors, programmable logic controllers (PLCs), Supervisory Control and Data Acquisition (SCADA) systems, Internet of Things (IoT) devices, and data acquisition and integration platforms like OSI/PI.

13 HYDRO ENERGY↗