Engineering PapersSearch

NASA NTRS · 20060044400

Hardware platforms for MEMS gyroscope tuning based on evolutionary computation using open-loop and closed -loop frequency response

Abstract

We propose a tuning method for MEMS gyroscopes based on evolutionary computation to efficiently increase the sensitivity of MEMS gyroscopes through tuning. The tuning method was tested for the second generation JPL/Boeing Post-resonator MEMS gyroscope using the measurement of the frequency response of the MEMS device in open-loop operation. We also report on the development of a hardware platform for integrated tuning and closed loop operation of MEMS gyroscopes. The control of this device is implemented through a digital design on a Field Programmable Gate Array (FPGA). The hardware platform easily transitions to an embedded solution that allows for the miniaturization of the system to a single chip.

Explore related subjects

Keep this discovery

Explore connections, maps & timelines

BibTeXRIS

Keymeulen, Didier, Ferguson, Michael I., Fink, Wolfgang, Oks, Boris, Peay, Chris, Terrile, Richard, Cheng, Yen, Kim, Dennis, MacDonald, Eric, Foor, David. 2005-09-12. Hardware platforms for MEMS gyroscope tuning based on evolutionary computation using open-loop and closed -loop frequency response. https://ntrs.nasa.gov/citations/20060044400

Cite the original work for its findings. Save a collection to share your selection of sources.

KEEP EXPLORING

Related reports

Extreme Temperature Electronics Using a Reconfigurable Analog Array

Temperature and radiation tolerant electronics, as well as long life survivability are key capabilities required for future NASA missions. Current approaches to electronics for extreme environments focus on component level robustness and hardening. Compensation techniques such as bias cancellation circuitry have also been employed. However, current technology can only ensure very limited lifetime in extreme environments. Previous work presented a novel approach, based on evolvable hardware technology, which allows adaptive in-situ circuit redesign/reconfiguration during operation in extreme environments. This technology would complement material/device advancements and increase the mission capability to survive harsh environments. This work describes a new reconfigurable analog chip developed by JPL and SPAWAR that is targeted for extreme temperature and evolutionary hardware experiments. Being based on Gm-C technology, this chip can have its functionality tuned and adapted to extreme temperatures through voltage bias adjustment. This tuning process will be controlled by Evolutionary Algorithms. This paper presents details of the reconfigurable analog chip as well as a system level overview. Some early experiments are also described.

evolvable hardware

Data Converters Performance at Extreme Temperatures

Space missions often require radiation and extreme-temperature hardened electronics to survive the harsh environments beyond earth's atmosphere. Traditional approaches to preserve electronics incorporate shielding, insulation and redundancy at the expense of power and weight. However, a novel way of bypassing these problems is the concept of evolutionary hardware. A reconfgurable device, consisting of several switches interconnected with analog/digital parts, is controlled by an evolutionary processor (EP). When the EP detects degradation in the circuit it sends signals to reconfgure the switches, thus forming a new circuit with the desired output. This concept has been developed since the mid-90s, but one problem remains - the EP cannot degrade substantially. For this reason, extensive testing at extreme temperatures (-180' to 120(deg)C) has been done on devices found on FPGA boards (taking the role of the EP) such as the Analog to Digital and the Digital to Analog Converter. Analysis of the results has shown that FPGA boards implementing EP with some compensation may be a practical solution to evolving circuits. This paper describes results on the tests of data converters at extreme temperatures.

evolvable hardware

Intrinsic evolution of controllable oscillators in FPTA-2

Simple one- and two-bit controllable oscillators were intrinsically evolved using only four cells of Field Programmable Transistor Array (FPTA-2). These oscillators can produce different oscillations for different setting of control signals. Therefore, they could be used, in principle, to compose complex networks of oscillators that could exhibit rich dynamical behavior in order to perform a computation or to model a desired system.

evolvable hardware