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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 217 records · Page 12
All sourcesNASA NTRSDOE OSTI
NASA NTRS1986

Is random access memory random?

Most software is contructed on the assumption that the programs and data are stored in random access memory (RAM). Physical limitations on the relative speeds of processor and memory elements lead to a variety of memory organizations that match processor addressing rate with memory service rate. These include interleaved and cached memory. A very high fraction of a processor's address requests can be satified from the cache without reference to the main memory. The cache requests information from main memory in blocks that can be transferred at the full memory speed. Programmers who organize algorithms for locality can realize the highest performance from these computers.

Denning, P. J.↗
NASA NTRS1990

Prefetching in file systems for MIMD multiprocessors

The question of whether prefetching blocks on the file into the block cache can effectively reduce overall execution time of a parallel computation, even under favorable assumptions, is considered. Experiments have been conducted with an interleaved file system testbed on the Butterfly Plus multiprocessor. Results of these experiments suggest that (1) the hit ratio, the accepted measure in traditional caching studies, may not be an adequate measure of performance when the workload consists of parallel computations and parallel file access patterns, (2) caching with prefetching can significantly improve the hit ratio and the average time to perform an I/O (input/output) operation, and (3) an improvement in overall execution time has been observed in most cases. In spite of these gains, prefetching sometimes results in increased execution times (a negative result, given the optimistic nature of the study). The authors explore why it is not trivial to translate savings on individual I/O requests into consistently better overall performance and identify the key problems that need to be addressed in order to improve the potential of prefetching techniques in the environment.

Kotz, David F.↗
NASA NTRS1994

Empirical study of parallel LRU simulation algorithms

This paper reports on the performance of five parallel algorithms for simulating a fully associative cache operating under the LRU (Least-Recently-Used) replacement policy. Three of the algorithms are SIMD, and are implemented on the MasPar MP-2 architecture. Two other algorithms are parallelizations of an efficient serial algorithm on the Intel Paragon. One SIMD algorithm is quite simple, but its cost is linear in the cache size. The two other SIMD algorithm are more complex, but have costs that are independent on the cache size. Both the second and third SIMD algorithms compute all stack distances; the second SIMD algorithm is completely general, whereas the third SIMD algorithm presumes and takes advantage of bounds on the range of reference tags. Both MIMD algorithm implemented on the Paragon are general and compute all stack distances; they differ in one step that may affect their respective scalability. We assess the strengths and weaknesses of these algorithms as a function of problem size and characteristics, and compare their performance on traces derived from execution of three SPEC benchmark programs.

Carr, Eric↗
NASA NTRS1992

Becoming Reactive by Concretization

One way to build a reactive system is to construct an action table indexed by the current situation or stimulus. The action table describes what course of action to pursue for each situation or stimulus. This paper describes an incremental approach to constructing the action table through achieving goals with a hierarchical search system. These hierarchies are generated with transformations called concretizations, which add constraints to a problem and which can reduce the search space. The basic idea is that an action for a state is looked up in the action table and executed whenever the action table has an entry for that state; otherwise, a path is found to the nearest (cost-wise in a graph with costweighted arcs) state that has a mappring from a state in the next highest hierarchy. For each state along the solution path, the successor state in the path is cached in the action table entry for that state. Without caching, the hierarchical search system can logarithmically reduce search. When the table is complete the system no longer searches: it simply reacts by proceeding to the state listed in the table for each state. Since the cached information is specific only to the nearest state in the next highest hierarchy and not the goal, inter-goal transfer of reactivity is possible. To illustrate our approach, we show how an implemented hierarchical search system can completely reactive.

Prieditis, Armand↗
NASA NTRS1986

The Science of Computing: Virtual Memory

In the March-April issue, I described how a computer's storage system is organized as a hierarchy consisting of cache, main memory, and secondary memory (e.g., disk). The cache and main memory form a subsystem that functions like main memory but attains speeds approaching cache. What happens if a program and its data are too large for the main memory? This is not a frivolous question. Every generation of computer users has been frustrated by insufficient memory. A new line of computers may have sufficient storage for the computations of its predecessor, but new programs will soon exhaust its capacity. In 1960, a longrange planning committee at MIT dared to dream of a computer with 1 million words of main memory. In 1985, the Cray-2 was delivered with 256 million words. Computational physicists dream of computers with 1 billion words. Computer architects have done an outstanding job of enlarging main memories yet they have never kept up with demand. Only the shortsighted believe they can.

Denning, Peter J.↗
NASA NTRS2014

ROPEC - ROtary PErcussive Coring Drill for Mars Sample Return

The ROtary Percussive Coring Drill is a light weight, flight-like, five-actuator drilling system prototype designed to acquire core material from rock targets for the purposes of Mars Sample Return. In addition to producing rock cores for sample caching, the ROPEC drill can be integrated with a number of end effectors to perform functions such as rock surface abrasion, dust and debris removal, powder and regolith acquisition, and viewing of potential cores prior to caching. The ROPEC drill and its suite of end effectors have been demonstrated with a five degree of freedom Robotic Arm mounted to a mobility system with a prototype sample cache and bit storage station.

Chu, Philip↗
NASA NTRS2017

X-Ray Computed Tomography: The First Step in Mars Sample Return Processing

The Mars 2020 rover mission will collect and cache samples from the martian surface for possible retrieval and subsequent return to Earth. If the samples are returned, that mission would likely present an opportunity to analyze returned Mars samples within a geologic context on Mars. In addition, it may provide definitive information about the existence of past or present life on Mars. Mars sample return presents unique challenges for the collection, containment, transport, curation and processing of samples [1] Foremost in the processing of returned samples are the closely paired considerations of life detection and Planetary Protection. In order to achieve Mars Sample Return (MSR) science goals, reliable analyses will depend on overcoming some challenging signal/noise-related issues where sparse martian organic compounds must be reliably analyzed against the contamination background. While reliable analyses will depend on initial clean acquisition and robust documentation of all aspects of developing and managing the cache [2], there needs to be a reliable sample handling and analysis procedure that accounts for a variety of materials which may or may not contain evidence of past or present martian life. A recent report [3] suggests that a defined set of measurements should be made to effectively inform both science and Planetary Protection, when applied in the context of the two competing null hypotheses: 1) that there is no detectable life in the samples; or 2) that there is martian life in the samples. The defined measurements would include a phased approach that would be accepted by the community to preserve the bulk of the material, but provide unambiguous science data that can be used and interpreted by various disciplines. Fore-most is the concern that the initial steps would ensure the pristine nature of the samples. Preliminary, non-invasive techniques such as computed X-ray tomography (XCT) have been suggested as the first method to interrogate and characterize the cached samples without altering the materials [1,2]. A recent report [4] indicates that XCT may minimally alter samples for some techniques, and work is needed to quantify these effects, maximizing science return from XCT initial analysis while minimizing effects.

Welzenbach, L. C.↗
NASA NTRS2019

Organic and inorganic contamination control approaches for return sample investigation on Mars 2020

The Mars 2020 Rover mission will have the capability to collect and cache samples for potential Mars sample return. Specifically, the sample caching system (SCS) is designed for coring Mars samples and acquiring regolith samples as well as handling, sealing and caching on Mars. As the potential first Martian samples that could be returned to Earth, assuring low levels of terrestrial contamination is of the utmost concern. In developing the SCS, the project prioritizes limiting sample contamination in organic, inorganic and biological areas. The focus of this paper is on the strategies being implemented to limit terrestrial organic and inorganic contamination in the samples.

Steltzner, Adam↗
NASA NTRS2022

Identifying Shocked Feldspar on Mars Using Perseverance Spectroscopic Instruments: Implications for Geochronology Studies on Returned Samples

The Perseverance rover (Mars 2020) mission, the first step in NASA’s Mars Sample Return (MSR) program, will select samples for caching based on their potential to improve understanding Mars’ astrobiological, geological, geochemical, and climatic evolution. Geochronologic analyses will be among the key measurements planned for returned samples. Assessing a sample’s shock history will be critical because shock metamorphism could influence apparent sample age. Shock effects in one Mars-relevant mineral class, plagioclase feldspar, have been well- documented using various spectroscopy techniques (thermal infrared reflectance, emission, and transmission spectroscopy, Raman, and luminescence). A subset of these data will be obtained with the SuperCam and SHERLOC (Scanning Habitable Environments with Raman & Luminescence for Organics & Chemicals) instruments onboard Perseverance to inform caching decisions for MSR. Here, we review shock indicators in plagioclase feldspar as revealed in Raman, luminescence, and IR spectroscopy lab data, with an emphasis on Raman spectroscopy. We consider how this information may inform caching decisions for selecting optimal samples for geochronology measurements. We then identify challenges and make recommendations for both in situ measurements performed with SuperCam and SHERLOC and for supporting lab studies to enhance the success of geochronologic analyses after return to Earth.

mars↗
NASA NTRS2025

A Minority Report Submitted as an Addendum to the Report of the Mars 2020 Organic Contamination Panel

This Minority Report (MR) presents seven findings in addition to or contrary to the main OCP report: 1. Contamination control for the Mars 2020 cache must be strict. Mars’ surface is known to be organics-poor from laboratory studies, Mars meteorite analyses, and from four previous NASA missions. It is imperative that contamination control measures are enacted that enable reliable and robust detection of potential biomarker compounds at the ppb level. 2. Since Mars 2020 is a sample return mission and analyses of samples in the returnable cache are expected to occur after return to Earth, positive controls are not recommended for flight on Mars 2020 unless a compelling case can be made for their use. 3. The findings of previous panels dedicated to organic compound analysis in Martian samples (OCSSG, ND-SAG, SDT) recommend TOC limits between 10-40 ppb. The MR finds that the lower limit of 10 ppb is recommended and that insufficient justification is given by the OCP Panel Report (PR) to raise the TOC limit to 40 ppb. 4. Analytical capability is sufficiently advanced that analytical capability is an irrelevant consideration with respect to differentiating between 10 and 40 ppb TOC. 5. Perceived contamination control challenges are an irrelevant consideration for raising the TOC contamination limit from 10 to 40 ppb since those challenges, and the procedures to ameliorate them, will exist regardless of whether the limit is 10 or 40 ppb. 6. The “dilution cleaning” method has not been adequately proven for utilization on the Mars 2020 mission. Shortcomings have been identified in terms of peer review, method verification, analytical and testing approach, application to space flight hardware, and performance under Martian conditions. The method should be revisited and independently tested using statistically and analytically robust methods, and scrutinized in a rigorous peer review process. 7. The Mars 2020 mission claims considerable heritage from the Mars Science Laboratory (MSL) mission, but MSL contamination control efforts contain significant errors and implementation discrepancies that would imperil the Mars 2020 caching mission were they repeated. A standing contamination control panel should be formed to provide independent oversight for the Mars 2020 mission.

Mars Sample Return↗
DOE OSTI2018

Multiple-core computer processor for reverse time migration

A multi-core computer processor including a plurality of processor cores interconnected in a Network-on-Chip (NoC) architecture, a plurality of caches, each of the plurality of caches being associated with one and only one of the plurality of processor cores, and a plurality of memories, each of the plurality of memories being associated with a different set of at least one of the plurality of processor cores and each of the plurality of memories being configured to be visible in a global memory address space such that the plurality of memories are visible to two or more of the plurality of processor cores, wherein at least one of a number of the processor cores, a size of each of the plurality of caches, or a size of each of the plurality of memories is configured for performing a reverse-time-migration (RTM) computation.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2020

Resolution system that provides access to remote data locally

A system and method that provides access to remote data locally by identifying and downloading linked content from a plurality of remote sources through a communication network; decomposing the downloaded content into local content elements by intercepting links between the content elements and mapping the intercepted links to redirected links that locate the same download content in a local cache or a local server proxy; identifying remote devices requesting access to the local cache or the local server proxy and the device's functionality through a tracking code stored on the remote devices and a probabilistic tracking; and providing access to the local cache or the local server proxy in response to authorizations associated with the identified devices and a user.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2020

Method and apparatus for maintaining data coherence in a non-uniform compute device

A data processing apparatus includes one or more host processors with first processing units, one or more caches with second processing unit, a non-cache memory having a third processing unit and a reorder buffer operable to maintain data order during execution of a program of instructions. An instruction scheduler routes instructions to the processing units. Data coherence is maintained by control logic that blocks access to data locations in use by a selected processing unit other than the selected processing unit until data associated with the data locations are released from the reorder buffer. Data stored in the cache is written to the memory if it is already in a modified state, otherwise the state is set to the modified state. A memory controller may be used to restrict access to memory locations to be operated on.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2021

Pattern-aware prefetching using parallel log-structured file system

Techniques are provided for pattern-aware prefetching using a parallel log-structured file system. At least a portion of one or more files is accessed by detecting at least one pattern in a non-sequential access of the one or more files; and obtaining at least a portion of the one or more files based on the detected at least one pattern. The obtaining step comprises, for example, a prefetching or pre-allocation of the at least the portion of the one or more files. A prefetch cache can store the portion of the one or more obtained files. The cached portion of the one or more files can be provided from the prefetch cache to an application requesting the at least a portion of the one or more files.

Bent, John M.↗
DOE OSTI2020

Accelerating Parallel Applications in Cloud Platforms via Adaptive Time-Slice Control

Cloud platforms can provide flexible and cost-effective environments for parallel applications. However, the resource over-commitment issues, i.e., cloud providers often provide much more executable virtual CPUs than available physical CPUs, still impede the synchronization operations of parallel applications, causing severe performance degradation. Existing methods optimize parallel applications by promoting the priorities of involved VMs. They cannot fully explore the performance of parallel applications, because they ignore the time-slice requirements of different phases of parallel applications. Furthermore, non-parallel applications experience unsatisfied performance because of low scheduling priorities. Given empirical analysis on time-slices of virtual machines (VMs), we find that shortening time-slices can mitigate synchronization overhead which incurs during communication phases, while over-short time-slices cause frequent cache misses in computation phases. Accordingly, we propose an Adaptive Time-slice Control (ATC) mechanism. ATC first detects the phases of parallel applications based on lock latency or cache misses. Then, ATC shortens time-slices during communication phases and prolongs time-slices during computation phases for parallel applications, and sets a uniform time-slice for non-parallel applications. Finally, we evaluate ATC using seven well-known benchmarks with 25+ applications. Experiments show that ATC obtains 1.5-75x performance gain for running parallel applications than state-of-the-art solutions, with nearly unaffected impact on non-parallel applications.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2025

HDF5 in the exascale era: Delivering efficient and scalable parallel I/O for exascale applications

Accurately modeling real-world systems requires scientific applications at exascale to generate massive amounts of data and manage data storage efficiently. However, parallel input and output (I/O) faces challenges due to new application workflows and the state-of-the-art memory, interconnect, and storage architectures considered in exascale designs. The storage hierarchy has expanded with node-local persistent memory, solid-state storage, and traditional disk and tape-based storage, thus requiring efficiency at each layer and much more efficient data movement among these layers. This paper discusses how the ExaHDF5 project improved the I/O performance and data management for exascale architectures by enhancing HDF5, a widely used parallel I/O library. The team developed an Asynchronous I/O Virtual Object Layer (VOL) connector that allowed overlapping I/O with computation. They also created a Cache VOL to complement asynchronous I/O by incorporating fast storage layers, such as burst buffer and node-local storage, into the parallel I/O workflow through caching and staging data. Additionally, the team enabled data aggregation and I/O at the node level by using a Subfiling Virtual File Driver (VFD). To demonstrate superior I/O performance with HDF5 at exascale, the ExaHDF5 team collaborated with several exascale applications. In this paper, we show I/O performance improvements for three applications: Cabana (a particle-based simulation library), EQSIM (a regional earthquake simulation software), and E3SM (a climate system modeling library).

Asynchronous I/Ol↗
NASA NTRS2013

Developing Tools and Technologies to Meet MSR Planetary Protection Requirements

This paper describes the tools and technologies that need to be developed for a Caching Rover mission in order to meet the overall Planetary Protection requirements for future Mars Sample Return (MSR) campaign. This is the result of an eight-month study sponsored by the Mars Exploration Program Office. The goal of this study is to provide a future MSR project with a focused technology development plan for achieving the necessary planetary protection and sample integrity capabilities for a Mars Caching Rover mission.

fetch rover↗
DOE OSTI2016

Calculating Reuse Distance from Source Code

The efficient use of a system is of paramount importance in high-performance computing. Applications need to be engineered for future systems even before the architecture of such a system is clearly known. Static performance analysis that generates performance bounds is one way to approach the task of understanding application behavior. Performance bounds provide an upper limit on the performance of an application on a given architecture. Predicting cache hierarchy behavior and accesses to main memory is a requirement for accurate performance bounds. This work presents our static reuse distance algorithm to generate reuse distance histograms. We then use these histograms to predict cache miss rates. Experimental results for kernels studied show that the approach is accurate.

Cache memory↗