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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 217 records · Page 12
All sourcesNASA NTRSDOE OSTI
NASA NTRS1994

Non-isolated 30 kW class arcjet PCU

A 30 kW class arcjet Power Conditioning Unit, PCU, was built and tested during this Phase 2 SBIR contract. The PCU is an improved version of two previously developed PCU's. All of these units are 3-phase, 20 kHz buck regulators with current mode feed back to modulate the duty cycle to control the arcjet current at any selected operating point. The steady state control can assure arcjet stability despite the negative dynamic resistance of the arc discharge. The system also has a circuit to produce a high voltage start pulse to breakdown the gas and initiate the arc. The start pulse is formed by temporarily switching a short current path across the output terminals with a special solid state switching array. The switches then open rapidly, and the energy stored in the output inductors of the buck regulator produces a pulse of approximately 2500 V for approximately 500 nsec. The system was tested and modified until the transition to steady operation occurred after start up with a very small surge current overshoot. The system also can withstand a direct short circuit across the output without damage. The automatic feed back control simply reduces the duty cycle to hold the current at the set point. When the short is removed the full power output is immediately restored. This latest version arcjet PCU is conduction cooled to remove waste heat by conduction to the base plate. This unit is closer to flight a type of design than the previous functional bread boards. Waste heat is small because the PCU has a very high efficiency, 296 percent. The PCU was extensively tested with resistor loads to simulate operation with an arcjet. The unit was tested with ammonia arcjets at the Jet Propulsion Laboratory. Approximately 400 hours of testing were completed, with several starts. Many hours were also demonstrated with resistive loads. Some testing with hydrogen arcjets was also carried out at NASA LeRC. This system concept is now the design base for the ATTD program.

Wong, See-Pok↗
NASA NTRS1980

Overload protection for switching regulators

Circuit protects all output lines of switching regulator against overloads without requiring current sensors on every line. If overload is sensed, device short circuits bias on switching transistor so that power is rapidly cut off from loads. Circuit also includes delay network to inhibit erroneous operation during startup.

Lachochi, E.↗
NASA NTRS1981

High-frequency measurements of multilayer ceramic capacitors

A resonant coaxial transmission line, short circuited at one end and open circuited at the other, whose fundamental resonant frequency and Q factor are known, is perturbed with a test capacitor connected either in series at the shorted end of the line, or in shunt at the open end. Measuring the Q factor of the system with the delta f technique yields the effective series resistance, capacitance, and the Q factor of the test specimen. This method of measurement has the advantage that there are no adjustable elements to alter circuit conditions in an unprescribed way, the only variable is the frequency which can be measured with an uncertainty of less than 1 ppm, the loss of the line as a function of frequency is quite predictable, and the Q factor of the line can be made sufficiently high to support accurate measurements of low loss capacitors.

Lafferty, R. E.↗
NASA NTRS1979

The potential of np GaAs solar cells for high efficiency concentrator applications

This communication considers the design of the front grid contact of np GaAs solar cells for high efficiency concentrator applications. This design involves shadowing, contact resistance, and active layer sheet resistance losses, and at high concentrations, the power loss due to voltage drop on the resistance of the grid fingers should be considered. Analysis of the performance can be calculated as a function of junction depth and surface recombination velocity. The junction depth can be optimized by considering its effect on the collection efficiency of the dark current-voltage characteristics or the open circuit voltage, and on the series resistance loss or the fill factor for material parameters. The choice of the material parameters, calculation of the short circuit current, the selection of the n layer thickness, and the cell maximum power and efficiency are discussed. It is concluded that optimized multi-grid structures should allow the use of 10 by 10 sq cm cells with good efficiencies at high concentration ratios, and efficiencies of 22 to 25% should be obtainable from large area cells at concentrations of 40 AM1.

Flat, A.↗
NASA NTRS1978

Lifetime and diffusion length measurements on silicon material and solar cells

Experimental methods were evaluated for the determination of lifetime and diffusion length in silicon intentionally doped with potentially lifetime-degrading impurities found in metallurgical grade silicon, impurities which may be residual in low-cost silicon intended for use in terrestrial flat-plate arrays. Lifetime measurements were made using a steady-state photoconductivity method. Diffusion length determinations were made using short-circuit current measurements under penetrating illumination. Mutual consistency among all experimental methods was verified, but steady-state photoconductivity was found preferable to photoconductivity decay at short lifetimes and in the presence of traps. The effects of a number of impurities on lifetime in bulk material, and on diffusion length in cells fabricated from this material, were determined. Results are compared with those obtained using different techniques. General agreement was found in terms of the hierarchy of impurities which degrade the lifetime.

Othmer, S.↗
NASA NTRS1994

Multiconductor Short/Open Cable Tester

Frequent or regular testing of multiconductor cables terminated in multipin conductors tedious, if not impossible, task. This inexpensive circuit simplifies open/short testing and is amenable to automation. In operation, pair of connectors selected to match pair of connectors installed on each of cables to be tested. As many connectors accommodated as required, and each can have as many conductors as required. Testing technique implemented with this circuit automated easily with electronic controls and computer interface. Printout provides status of each conductor in cable, indicating which, if any, of conductors has open or short circuit.

Eichenberg, Dennis↗
NASA NTRS2014

Using a Commercial Ethernet PHY Device in a Radiation Environment

This work involved placing a commercial Ethernet PHY on its own power boundary, with limited current supply, and providing detection methods to determine when the device is not operating and when it needs either a reset or power-cycle. The device must be radiation-tested and free of destructive latchup errors. The commercial Ethernet PHY's own power boundary must be supplied by a current-limited power regulator that must have an enable (for power cycling), and its maximum power output must not exceed the PHY's input requirements, thus preventing damage to the device. A regulator with configurable output limits and short-circuit protection (such as the RHFL4913, rad hard positive voltage regulator family) is ideal. This will prevent a catastrophic failure due to radiation (such as a short between the commercial device's power and ground) from taking down the board's main power. Logic provided on the board will detect errors in the PHY. An FPGA (field-programmable gate array) with embedded Ethernet MAC (Media Access Control) will work well. The error detection includes monitoring the PHY's interrupt line, and the status of the Ethernet's switched power. When the PHY is determined to be non-functional, the logic device resets the PHY, which will often clear radiation induced errors. If this doesn't work, the logic device power-cycles the FPGA by toggling the regulator's enable input. This should clear almost all radiation induced errors provided the device is not latched up.

Parks, Jeremy↗
NASA NTRS2001

Performance and Abuse Testing of 5 Year Old Low Rate and Medium Rate Lithium Thionyl Chloride Cells

Most cells survived the 3 amp (A) over-discharge at room temperature for 2 hours. The cell that failed was the LTC-114 after high rate discharge of 500 mA similar to the results of the 1 A over-discharge test. Most cells opened during 0.05 Ohm short circuit test without incident but three LTC-111 cells exploded apparently due to a lack of a thermal cutoff switch. The LTC-114 cells exposed to a hard short of 0.05 Ohms recovered but the LTC-114 cells exposed to a soft short of 1 Ohm did not. This is probably due to the activation of a resetable fuse during a hard short. Fresh cells tend to survive exposure to higher temperatures than cells previously discharged at high rate (1 Amp). LTC-111 cells tend to vent at lower temperatures than the all LTC-114 cells and the LTC-115 cells that were previously discharged at rates exceeding 1 Amp.

Frerker, Rick↗
NASA NTRS1982

Failure Detector for Power-Factor Controller

New protective circuits have been developed for power-factor ac motor controllers. Circuits prevent direct current and consequent motor heating that would normally result from failure of solid-state switch in controller. Single-phase power-factor controller with short detector compensates for short-circuit failure in either direction by applying full power to motor. Controller with open detector compensates for open-circuit failure in either direction by turning off power to motor.

Nola, F. J.↗
NASA NTRS2006

Single-Chip T/R Module for 1.2 GHz

A single-chip CMOS-based (complementary-metal-oxide-semiconductorbased) transmit/receive (T/R) module is being developed for L-band radar systems. Previous T/R module implementations required multiple chips employing different technologies (GaAs, Si, and others) combined with off-chip transmission lines and discrete components including circulators. The new design eliminates the bulky circulator, significantly reducing the size and mass of the T/R module. Compared to multi-chip designs, the single-chip CMOS can be implemented with lower cost. These innovations enable cost-effective realization of advanced phased array and synthetic aperture radar systems that require integration of thousands of T/R modules. The circulator is a ferromagnetic device that directs the flow of the RF (radio frequency) power during transmission and reception. During transmission, the circulator delivers the transmitted power from the amplifier to the antenna, while preventing it from damaging the sensitive receiver circuitry. During reception, the circulator directs the energy from the antenna to the low-noise amplifier (LNA) while isolating the output of the power amplifier (PA). In principle, a circulator could be replaced by series transistors acting as electronic switches. However, in practice, the integration of conventional series transistors into a T/R chip introduces significant losses and noise. The prototype single-chip T/R module contains integrated transistor switches, but not connected in series; instead, they are connected in a shunt configuration with resonant circuits (see figure). The shunt/resonant circuit topology not only reduces the losses associated with conventional semiconductor switches but also provides beneficial transformation of impedances for the PA and the LNA. It provides full singlepole/ double-throw switching for the antenna, isolating the LNA from the transmitted signal and isolating the PA from the received signal. During reception, the voltage on control line RX/TX (raised bar) is high, causing the field-effect transistor (FET) switch S1 to be closed, forming a parallel resonant tank circuit L1||C1. This circuit presents high impedance to the left of the antenna, so that the received signal is coupled to the LNA. At the same time, FET switches S2 and S3 are open, so that C2 is removed from the circuit (except for a small parasitic capacitance). The combination of L2 and C3 forms a matching network that transforms the antenna impedance of 50 ohms to a higher value from the perspective of the LNA input terminal. This transformation of impedance improves LNA noise figure by increasing the received voltage delivered to the input transistor. This allows lower transconductance and therefore a smaller transistor, which makes it possible to design the CMOS LNA for low power consumption. During transmission, the voltage on control line RX/TX (raised bar) is low, causing switch S1 to be open. In this configuration, the combination of L1 and C1 transforms the antenna impedance to a lower value from the perspective of the PA. This low impedance is helpful in producing a relatively high output power compatible with the low CMOS operating potential. At the same time, switches S2 and S3 are closed, forming the parallel resonant tank circuit L2||C2. This circuit presents high impedance to the right of the antenna, directing the PA output signal to the antenna and away from the LNA. During this time, S3 presents a short circuit across the LNA input terminals to guarantee that the voltage seen by the LNA is small enough to prevent damage.

Moussessian, Alina↗
NASA NTRS2015

ER-2 High Altitude Solar Cell Calibration Flights

The first flights of the ER-2 solar cell calibration demonstration were conducted during September-October of 2014. Three flights were performed that not only tested out the equipment and operational procedures, but also demonstrated the capability of this unique facility by conducting the first short-circuit measurements on a variety of test solar cells. Very preliminary results of these first flights were presented at the 2014 Space Photovoltaic Research and Technology (SPRAT) Conference in Cleveland, OH shortly following these first flights. At the 2015 Space Power Workshop, a more detailed description of these first ER-2 flights will be presented, along with the final flight data from some of the test cells that were flown and has now been reduced and corrected for ER-2 atmospheric flight conditions. Plans for ER-2 flights during the summer of 2015 will also be discussed.

solar cells↗
NASA NTRS1988

Molecular-Beam-Epitaxy Program

Molecular Beam Epitaxy (MBE) computer program developed to aid in design of single- and double-junction cascade cells made of silicon. Cascade cell has efficiency 1 or 2 percent higher than single cell, with twice the open-circuit voltage. Input parameters include doping density, diffusion lengths, thicknesses of regions, solar spectrum, absorption coefficients of silicon (data included for 101 wavelengths), and surface recombination velocities. Results include maximum power, short-circuit current, and open-circuit voltage. Program written in FORTRAN IV.

Sparks, Patricia D.↗
NASA NTRS1975

Development of processing procedures for advanced silicon solar cells

Ten ohm-cm silicon solar cells, 0.2 mm thick, were produced with short circuit current efficiencies up to thirteen percent and using a combination of recent technical advances. The cells were fabricated in conventional and wraparound contact configurations. Improvement in cell collection efficiency from both the short and long wavelengths region of the solar spectrum was obtained by coupling a shallow junction and an optically transparent antireflection coating with back surface field technology. Both boron diffusion and aluminum alloying techniques were evaluated for forming back surface field cells. The latter method is less complicated and is compatible with wraparound cell processing.

Scott-Monck, J. A.↗
NASA NTRS1989

A design procedure for the phase-controlled parallel-loaded resonant inverter

High-frequency-link power conversion and distribution based on a resonant inverter (RI) has been recently proposed. The design of several topologies is reviewed, and a simple approximate design procedure is developed for the phase-controlled parallel-loaded RI. This design procedure seeks to ensure the benefits of resonant conversion and is verified by data from a laboratory 2.5 kVA, 20-kHz converter. A simple phasor analysis is introduced as a useful approximation for design purposes. The load is considered to be a linear impedance (or an ac current sink). The design procedure is verified using a 2.5-kVA 20-kHz RI. Also obtained are predictable worst-case ratings for each component of the resonant tank circuit and the inverter switches. For a given load VA requirement, below-resonance operation is found to result in a significantly lower tank VA requirement. Under transient conditions such as load short-circuit, a reversal of the expected commutation sequence is possible.

King, Roger J.↗
NASA NTRS2006

The 2004 NASA Aerospace Battery Workshop

Topics covered include: Super NiCd(TradeMark) Energy Storage for Gravity Probe-B Relativity Mission; Hubble Space Telescope 2004 Battery Update; The Development of Hermetically Sealed Aerospace Nickel-Metal Hydride Cell; Serial Charging Test on High Capacity Li-Ion Cells for the Orbiter Advanced Hydraulic Power System; Cell Equalization of Lithium-Ion Cells; The Long-Term Performance of Small-Cell Batteries Without Cell-Balancing Electronics; Identification and Treatment of Lithium Battery Cell Imbalance under Flight Conditions; Battery Control Boards for Li-Ion Batteries on Mars Exploration Rovers; Cell Over Voltage Protection and Balancing Circuit of the Lithium-Ion Battery; Lithium-Ion Battery Electronics for Aerospace Applications; Lithium-Ion Cell Charge Control Unit; Lithium Ion Battery Cell Bypass Circuit Test Results at the U.S. Naval Research Laboratory; High Capacity Battery Cell By-Pass Switches: High Current Pulse Testing of Lithium-Ion; Battery By-Pass Switches to Verify Their Ability to Withstand Short-Circuits; Incorporation of Physics-Based, Spatially-Resolved Battery Models into System Simulations; A Monte Carlo Model for Li-Ion Battery Life Projections; Thermal Behavior of Large Lithium-Ion Cells; Thermal Imaging of Aerospace Battery Cells; High Rate Designed 50 Ah Li-Ion Cell for LEO Applications; Evaluation of Corrosion Behavior in Aerospace Lithium-Ion Cells; Performance of AEA 80 Ah Battery Under GEO Profile; LEO Li-Ion Battery Testing; A Review of the Feasibility Investigation of Commercial Laminated Lithium-Ion Polymer Cells for Space Applications; Lithium-Ion Verification Test Program; Panasonic Small Cell Testing for AHPS; Lithium-Ion Small Cell Battery Shorting Study; Low-Earth-Orbit and Geosynchronous-Earth-Orbit Testing of 80 Ah Batteries under Real-Time Profiles; Update on Development of Lithium-Ion Cells for Space Applications at JAXA; Foreign Comparative Technology: Launch Vehicle Battery Cell Testing; 20V, 40 Ah Lithium Ion Polymer Battery for the Spacesuit; Low Temperature Life-Cycle Testing of a Lithium-Ion Battery for Low-Earth-Orbiting Spacecraft; and Evaluation of the Effects of DoD and Charge Rate on a LEO Optimized 50 Ah Li-Ion Aerospace Cell.

Source record↗
NASA NTRS1985

High-voltage solar-cell chip

Integrated circuit technology has been successfully applied to the design and fabrication of 0.5 x 0.5-cm planar multijunction solar-cell chips. Each of these solar cells consisted of six voltage-generating unit cells monolithically connected in series and fabricated on a 75-micron-thick, p-type, single crystal, silicon substrate. A contact photolithic process employing five photomask levels together with a standard microelectronics batch-processing technique were used to construct the solar-cell chip. The open-circuit voltage increased rapidly with increasing illumination up to 5 AM1 suns where it began to saturate at the sum of the individual unit-cell voltages at a maximum of 3.0 V. A short-circuit current density per unit cell of 240 mA/sq cm was observed at 10 AM1 suns.

Kapoor, V. J.↗
NASA NTRS1982

Planar multijunction high voltage solar cell chip

A new innovative planar multijunction solar cell chip for concentrated sunlight applications is proposed. The chip consists of many voltage-generating regions, called unit cells, which are connected in series within a single silicon wafer, thereby providing a high open-circuit voltage at multiple sun illumination levels. The unit cells are fabricated on 75 micron thick p-type single crystal silicon substrate. Each chip consists of 1.42 x 9.63 mm n(+)/p collecting junctions on the back of the wafer, while the illuminated front surface area is divided into 0.3 micron deep n(+) regions. The fabrication sequence includes standard degreasing and cleaning procedures, double-sided alignment photomasking, introduction of boron and phosphorus impurities, and photolithography. The open circuit voltage of the chip increased rapidly with illumination up to about 4 AM1 suns, and then began to saturate at the sum of the individual unit cell voltages of 3.5 above 4 AM1 suns. A short circuit density per unit cell of 300 mA/sq cm at 20 AM1 suns was observed.

Valco, G. J.↗
NASA NTRS2013

Design Safety Used in NASA's Human-rated Primary Lithium Batteries

Single cell tests were benign for external short, inadvertent charge and overdischarge into reversal up to 4.5 A. At lower current loads cells die (may be due to excessive dendrite formation) benignly. String level external short circuits lead to an unbalanced overdischarge, with one cell going into reversal. The result is catastrophic violent venting. Unbalanced string overdischarges at different currents causes catastrophic violent venting also. Heat-to-vent is very dramatic displaying violent venting Simulated internal short is also catastrophic and displays violent venting. Battery is not UL-rated; hence does not have dual-fault tolerance or tolerance to inherent cell tolerance to failures Battery Design for NASA JSC's human-rated application for use on ISS was changed to include two bypass diodes per cell to provide for two-failure tolerance to overdischarge into reversal (and external short) hazards.

Jeevarajan, J.↗