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At least 217 records · Page 12

Fault-Tolerant Software-Defined Radio on Manycore

Software-defined radio (SDR) platforms generally rely on field-programmable gate arrays (FPGAs) and digital signal processors (DSPs), but such architectures require significant software development. In addition, application demands for radiation mitigation and fault tolerance exacerbate programming challenges. MaXentric Technologies, LLC, has developed a manycore-based SDR technology that provides 100 times the throughput of conventional radiationhardened general purpose processors. Manycore systems (30-100 cores and beyond) have the potential to provide high processing performance at error rates that are equivalent to current space-deployed uniprocessor systems. MaXentric's innovation is a highly flexible radio, providing over-the-air reconfiguration; adaptability; and uninterrupted, real-time, multimode operation. The technology is also compliant with NASA's Space Telecommunications Radio System (STRS) architecture. In addition to its many uses within NASA communications, the SDR can also serve as a highly programmable research-stage prototyping device for new waveforms and other communications technologies. It can also support noncommunication codes on its multicore processor, collocated with the communications workload-reducing the size, weight, and power of the overall system by aggregating processing jobs to a single board computer.

Ricketts, Scott↗

Spacecube V2.0 Micro Single Board Computer

A single board computer system radiation hardened for space flight includes a printed circuit board having a top side and bottom side; a reconfigurable field programmable gate array (FPGA) processor device disposed on the top side; a connector disposed on the top side; a plurality of peripheral components mounted on the bottom side; and wherein a size of the single board computer system is not greater than approximately 7 cm.times.7 cm.

Petrick, David J.↗

Development of an Optical Slice for an RF and Optical Software Defined Radio

A key component in the Integrated Radio and Optical Communications project at the National Aeronautics and Space Administration's (NASA) Glenn Research Center (GRC) is the radio frequency (RF) and optical software defined radio (SDR). A NASA RF SDR might consist of a general purpose processor to run the Space Telecommunications Radio System (STRS) Architecture for radio command and control, a reconfigurable signal processing device such as a field programmable gate array (FPGA) which houses the waveform, and a digital to analog converter for (DAC) transmitting data. Prior to development, SDR architecture trades on how to combine the RF and optical elements were studied. A modular architecture with physically separate RF and optical hardware slices was chosen and the optical slice of an SDR was designed and developed. The Harris AppSTAR("TM") platform, which consists of an FPGA processing platform with a mezzanine card targeted for RF communications, was used as the base platform in prototyping the optical slice. A serially concatenated pulse position modulation (SCPPM) optical waveform was developed. The waveform follows the standard described in the Consultative Committee for Space Data Systems (CCSDS) Optical Communions Coding and Synchronization Red Book. A custom optical mezzanine printed circuit board card was developed at NASA GRC for optical transmission. The optical mezzanine card replaces the DAC, which is used in the transmission of RF signals. This paper describes RF and optical SDR architecture trades, the Harris AppSTAR("TM") platform, the design of the SCPPM waveform, and the development of the optical mezzanine card.

optical communications↗

Development of an Optical Slice for an RF and Optical Software Defined Radio

A key component in the Integrated Radio and Optical Communications project at the National Aeronautics and Space Administration's (NASA) Glenn Research Center (GRC) is the radio frequency (RF) and optical software defined radio (SDR). A NASA RF SDR might consist of a general purpose processor to run the Space Telecommunications Radio System (STRS) Architecture for radio command and control, a reconfigurable signal processing device such as a field programmable gate array (FPGA) which houses the waveform, and a digital to analog converter (DAC) for transmitting data. Prior to development, SDR architecture trades on how to combine the RF and optical elements were studied. A modular architecture with physically separate RF and optical hardware slices was chosen and the optical slice of an SDR was designed and developed. The Harris AppSTARTM platform, which consists of an FPGA processing platform with a mezzanine card targeted for RF communications, was used as the base platform in prototyping the optical slice. A serially concatenated pulse position modulation (SCPPM) optical waveform was developed. The waveform follows the standard described in the Consultative Committee for Space Data Systems (CCSDS) Optical Communications Coding and Synchronization Red Book. A custom optical mezzanine printed circuit board card was developed at NASA GRC for optical transmission. The optical mezzanine card replaces the DAC, which is used in the transmission of RF signals. This paper describes RF and optical SDR architecture trades, the Harris AppSTAR platform, the design of the SCPPM waveform, and the development of the optical mezzanine card.

Nappier, Jennifer M.↗

Development of Criteria for Hardware Descripted Language Programmed-Devices for Safety Systems in Nuclear Power Plants in the U.S

The U.S. Nuclear Regulatory Commission (NRC) is in the process of developing a regulatory guide (RG) describing a method the staff of the NRC considers acceptable, for use in complying with NRC regulations with respect to the development of hardware description language-programmed device (HPD). Examples include: field programmable gate arrays (FPGAs), systems in the power, instrumentation, and control portions of safety systems for nuclear power plants. The regulatory framework that NRC is establishing for nuclear power plants consists of a number of regulations and supporting guidelines applicable to the development of HPD-based safety systems. The NRC issues RGs to describe to the public, methods that the NRC staff considers acceptable for use in implementing specific parts of the agency's regulations; to explain techniques that the NRC staff uses in evaluating specific problems or postulated accidents; and to provide guidance to applicants. (authors)

22 GENERAL STUDIES OF NUCLEAR REACTORS↗

G4-FETs as Universal and Programmable Logic Gates

An analysis of a patented generic silicon- on-insulator (SOI) electronic device called a G4-FET has revealed that the device could be designed to function as a universal and programmable logic gate. The universality and programmability could be exploited to design logic circuits containing fewer discrete components than are required for conventional transistor-based circuits performing the same logic functions. A G4-FET is a combination of a junction field-effect transistor (JFET) and a metal oxide/semiconductor field-effect transistor (MOSFET) superimposed in a single silicon island and can therefore be regarded as two transistors sharing the same body. A G4-FET can also be regarded as a single transistor having four gates: two side junction-based gates, a top MOS gate, and a back gate activated by biasing of the SOI substrate. Each of these gates can be used to control the conduction characteristics of the transistor; this possibility creates new options for designing analog, radio-frequency, mixed-signal, and digital circuitry. With proper choice of the specific dimensions for the gates, channels, and ancillary features of the generic G4-FET, the device could be made to function as a three-input, one-output logic gate. As illustrated by the truth table in the top part of the figure, the behavior of this logic gate would be the inverse (the NOT) of that of a majority gate. In other words, the device would function as a NOT-majority gate. By simply adding an inverter, one could obtain a majority gate. In contrast, to construct a majority gate in conventional complementary metal oxide/semiconductor (CMOS) circuitry, one would need four three-input AND gates and a four-input OR gate, altogether containing 32 transistors.

Johnson, Travis↗

High sensitivity measurement system for the direct-current, capacitance-voltage, and gate-drain low frequency noise characterization of field effect transistors

Measurements of current fluctuations originating in electron devices have been largely used to understand the electrical properties of materials and ultimate device performances. In this work, we propose a high-sensitivity measurement setup topology suitable for the automatic and programmable Direct-Current (DC), Capacitance-Voltage (CV), and gate-drain low frequency noise characterization of field effect transistors at wafer level. Automatic and programmable operation is particularly useful when the device characteristics relax or degrade with time due to optical, bias, or temperature stress. The noise sensitivity of the proposed topology is in the order of fA/Hz{sup 1/2}, while DC performances are limited only by the source and measurement units used to bias the device under test. DC, CV, and NOISE measurements, down to 1 pA of DC gate and drain bias currents, in organic thin film transistors are reported to demonstrate system operation and performances.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Integration of Ag-CBRAM crossbars and Mott ReLU neurons for efficient implementation of deep neural networks in hardware

In-memory computing with emerging non-volatile memory devices (eNVMs) has shown promising results in accelerating matrix-vector multiplications. However, activation function calculations are still being implemented with general processors or large and complex neuron peripheral circuits. Here, we present the integration of Ag-based conductive bridge random access memory (Ag-CBRAM) crossbar arrays with Mott rectified linear unit (ReLU) activation neurons for scalable, energy and area-efficient hardware (HW) implementation of deep neural networks. We develop Ag-CBRAM devices that can achieve a high ON/OFF ratio and multi-level programmability. Compact and energy-efficient Mott ReLU neuron devices implementing ReLU activation function are directly connected to the columns of Ag-CBRAM crossbars to compute the output from the weighted sum current. We implement convolution filters and activations for VGG-16 using our integrated HW and demonstrate the successful generation of feature maps for CIFAR-10 images in HW. Our approach paves a new way toward building a highly compact and energy-efficient eNVMs-based in-memory computing system.

Mott insulators↗

Electrostatic Microshutter Arrays

Based on the Microshutter Array (MSA) subsystems developed at NASA Goddard Space Flight Center (GSFC) for the James Webb Space Telescope (JWST), Next Generation Microshutter Array (NGMSA) has been developed to be used as multi-object selectors for future telescopes in space applications. Microshutter arrays function as transmission devices. Selected shutters fully open at 90 degrees permitting income light going through, while the rest of shutters keep closed. The programmable microshutter open and close make the device perform as a multi object selector that can be used on space telescopes. Utilizing a multi object selector, the telescope efficiency can be increased to 100 times or more. Like JWST MSAs, NGMSA features torsion hinges, light shields, front and back electrodes for shutter actuation, latch, and closing. The difference is that JWST MSA utilized the magnetic actuation while NGMSA the electrostatic actuation.

Micro-electro-mechanical-system (MEMS)↗

Encoding hierarchical 3D architecture through inverse design of programmable bonds

The ability to fabricate materials and devices at small scales by design has resulted in tremendous technological progress. However, the need for engineered three-dimensional (3D) nanoscale materials requires new strategies for organizing nanocomponents. Here we demonstrate an inverse design approach for the assembly of nanoparticles into hierarchically ordered 3D organizations using DNA voxels with directional, addressable bonds. By identifying intrinsic symmetries in repeating mesoscale structural motifs, we prescribe a set of voxels, termed a mesovoxel, that are assembled into target 3D crystals. The relationship between different degrees of encoded information used for voxel bonds and the fidelity of assembly is investigated using experimental and computational methods. We apply this assembly strategy to create periodic 3D nanoparticle ordered organizations, including structures with low-dimensional elements, helical motifs, a nanoscale analogue of a face-centred perovskite crystal and a distributed Bragg reflector based on a crystal with plasmonic and photonic length-scale regimes.

36 MATERIALS SCIENCE↗

Comparison of programmable legend keyboard and dedicated keyboard for control of the flight management computer

A study is described which compares two types of input devices used to operate a flight management computer: a programmable legend (multifunction) keyboard and a conventional (dedicated) keyboard. Pilot performance measures, subjective responses, and a timeline analysis were used in evaluating the two keyboard concepts. A discussion of the factors to be considered in the implementation of a multifunction keyboard is included.

Crane, Jean M.↗

Electric-Field-Driven Localization of Molecular Nanowires in Wafer-Scale Nanogap Electrodes

As integrated circuits continue to scale toward the atomic limit, bottom-up processes, such as epitaxial growth, have come to feature prominently in their fabrication. At the same time, chemistry has developed highly tunable molecular semiconductors that can perform the functions of ultimately scaled circuit components. Hybrid techniques that integrate programmable structures comprising molecular components into devices however are sorely lacking. Here we demonstrate a wafer-scale process that directs the localization of a conductive polymer, M w = 20 kg mol –1 polyaniline, from dilute solutions into 50 nm vertical nanogap device architectures using electric-field-driven self-assembly. The resulting metal–polymer–metal junctions were characterized by electron microscopy, Raman spectroscopy and transport measurements demonstrating that our technique is highly selective, assembling conductive polymers only in electrically activated nanogaps. Our results represent a step toward scalable hybrid nanoelectronics that seamlessly integrate established lithographic top-down fabrication with bottom-up synthesized molecular functional circuit components.

77 NANOSCIENCE AND NANOTECHNOLOGY↗

Refractive index modulation of Sb{sub 70}Te{sub 30} phase-change thin films by multiple femtosecond laser pulses

In this study, the controllable effective refractive index modulation of Sb{sub 70}Te{sub 30} phase-change thin films between amorphous and crystalline states was achieved experimentally by multiple femtosecond laser pulses. The modulation mechanism was analyzed comprehensively by a spectral ellipsometer measurement, surface morphology observation, and two-temperature model calculations. We numerically demonstrate the application of the optically modulated refractive index of the phase-change thin films in a precisely adjustable color display. These results may provide further insights into ultrafast phase-transition mechanics and are useful in the design of programmable photonic and opto-electrical devices based on phase-change memory materials.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Stacked-Gate FET's For Analog Memory Elements

Three-terminal, double-stacked-gate field-effect transistor (FET), developed as analog memory element. Particularly suited for use as synapse with variable connection strength in electronic neural network. Provides programmable, nonvolatile resistive connection, somewhat in manner of porous-gate FET described in "Porous-Floating-Gate Field-Effect Transistor" (NPO-17532). Resembles commercial erasable programmable read-only memory (EPROM) device, except for thickness of layers of silicon dioxide electrically isolating gates. Either p-channel or n-channel device.

Thakoor, Anilkumar P.↗

Interface For Dual-Channel MIL-STD-1553 Data Bus

Digital electronic subsystem made of commercially available programmable logic arrays and discrete logic devices serves as interface between microprocessor and dual-channel MIL-STD-1553 data bus. Subsystem consumes only 800 mW of power. Provides flexibility in that it is controllable via firmware. Includes only two reading-and-writing ports: one for status and control signals, other for transmission and reception of data.

Davies, Bryan L.↗

Programmable Thermostats for MPLM Shell Heater Control ULF1: Thermal Performances - 1

The Multi-Purpose Logistics Module (MPLM) is the primary carrier for "pressurized" logistics to and from the International Space Station (ISS). The MPLM is transported in the payload bay of the Space Shuttle and is docked to the ISS for unloading, and reloading, of contents within the ISS shirt sleeve environment. Foil heaters, controlled originally with bi-metallic thermostats, are distributed across the outside of the MPLM structure and are utilized to provide energy to the structure to avoid exposure to cold temperatures and prevent condensation. The existing bi-metallic, fixed temperature set point thermostats have been replaced with Programmable Thermostats Modules (PTMs) in the Passive Thermal Control Subsystem (PTCS) 28Vdc shell heater circuits. The goal of using the PTM thermostat is to improve operational efficiency of the MPLM on-orbit shell heaters by providing better shell temperature control via feedback control capability. Each heater circuit contains a programmable thermostat connected to an external temperature sensor, a Resistive Temperature Device (RTD), which is used to provide continuous temperature monitoring capability. Each thermostat has programmable temperature set points and control spans. The data acquisition system uses a standard RS-485 serial interface communications cable to provide digital control capability. The PTM system was designed by MSFC, relying upon ALTEC support for their integration within the MPLM system design, while KSC performed the installation and ground checkout testing of the thermostat and RS-485 communication cable on the MPLM FM1 flight module. The PTMs were used for the first time during the STS-121/ULF1.1 mission. This paper will describe the design, development and verification of the PTM system, as well as the PTM flight performance and comparisons with SINDA thermal model predictions.

Glasgow, Shaun↗

SEU and Test Considerations for FPGA Devices

This viewgraph presentation provides an overview of Field Programmable Gate Arrays (FPGAs), what they are, implementations in space missions, and current available technologies. Single Event Upsets (SEUs) and Single Event Transients (SETs) are discussed in relation to their effects on FPGAs. Testing goals, considerations, and data analysis are reviewed.

Berg, Malanie↗

Optical Breath Gas Extravehicular Activity Sensor for the Advanced Portable Life Support System

The infrared gas transducer used during extravehicular activity (EVA) in the extravehicular mobility unit (EMU) measures and reports the concentration of carbon dioxide (CO2) in the ventilation loop. It is nearing its end of life and there are a limited number remaining. Meanwhile, the next generation advanced portable life support system (PLSS) now being developed requires CO2 sensing technology with performance beyond that presently in use. A laser diode (LD) spectrometer based on wavelength modulation spectroscopy (WMS) is being developed to address both applications by Vista Photonics, Inc. Accommodation within space suits demands that optical sensors meet stringent size, weight, and power requirements. Version 1.0 devices were delivered to NASA Johnson Space Center (JSC) in 2011. The sensors incorporate a laser diode based CO2 channel that also includes an incidental water vapor (humidity) measurement. The prototypes are controlled digitally with a field-programmable gate array (FPGA)/microcontroller architecture. Version 2.0 devices with improved electronics and significantly reduced wetted volumes were delivered to JSC in 2012. A version 2.5 upgrade recently implemented wavelength stabilized operation, better humidity measurement, and much faster data analysis/reporting. A wholly reconfigured version 3.0 will maintain the demonstrated performance of earlier versions while being backwards compatible with the EMU and offering a radiation tolerant architecture.

Wood, William R.↗