SEARCH · Engineering Papers
Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.
Report describes effects of power and temperature overstress on Texas Instruments and National Semiconductor devices. Texas Instruments devices had only two failures in 2500 hours of testing. National Semiconductor devices reached 50% failure limit. No consistent failure mode was detected.
Control of electrical doping is indispensable in any semiconductor device, and both efficient hole and electron doping are required for many devices. In organic semiconductors, however, electron doping has been essentially more problematic compared to hole doping because in general organic semiconductors have low electron affinities and require dopants with low ionization potentials that are often air-sensitive. Here, we adapt an efficient molecular doping method, so-called ion-exchange doping, to dope electrons in a polymeric semiconductor. We initially reduce the polymeric semiconductor using one electron transfer from molecular dopants, and then the ionized dopants in the resulting air-unstable films are replaced with secondary ions via cation exchange. Improved ambient stability and crystallinity of the doped polymeric semiconductors are achieved when a specific bulky molecular cation was chosen as the secondary ion, compared to conventional methods. The presented strategy can overcome the trade-off relationship between reducing capability and ambient stability in molecular dopants, and a wider selection of dopant ions will help to realize ambient-stable electron conductors.
This paper presents a methodology to incorporate and analyze the impact of semiconductor device part-to-part variation on power converter performance. By integrating extensive static and dynamic device characterization data with an automated compact model generation process that reflects manufacturing variability, device models with inherent variability features are utilized in converter simulations for a comprehensive assessment of performance impacts. The traditional converter performance evaluation process typically yields fixed efficiency values, often dismissing the inherent part-to-part variability caused by the manufacturing process of semiconductor devices. To address this limitation, a large population of devices was characterized to capture variations in static parameters-such as transfer, output, and capacitance characteristics-as well as dynamic behaviors, including switching losses. This data-driven approach enables the development of individual compact models, which were then integrated into converter simulations to evaluate efficiency ranges rather than single point estimated values. The converter simulation results show that part-to-part component variation can lead to significant efficiency deviations, exceeding several percentage points in high-power conversion applications. By offering a more accurate representation of converter behavior under real-world manufacturing conditions, this methodology enables designers to anticipate performance variability, improving the robustness of power converter designs.
The U.S. Department of Energy’s Advanced Manufacturing Office (predecessor to AMMTO) established PowerAmerica in December 2014 to develop and accelerate the adoption of wide bandgap (WBG) semiconductor chips and power electronics in manufacturing. The objective was to spark early commercialization of energy efficient products; educate and train the workforce; create high-tech jobs; and nurture the growth of the U.S. WBG semiconductor manufacturing industry. PowerAmerica isled by North Carolina State University by way of a five-year, $140M cooperative agreement with DoE. This private-public partnership with DoE includes member companies ranging from startups and small-medium enterprises to large system integrators, world-class universities, and national labs. The WBG power electronic ecosystem formed by our diverse membership is focused on using advanced manufacturing to 1) lower the cost of silicon carbide and gallium nitride semiconductor devices to be comparable to silicon devices; 2) demonstrate the system benefits and energy efficiency advantages of WBG semiconductor power electronics through system demonstrations that validate their effectiveness; and 3) build an education pipeline for a skilled workforce to meet the future demand for emerging WBG semiconductor markets — and enhance U.S. economic competitiveness globally. PowerAmerica was initially funded in six budget periods, each lasting 12 to 18 months. By the end of Budget Period 6 (August 2023), PowerAmerica had achieved its major objectives in technology development, semiconductor device cost reduction, ecosystem growth and engagement, and education and workforce development. Through strategic foundry investments, we helped to establish the first U.S. SiC foundry (X-FAB) and supported a lab (Microchip) to start SiC volume production. We’ve helped bring together companies from different parts of the supply chain, resulting in several successful new partnerships and business relationships. Through projects with some of the largest manufacturers of energy-intensive equipment in the U.S. — John Deere, GE, United Technologies, Raytheon, Carrier, Toshiba, and others — we have successfully demonstrated the energy and system benefits of WBG technology. We have also harnessed the unique capabilities and facilities of national labs — the Naval Research Laboratory, National Renewable Energy Laboratory, and Argonne National Laboratory — to help solve challenging technical problems for industry. Thanks to our many webinars, tutorials, annual events, and presence at major energy and electronics conferences around the world, the PowerAmerica name has become synonymous with WBG technology advancement. The commercial interest in WBG technology is higher than ever; companies and governments around the world have announced hundreds of millions of dollarsin future investment to build capacity — and compete with silicon in many markets and applications. We have trained hundreds of engineering students, from universities across the U.S., through hands-on projects and WBG coursework. Working professionals have also benefited through the years from our many targeted short courses, tutorials, and technical webinars. In short, PowerAmerica has made great strides in each of our key objectives, and the organization has been operating without government or NC State
A semiconductor device and methods of fabricating and using the same are provided. The semiconductor device comprises a channel region and at least a first, second, and third electrode. The channel region includes a compound having a transition metal and a chalcogen. The thickness of the channel region is about 3 to about 40 atomic layers.
Thermal annealing is a widely used strategy to enhance semiconductor device performance. However, the process is complex for multi-material multi-layered semiconductor devices, where thermoelastic stresses from lattice constant and thermal expansion coefficient mismatch may create more defects than those annealed. We propose an alternate low temperature annealing technique, which utilizes the electron wind force (EWF) induced by small duty cycle high density pulsed current. To demonstrate its effectiveness, we intentionally degrade AlGaN/GaN high electron mobility transistors (HEMTs) with accelerated OFF-state stressing to increase ON-resistance ∼182.08% and reduce drain saturation current ∼85.82% of pristine condition at a gate voltage of 0 V. We then performed the EWF annealing to recover the corresponding values back to ∼122.21% and ∼93.10%, respectively. The peak transconductance, degraded to ∼76.58% of pristine at the drain voltage of 3 V, was also recovered back to ∼92.38%. This recovery of previously degraded transport properties is attributed to approximately 80% recovery of carrier mobility, which occurs during EWF annealing. We performed synchrotron differential aperture x-ray microscopy measurements to correlate these annealing effects with the lattice structural changes. We found a reduction of lattice plane spacing of (001) planes and stress within the GaN layer under the gate region after EWF annealing, suggesting a corresponding decrease in defect density. Application of this low-temperature annealing technique for in-operando recovery of degraded electronic devices is discussed.
Ion migration is one of the most debated mechanisms and credited with multiple observed phenomena and performance in metal halide perovskites (MHPs) semiconductor devices. However, to date, the migration of ions and their effects on MHPs are not still fully understood, largely due to a lack of direct observations of temporal ion migration. In this work, using direct observation of ion migration in-operando, we observe the hysteretic migration behavior of intrinsic ions (i.e., CH 3 NH 3 + and I – ) as well as reveal the migration behavior of CH 3 NH 3 + decomposition ions. We find that CH 3 NH 3 + decomposition products can be affected by light and accumulate at the interfaces under bias. These MHP decomposition products are tightly related to the device performance and stability. Complementary results of time-resolved Kelvin probe force microscopy (tr-KPFM) demonstrate a correlation between dynamics of these interfacial ions and charge carriers. Overall, we find that there are a number of mobile ions including CH 3 NH 3 + decomposition products in MHPs that need to be taken into account when measuring MHP device responses (e.g., charge dynamics) and should be considered in future optimization studies of MHP semiconductor devices.
A new growth method to make highly oriented GaAs thin films on flexible metal substrates has been developed, enabling roll-to-roll manufacturing of flexible semiconductor devices. The grains are oriented in the <001> direction with <1 degree misorientations between them, and they have a comparable mobility to single-crystalline GaAs at high doping concentrations. At the moment, the role of low-angle grain boundaries (LAGBs) on device performance is unknown. A series of electron backscatter diffraction (EBSD) and cathodoluminesence (CL) studies reveal that increased doping concentrations decrease the grain size and increase the LAGB misorientation. Cross-sectional scanning transmission electron microscopy (STEM) reveals the complex dislocation structures within LAGBs. Most importantly, a correlative EBSD/electron beam-induced current (EBIC) experiment reveals that LAGBs are carrier recombination centers and that the magnitude of recombination is dependent on the degree of misorientation. The presented results directly link increased LAGB misorientation to degraded device performance, and therefore, strategies to reduce LAGB misorientations and densities would improve highly oriented semiconductor devices.
Spin-helical states, which arise in quasi-one-dimensional (1D) channels with spin-orbital (SO) coupling, underpin efforts to realize topologically protected quantum bits based on Majorana modes in semiconductor nanowires. Detecting helical states is challenging due to non-idealities present in real devices. Past efforts have focused on devices with normal contacts. In contrast, here we show by means of tight-binding calculations that by using ferromagnetic contacts it is possible to detect helical modes with high sensitivity even in the presence of realistic device effects, such as quantum interference. We show that by taking advantage of the spin-selective transmission properties of helical states, new transport signatures become possible. In addition, we show that spin-polarized contacts provide a unique path to investigate the spin-texture and spin-momentum locking properties of helical states. Our results are of interest not only for the ongoing development of Majorana qubits, but also for realizing possible spin-based quantum devices, such as quantum spin modulators and interconnects based on spin-helical channels.
The Voyager spacecraft is subject to radiation from external natural space, from radioisotope thermoelectric generators and heater units, and from the internal environment where penetrating electrons generate surface ionization effects in semiconductor devices. Methods for radiation hardening and tests for radiation sensitivity are described. Results of characterization testing and sample screening of over 200 semiconductor devices in a radiation environment are summarized.
This section of the short course discusses radiation effects in semiconductor devices. This is a broad topic, and it is not possible to cover all aspects in a course of this length. The approach that will be used is to briefly review basic mechanisms and device responses, and to go into more detail for new topics such as latchup that have not been covered in as much detail in previous short courses.
Large single-crystal SiC boules from which wafers of large area cut now being produced commerically. Availability of wafers opens door for development of SiC semiconductor devices. Recently developed chemical vapor deposition (CVD) process produces thin single-crystal SiC films on SiC wafers. Essential step in sequence of steps used to fabricate semiconductor devices. Further development required for specific devices. Some potential high-temperature applications include sensors and control electronics for advanced turbine engines and automobile engines, power electronics for electromechanical actuators for advanced aircraft and for space power systems, and equipment used in drilling of deep wells. High-frequency applications include communication systems, high-speed computers, and microwave power transistors. High-radiation applications include sensors and controls for nuclear reactors.
The properties of individual injection lasers are reviewed, and devices of greater complexity are described. These either include or are relevant to monolithic integration configurations of the lasers with their electronic driving circuitry, power combining methods of semiconductor lasers, and electronic methods of steering the radiation patterns of semiconductor lasers and laser arrays. The potential of AlGaAs laser technology for free-space optical communications systems is demonstrated. These solid-state components, which can generate and modulate light, combine the power of a number of sources and perform at least part of the beam pointing functions. Methods are proposed for overcoming the main drawback of semiconductor lasers, that is, their inability to emit the needed amount of optical power in a single-mode operation.
Laser-activated microwave semiconductor device switches at microwave speeds, generates pulses, or detects optical pulses with fast response. Device consists essentially of back-to-back metal/thin oxide/silicon (MTOS) capacitors on silicon chip.
The integration of high quality, single crystal thin film gallium arsenide (GaAs) and indium phosphide (InP) based photonic and electronic materials and devices with host microstructures fabricated from materials such as silicon (Si), glass, and polymers will enable the fabrication of the next generation of micro-opto-mechanical systems (MOMS) and optoelectronic integrated circuits. Thin film semiconductor devices deposited onto arbitrary host substrates and structures create hybrid (more than one material) near-monolithic integrated systems which can be interconnected electrically using standard inexpensive microfabrication techniques such as vacuum metallization and photolithography. These integrated systems take advantage of the optical and electronic properties of compound semiconductor devices while still using host substrate materials such as silicon, polysilicon, glass and polymers in the microstructures. This type of materials optimization for specific tasks creates higher performance systems than those systems which must use trade-offs in device performance to integrate all of the function in a single material system. The low weight of these thin film devices also makes them attractive for integration with micromechanical devices which may have difficulty supporting and translating the full weight of a standard device. These thin film devices and integrated systems will be attractive for applications, however, only when the development of low cost, high yield fabrication and integration techniques makes their use economically feasible. In this paper, we discuss methods for alignment, selective deposition, and interconnection of thin film epitaxial GaAs and InP based devices onto host substrates and host microstructures.
The rates of cooling afforded by thermoelectric (Peltier) devices can be increased for short times by applying pulses of electric current greater than the currents that yield maximum steady-state cooling. It has been proposed to utilize such momentary enhancements of cooling in applications in which diode lasers and other semiconductor devices are required to operate for times of the order of milliseconds at temperatures too low to be easily obtainable in the steady state. In a typical contemplated application, a semiconductor device would be in contact with the final (coldest) somewhat taller stage of a multistage thermoelectric cooler. Steady current would be applied to the stages to produce steady cooling. Pulsed current would then be applied, enhancing the cooling of the top stage momentarily. The principles of operation are straightforward: In a thermoelectric device, the cooling occurs only at a junction at one end of the thermoelectric legs, at a rate proportional to the applied current. However, Joule heating occurs throughout the device at a rate proportional to the current squared. Hence, in the steady state, the steady temperature difference that the device can sustain increases with current only to the point beyond which the Joule heating dominates. If a pulse of current greater than the optimum current (the current for maximum steady cooling) is applied, then the junction becomes momentarily cooled below its lowest steady temperature until thermal conduction brings the resulting pulse of Joule heat to the junction and thereby heats the junction above its lowest steady temperature. A theoretical and experimental study of such transient thermoelectric cooling followed by transient Joule heating in response to current pulses has been performed. The figure presents results from one of the experiments. The study established the essential parameters that characterize the pulse cooling effect, including the minimum temperature achieved, the maximum temperature overshoot, the time to reach minimum temperature, the time while cooled, and the time between pulses. It was found that at large pulse amplitude, the amount of pulse supercooling is about a fourth of the maximum steady-state temperature difference. For the particular thermoelectric device used in one set of the experiments, the practical optimum pulse amplitude was found to be about 3 times the optimum steady-state current. In a further experiment, a pulse cooler was integrated into a small commercial thermoelectric threestage cooler and found to provide several degrees of additional cooling for a time long enough to operate a semiconductor laser in a gas sensor.
The application of advanced electric power system technology to an all electric airplane results in an estimated reduction of the total takeoff gross weight of over 23,000 pounds for a large airplane. This will result in a 5 to 10 percent reduction in direct operating costs (DOC). Critical to this savings is the basic electrical power system component technology. These advanced electrical power components will provide a solid foundation for the materials, devices, circuits, and subsystems needed to satisfy the unique requirements of advanced all electric aircraft power systems. The program for the development of advanced electrical power component technology is described. The program is divided into five generic areas: semiconductor devices (transistors, thyristors, and diodes); conductors (materials and transmission lines); dielectrics; magnetic devices; and load management devices. Examples of progress in each of the five areas are discussed. Bipolar power transistors up to 1000 V at 100 A with a gain of 10 and a 0.5 microsec rise and fall time are presented. A class of semiconductor devices with a possibility of switching up to 100 kV is described. Solid state power controllers for load management at 120 to 1000 V and power levels to 25 kW were developed along with a 25 kW, 20 kHz transformer weighing only 3.2 kg.
The application of advanced electric power system technology to an all electric airplane results in an estimated reduction of the total takeoff gross weight of over 23,000 pounds for a large airplane. This will result in a 5 to 10 percent reduction in direct operating costs (DOC). Critical to this savings is the basic electrical power system component technology. These advanced electrical power components will provide a solid foundation for the materials, devices, circuits, and subsystems needed to satisfy the unique requirements of advanced all electric aircraft power systems. The program for the development of advanced electrical power component technology is described. The program is divided into five generic areas: semiconductor devices (transistors, thyristors, and diodes); conductors (materials and transmission lines); dielectrics; magnetic devices; and load management devices. Examples of progress in each of the five areas are discussed. Bipolar power transistors up to 1000 V at 100 A with a gain of 10 and a 0.5 microsec rise and fall time are presented. A class of semiconductor devices with a possibility of switching up to 100 kV is described. Solid state power controllers for load management at 120 to 1000 V and power levels to 25 kW were developed along with a 25 kW, 20 kHz transformer weighing only 3.2 kg. Previously announced in STAR as N83-24764