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All sources NASA NTRS DOE OSTI

DOE OSTI2023

A Novel Spatial-Temporal Variational Quantum Circuit to Enable Deep Learning on NISQ Devices

Quantum computing presents a promising approach for machine learning with its capability for extremely parallel computation in high-dimension through superposition and entanglement. Despite its potential, existing quantum learning algorithms, such as Variational Quantum Circuits (VQCs), face challenges in handling more complex datasets, particularly those that are not linearly separable. What’s more, it encounters the deployability issue, making the learning models suffer a drastic accuracy drop after deploying them to the actual quantum devices. To overcome these limitations, this paper proposes a novel spatial-temporal design, namely “ST-VQC”, to integrate nonlinearity in quantum learning and improve the robustness of the learning model to noise. Specifically, ST-VQC can extract spatial features via a novel block-based encoding quantum sub-circuit coupled with a layer-wise computation quantum sub-circuit to enable temporal-wise deep learning. Additionally, a SWAP-Free physical circuit design is devised to improve robustness. These designs bring a number of hyperparameters. After a systematic analysis of the design space for each design component, an automated optimization framework is proposed to generate the ST-VQC quantum circuit. The proposed ST-VQC has been evaluated on two IBM quantum processors, ibm-cairo with 27 qubits and ibmq-lima with 7 qubits to assess its effectiveness. The results of the evaluation on the standard dataset for binary classification show that ST-VQC can achieve over 30% accuracy improvement compared with existing VQCs on actual quantum computers. Moreover, on a non-linear synthetic dataset, the STVQC outperforms a linear classifier by 27.9%, while the linear classifier using classical computing outperforms the existing VQC by 15.58%.

Li, Jinyang↗

NASA NTRS2006

Fault Tolerance Implementation within SRAM Based FPGA Designs based upon Single Event Upset Occurrence Rates

Emerging technology is enabling the design community to consistently expand the amount of functionality that can be implemented within Integrated Circuits (ICs). As the number of gates placed within an FPGA increases, the complexity of the design can grow exponentially. Consequently, the ability to create reliable circuits has become an incredibly difficult task. In order to ease the complexity of design completion, the commercial design community has developed a very rigid (but effective) design methodology based on synchronous circuit techniques. In order to create faster, smaller and lower power circuits, transistor geometries and core voltages have decreased. In environments that contain ionizing energy, such a combination will increase the probability of Single Event Upsets (SEUs) and will consequently affect the state space of a circuit. In order to combat the effects of radiation, the aerospace community has developed several "Hardened by Design" (fault tolerant) design schemes. This paper will address design mitigation schemes targeted for SRAM Based FPGA CMOS devices. Because some mitigation schemes may be over zealous (too much power, area, complexity, etc.. . .), the designer should be conscious that system requirements can ease the amount of mitigation necessary for acceptable operation. Therefore, various degrees of Fault Tolerance will be demonstrated along with an analysis of its effectiveness.

Berg, Melanie↗

DOE OSTI2020

Graph Theory and IC Component Design Analysis

Graph analysis in large integrated circuit (IC) designs is an essential tool for verifying design logic and timing via dynamic timing analysis (DTA). IC designs resemble graphs with each logic gate as a vertex and the conductive connections between gates as edges. Using DTA digital statistical correlations, graph condensation, and graph partitioning, it is possible to identify high-entropy component centers and paths within an IC design. Identification of high-entropy component centers (HECC) enables focused DTA, effectively lowering the computational complexity of DTA on large integrated circuit graphs. In this paper, a devised methodology termed IC layout subgraph component center identification (CCI) is used to identify described. CCI lowers DTA computationally complexity by condensing IC graphs into reduced subgraphs in which dominant logic functions are verified.

42 ENGINEERING↗

DOE OSTI2020

Performance and community structure dynamics of microbial electrolysis cells operated on multiple complex feedstocks

Microbial electrolysis is a promising technology for converting aqueous wastes into hydrogen. However, substrate adaptability is an important feature, seldom documented in microbial electrolysis cells (MECs). In addition, the correlation between substrate composition and community structure has not been well established. This study used an MEC capable of producing over 10 L/L-day of hydrogen from a switchgrass-derived bio-oil aqueous phase and investigated four additional substrates, tested in sequence on a mature biofilm. The additional substrates included a red oak-derived bio-oil aqueous phase, a corn stover fermentation product, a mixture of phenol and acetate, and acetate alone. The MECs fed with the corn stover fermentation product resulted in the highest performance among the complex feedstocks, producing an average current density of 7.3 ± 0.51 A/m 2 , although the acetate fed MECs outperformed complex substrates, producing 12.3 ± 0.01 A/m 2 . 16S rRNA gene sequencing showed that community structure and community diversity were not predictive of performance, and replicate community structures diverged despite identical inoculum and enrichment procedure. The trends in each replicate, however, were indicative of the influence of the substrates. Geobacter was the most dominant genus across most of the samples tested, but its abundance did not correlate strongly to current density. High-performance liquid chromatography (HPLC) showed that acetic acid accumulated during open circuit conditions when MECs were fed with complex feedstocks and was quickly degraded once closed circuit conditions were applied. The largest net acetic acid removal rate occurred when MECs were fed with red oak bio-oil aqueous phase, consuming 2.93 ± 0.00 g/L-day. Principal component analysis found that MEC performance metrics such as current density, hydrogen productivity, and chemical oxygen demand removal were closely correlated. Net acetic acid removal was also found to correlate with performance. However, no bacterial genus appeared to correlated to these performance metrics strongly, and the analysis suggested that less than 70% of the variance was accounted for by the two components. This study demonstrates the robustness of microbial communities to adapt to a range of feedstocks and conditions without relying on specific species, delivering high hydrogen productivities despite differences in community structure. The results indicate that functional adaptation may play a larger role in performance than community composition. Further investigation of the roles each microbe plays in these communities will help MECs to become integral in the 21st-century bioeconomy to produce zero-emission fuels.

09 BIOMASS FUELS↗

DOE OSTI2021

Near surface defects: Cause of deficit between internal and external open-circuit voltage in solar cells

The presence of interface recombination in a complex multilayered thin-film solar structure causes a disparity between the internal open-circuit voltage (V OC,in ), measured by photoluminescence, and the external open-circuit voltage (V OC,ex ) i.e. an additional V OC deficit. Higher V OC,ex value aim require a comprehensive understanding of connection between V OC deficit and interface recombination. Here, a deep near-surface defect model at the absorber/buffer interface is developed for copper indium di-selenide solar cells grown under Cu excess conditions to explain the disparity between V OC ,in and V OC,ex . The model is based on experimental analysis of admittance spectroscopy and deep-level transient spectroscopy, which show the signature of deep acceptor defect. Further, temperature-dependent current-voltage measurements confirm the presence of near surface defects as the cause of interface recombination. The numerical simulations show strong decrease in the local V OC ,in near the absorber/buffer interface leading to a V OC deficit in the device. This loss mechanism leads to interface recombination without a reduced interface bandgap or Fermi level pinning. Further, these findings demonstrate that the V OC ,in measurements alone can be inconclusive and might conceal the information on interface recombination pathways, establishing the need for complementary techniques like temperature dependent current voltage measurements to identify the cause of interface recombination in the devices.

14 SOLAR ENERGY↗

DOE OSTI2022

Quantum pixel representations and compression for N-dimensional images

Abstract We introduce a novel and uniform framework for quantum pixel representations that overarches many of the most popular representations proposed in the recent literature, such as (I)FRQI, (I)NEQR, MCRQI, and (I)NCQI. The proposed QPIXL framework results in more efficient circuit implementations and significantly reduces the gate complexity for all considered quantum pixel representations. Our method scales linearly in the number of pixels and does not use ancilla qubits. Furthermore, the circuits only consist of $$R_y$$ R y gates and $$\text {CNOT}$$ CNOT gates making them practical in the NISQ era. Additionally, we propose a circuit and image compression algorithm that is shown to be highly effective, being able to reduce the necessary gates to prepare an FRQI state for example scientific images by up to 90% without sacrificing image quality. Our algorithms are made publicly available as part of , a Quantum Image Pixel Library.

97 MATHEMATICS AND COMPUTING↗

NASA NTRS2003

Bit-Serial Adder Based on Quantum Dots

A proposed integrated circuit based on quantum-dot cellular automata (QCA) would function as a bit-serial adder. This circuit would serve as a prototype building block for demonstrating the feasibility of quantum-dots computing and for the further development of increasingly complex and increasingly capable quantum-dots computing circuits. QCA-based bit-serial adders would be especially useful in that they would enable the development of highly parallel and systolic processors for implementing fast Fourier, cosine, Hartley, and wavelet transforms. The proposed circuit would complement the QCA-based circuits described in "Implementing Permutation Matrices by Use of Quantum Dots" (NPO-20801), NASA Tech Briefs, Vol. 25, No. 10 (October 2001), page 42 and "Compact Interconnection Networks Based on Quantum Dots" (NPO-20855), which appears elsewhere in this issue. Those articles described the limitations of very-large-scale-integrated (VLSI) circuitry and the major potential advantage afforded by QCA. To recapitulate: In a VLSI circuit, signal paths that are required not to interact with each other must not cross in the same plane. In contrast, for reasons too complex to describe in the limited space available for this article, suitably designed and operated QCA-based signal paths that are required not to interact with each other can nevertheless be allowed to cross each other in the same plane without adverse effect. In principle, this characteristic could be exploited to design compact, coplanar, simple (relative to VLSI) QCA-based networks to implement complex, advanced interconnection schemes. To enable a meaningful description of the proposed bit-serial adder, it is necessary to further recapitulate the description of a quantum-dot cellular automation from the first-mentioned prior article: A quantum-dot cellular automaton contains four quantum dots positioned at the corners of a square cell. The cell contains two extra mobile electrons that can tunnel (in the quantum-mechanical sense) between neighboring dots within the cell. The Coulomb repulsion between the two electrons tends to make them occupy antipodal dots in the cell. For an isolated cell, there are two energetically equivalent arrangements (denoted polarization states) of the extra electrons. The cell polarization is used to encode binary information. Because the polarization of a nonisolated cell depends on Coulomb-repulsion interactions with neighboring cells, universal logic gates and binary wires could be constructed, in principle, by arraying QCA of suitable design in suitable patterns. Again, for reasons too complex to describe here, in order to ensure accuracy and timeliness of the output of a QCA array, it is necessary to resort to an adiabatic switching scheme in which the QCA array is divided into subarrays, each controlled by a different phase of a multiphase clock signal. In this scheme, each subarray is given time to perform its computation, then its state is frozen by raising its inter-dot potential barriers and its output is fed as the input to the successor subarray. The successor subarray is kept in an unpolarized state so it does not influence the calculation of preceding subarray. Such a clocking scheme is consistent with pipeline computation in the sense that each different subarray can perform a different part of an overall computation. In other words, QCA arrays are inherently suitable for pipeline and, moreover, systolic computations. This sequential or pipeline aspect of QCA would be utilized in the proposed bit-serial adders.

Fijany, Amir↗

NASA NTRS2005

3-D Packaging: A Technology Review

Traditional electronics are assembled as a planar arrangement of components on a printed circuit board (PCB) or other type of substrate. These planar assemblies may then be plugged into a motherboard or card cage creating a volume of electronics. This architecture is common in many military and space electronic systems as well as large computer and telecommunications systems and industrial electronics. The individual PCB assemblies can be replaced if defective or for system upgrade. Some applications are constrained by the volume or the shape of the system and are not compatible with the motherboard or card cage architecture. Examples include missiles, camcorders, and digital cameras. In these systems, planar rigid-flex substrates are folded to create complex 3-D shapes. The flex circuit serves the role of motherboard, providing interconnection between the rigid boards. An example of a planar rigid - flex assembly prior to folding is shown. In both architectures, the interconnection is effectively 2-D.

Strickland, Mark↗

DOE OSTI2023

Arithmetic Primitives for Efficient Neuromorphic Computing

Neuromorphic computing is steadily gaining popularity in many scientific and engineering disciplines. However, one of the biggest problems that has prevented widespread usage of neuromorphic computing is the lack of efficient encoding methods. Traditional encoding methods such as binning, rate encoding, and temporal encoding are based on unary encoding and generate a large number of spikes for certain applications, making them less energy efficient. Lack of better encoding methods has also prevented preprocessing operations from being carried out on neuromorphic computers. As a result, over 99% of the time can be spent on data preprocessing and data transfer operations in some cases, leading to an inefficient workflow. In this paper, we present preliminary results that would enable us to efficiently encode data and perform basic arithmetic operations on neuromorphic computers. First, we present a neuromorphic approach for the two’s complement encoding of numbers and leverage it to devise addition and multiplication circuits, which could be used in preprocessing operations on neuromorphic computers. We test our approach on the SuperNeuroMAT simulator. Our results indicate that two’s complement is a highly efficient encoding method in terms of time, space, and energy complexity and that the addition and multiplication circuits produce accurate results on two numbers having arbitrary precision.

Wurm, Ahna↗

DOE OSTI2022

Conceptual design of a heavy ion beam probe diagnostic for the Wendelstein 7-X Stellarator

This article describes the current state of the design of the heavy ion beam probe (HIBP) for Wendelstein 7-X (W7-X). It will be the first HIBP diagnostic on an optimized stellarator and is designed to study electric fields and ion scale turbulence in all W7-X reference magnetic configurations. The use of an existing 2 MV accelerator, located outside of the torus hall, results in the need for a circuitous primary beamline. This increases the complexity of the ion optics design to deliver a focused beam to the plasma. To access most of the magnetic configuration space of W7-X, the secondary beamline and an energy analyzer are designed to pivot, thereby redirecting a wider range of secondary beam trajectories. Signal level estimates indicate that the equilibrium potential can be measured at all radii and that the radial coverage for potential and density fluctuations measurements depends on the plasma density.

47 OTHER INSTRUMENTATION↗

DOE OSTI2021

Quantum Computational Advantage with String Order Parameters of One-Dimensional Symmetry-Protected Topological Order

Nonlocal games with advantageous quantum strategies give arguably the most fundamental demonstration of the power of quantum resources over their classical counterparts. Recently, certain multiplayer generalizations of nonlocal games have been used to prove unconditional separations between limited computational complexity classes of shallow-depth circuits. Here, we show advantageous strategies for these nonlocal games for generic ground states of one-dimensional symmetry-protected topological orders (SPTOs), when a discrete invariant of a SPTO known as a twist phase is nontrivial and -1. Finally, our construction demonstrates that sufficiently large string order parameters of such SPTOs are indicative of globally constrained correlations useful for the unconditional computational separation.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

NASA NTRS1973

A closed, digital telephone system

Digital system can accommodate sixteen or more telephone or data units and eight, simultaneous two-way conversations through only four interconnecting wires. It uses fewer circuit components, is not bulky or complex, and requires no central exchange control.

Monford, L. G., Jr.↗

NASA NTRS1985

Burnwire Simulator

Fuse-containing device simulates pyrotechnic firing circuitry. Simulator includes housing receptacle connector at one end, and fuse at opposite end. Fuse circuit useful in any system having complex built-in wiring for current pulse applications.

Bummer, G. L.↗

NASA NTRS1991

Resolving Phase Ambiguities In OQPSK

Improved design for modulator and demodulator in offset-quaternary-phase-key-shifting (OQPSK) communication system enables receiver to resolve ambiguity in estimated phase of received signal. Features include unique-code-word modulation and detection and digital implementation of Costas loop in carrier-recovery subsystem. Enchances performance of carrier-recovery subsystem, reduces complexity of receiver by removing redundant circuits from previous design, and eliminates dependence of timing in receiver upon parallel-to-serial-conversion clock.

Nguyen, Tien M.↗

NASA NTRS1991

Pulse-firing winner-take-all networks

Winner-take-all (WTA) neural networks using pulse-firing processing elements are introduced. In the pulse-firing WTA (PWTA) networks described, input and activation signal shunting is controlled by one shared lateral inhibition signal. This organization yields an O(n) area complexity that is convenient for integrated circuit implementation. Appropriately specified network parameters allow for the accurate continuous evaluation of inputs using a signal representation compatible with established pulse-firing neural network implementations.

Meador, Jack L.↗

NASA NTRS1995

General Fluid System Simulation Program to Model Secondary Flows in Turbomachinery

The complexity and variety of turbomachinery flow circuits created a need for a general fluid system simulation program for test data anomaly resolution as well as design review. The objective of the paper is to present a computer program that has been developed to support Marshall Space Flight Center's turbomachinery internal flow analysis efforts. The computer program solves for the mass. energy and species conservation equation at each node and flow rate equation at each branch of the network by a novel numerical procedure which is a combination of both Newton-Ralphson and successive substitution method and uses a thermodynamic property program for computing real gas properties. A generalized, robust, modular, and 'user-friendly' computer program has been developed to model internal flow rates, pressures, temperatures, concentrations of gas mixtures and axial thrusts. The program can be used for any network for compressible and incompressible flows, choked flow, change of phase and gaseous mixturecs. The code has been validated by comparing the predictions with Space Shuttle Main Engine test data.

Majumdar, Alok K.↗

DOE OSTI2026

Biconjugate Impedance Matching Control of the HERO WEC: Preprint

Effective control strategies are essential for maximizing the power output of wave energy converters (WECs). In this study, we explore the methodology of port-based modelling which can be used for bi-conjugate impedance matching, a type of reactive control that involves maximizing power transfer by setting the load (PTO) impedance to be the complex conjugate of the source impedance (WEC). Despite its foundational role in electrical engineering, this method has seen limited application in wave energy and has not yet been demonstrated in wave-powered desalination systems. We represent our complex multidisciplinary system as an equivalent circuit to explore frequency-based relations. The HERO WEC, a small-scale, modular point absorber (PA) designed for reverse osmosis desalination is used as a case study to demonstrate port-based modelling for control applications. Improving the performance of wave-powered water desalination systems could play a critical role in addressing freshwater scarcity for coastal communities, especially those in remote or disaster-prone regions.

16 TIDAL AND WAVE POWER↗

DOE OSTI2023

The complexity of NISQ

Abstract The recent proliferation of NISQ devices has made it imperative to understand their power. In this work, we define and study the complexity class , which encapsulates problems that can be efficiently solved by a classical computer with access to noisy quantum circuits. We establish super-polynomial separations in the complexity among classical computation, , and fault-tolerant quantum computation to solve some problems based on modifications of Simon’s problems. We then consider the power of for three well-studied problems. For unstructured search, we prove that cannot achieve a Grover-like quadratic speedup over classical computers. For the Bernstein-Vazirani problem, we show that only needs a number of queries logarithmic in what is required for classical computers. Finally, for a quantum state learning problem, we prove that is exponentially weaker than classical computers with access to noiseless constant-depth quantum circuits.

42 ENGINEERING↗