Engineering topics
Publications and source records attributed to Blalock, B..
This paper presents a design approach to help attain any random grouping pattern between the microbatteries. In this case, the result is an ability to charge microbatteries in parallel and to discharge microbatteries in parallel or pairs of microbatteries in series.
A new saturation current model is presented for the n-channel G4-FET, a novel 4-gate transistor.
This paper presents a design approach for charging and discharging microbatteries. Maximum flexibility in terms of voltages and currents are also obtained through the use of a switching matrix.
The four-gate transistor or G4-FET combines MOSFET and JFET principles in a single SOI device. Experimental results reveal that each gate can modulate the drain current. Numerical simulations are presented to clarify the mechanisms of operation. The new device shows enhanced functionality, due to the combinatorial action of the four gates, and opens rather revolutionary applications.
Mixed mode rad hard avionics Systems on a Chip (SoC) designed for deep space applications such as Europa orbiters and Europa Landers will require data isolation circuits to block noise. This paper presents the simulation performance for a novel rad hard SOI CMOS compatible thermal transducer used for on-chip data isolation in SoC. The research presented involves the use of commercially available computer aided design tools to model the transient electrothermal behavior of the transducer. Both one- and two-dimensional analyses of a prototype thermal transducer were performed. Results indicate that thermal-based data isolator technology can pass a data bit in under a microsecond and, as a measurement of feasibility, I(exp 2)C bus specifications can be met.
High-voltage transistors in SOI that coexist with traditional low-voltage transistors enable the development of mixed-voltage systems-on-a-chip.
High-voltage transistor in SOI that coexist with traditional low-voltage transistors enable the development of mixed-voltage (high-voltage and low-voltage) systems-on-a-chip.
In this paper a method for achieving integrated power electronics is discussed. Furture spacecraft are projected to feature high levels of intergration at the system level particularly in areas not typically associated with an integrated approach.