Engineering topics

Zheng, Jianqing

Publications and source records attributed to Zheng, Jianqing.

2 records

NASA NTRS1996

CMOS VLSI Layout and Verification of a SIMD Computer

A CMOS VLSI layout and verification of a 3 x 3 processor parallel computer has been completed. The layout was done using the MAGIC tool and the verification using HSPICE. Suggestions for expanding the computer into a million processor network are presented. Many problems that might be encountered when implementing a massively parallel computer are discussed.

Zheng, Jianqing↗

NASA NTRS1995

Design of a massively parallel computer using bit serial processing elements

A 1-bit serial processor designed for a parallel computer architecture is described. This processor is used to develop a massively parallel computational engine, with a single instruction-multiple data (SIMD) architecture. The computer is simulated and tested to verify its operation and to measure its performance for further development.

Aburdene, Maurice F.↗