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Zoutendyk, J. A.

Publications and source records attributed to Zoutendyk, J. A..

At least 19 records

Diagnosis of NMOS DRAM functional performance as affected by a picosecond dye laser

A picosec pulsed dye laser beam was at selected wavelengths successfully used to simulate heavy-ion single-event effects (SEEs) in negative channel NMOS DRAMs. A DRAM was used to develop the test technique because bit-mapping capability and previous heavy-ion upset data were available. The present analysis is the first to establish such a correlation between laser and heavy-ion data for devices, such as the NMOS DRAM, where charge collection is dominated by long-range diffusion, which is controlled by carrier density at remote distances from a depletion region. In the latter case, penetration depth is an important parameter and is included in the present analysis. A single-pulse picosecond dye laser beam (1.5 microns diameter) focused onto a single cell component can upset a single memory cell; clusters of memory cell upsets (multiple errors) were observed when the laser energy was increased above the threshold energy. The multiple errors were analyzed as a function of the bias voltage and total energy of a single pulse. A diffusion model to distinguish the multiple upsets from the laser-induced charge agreed well with previously reported heavy ion data.

Kim, Q.

Heavy-ion induced single-event upset in integrated circuits

The cosmic ray environment in space can affect the operation of Integrated Circuit (IC) devices via the phenomenon of Single Event Upset (SEU). In particular, heavy ions passing through an IC can induce sufficient integrated current (charge) to alter the state of a bistable circuit, for example a memory cell. The SEU effect is studied in great detail in both static and dynamic memory devices, as well as microprocessors fabricated from bipolar, Complementary Metal Oxide Semiconductor (CMOS) and N channel Metal Oxide Semiconductor (NMOS) technologies. Each device/process reflects its individual characteristics (minimum scale geometry/process parameters) via a unique response to the direct ionization of electron hole pairs by heavy ion tracks. A summary of these analytical and experimental SEU investigations is presented.

Zoutendyk, J. A.

Response of a DRAM to single-ion tracks of different heavy-ion species and stopping powers

Multiple-bit errors caused by single-ion tracks in a 256-kb DRAM fabricated by a bulk process were observed for different ion species and stopping power values. The results demonstrate the utility of this device for the evaluation of ion-beam uniformity and ion-beam-induced charge collection in IC devices. The data indicate that single-ion-induced charge transport results in multiple-bit error clusters due to lateral diffusion of excess minority carriers (electrons). Charge collection occurred from a depth of up to 35 microns from the surface of the device. An apparent charge loss was observed for very heavy ions with a high stopping power (Au at 350 MeV).

Zoutendyk, J. A.

Characterization of multiple-bit errors from single-ion tracks in integrated circuits

The spread of charge induced by an ion track in an integrated circuit and its subsequent collection at sensitive nodal junctions can cause multiple-bit errors. The authors have experimentally and analytically investigated this phenomenon using a 256-kb dynamic random-access memory (DRAM). The effects of different charge-transport mechanisms are illustrated, and two classes of ion-track multiple-bit error clusters are identified. It is demonstrated that ion tracks that hit a junction can affect the lateral spread of charge, depending on the nature of the pull-up load on the junction being hit. Ion tracks that do not hit a junction allow the nearly uninhibited lateral spread of charge.

Zoutendyk, J. A.

Lateral charge transport from heavy-ion tracks in integrated circuit chips

A 256K DRAM has been used to study the lateral transport of charge (electron-hole pairs) induced by direct ionization from heavy-ion tracks in an IC. The qualitative charge transport has been simulated using a two-dimensional numerical code in cylindrical coordinates. The experimental bit-map data clearly show the manifestation of lateral charge transport in the creation of adjacent multiple-bit errors from a single heavy-ion track. The heavy-ion data further demonstrate the occurrence of multiple-bit errors from single ion tracks with sufficient stopping power. The qualitative numerical simulation results suggest that electric-field-funnel-aided (drift) collection accounts for single error generated by an ion passing through a charge-collecting junction, while multiple errors from a single ion track are due to lateral diffusion of ion-generated charge.

Zoutendyk, J. A.

Studies Of Single-Event-Upset Models

Report presents latest in series of investigations of "soft" bit errors known as single-event upsets (SEU). In this investigation, SEU response of low-power, Schottky-diode-clamped, transistor/transistor-logic (TTL) static random-access memory (RAM) observed during irradiation by Br and O ions in ranges of 100 to 240 and 20 to 100 MeV, respectively. Experimental data complete verification of computer model used to simulate SEU in this circuit.

Zoutendyk, J. A.

Experimental evidence for a new single-event upset (SEU) mode in a CMOS SRAM obtained from model verification

Modeling of SEU has been done in a CMOS static RAM containing 1-micron-channel-length transistors fabricated from a p-well epilayer process using both circuit-simulation and numerical-simulation techniques. The modeling results have been experimentally verified with the aid of heavy-ion beams obtained from a three-stage tandem van de Graaff accelerator. Experimental evidence for a novel SEU mode in an ON n-channel device is presented.

Zoutendyk, J. A.

Single-event upset (SEU) in a DRAM with on-chip error correction

Results are given of SEU measurements on 256K dynamic RAMs with on-chip error correction. They are claimed to be the first ever reported. A (12/8) Hamming error-correcting code was incorporated in the layout. Physical separation of the bits in each code word was used to guard against multiple bits being disrupted in any given word. Significant reduction in observed errors is reported.

Zoutendyk, J. A.

Empirical modeling of Single-Event Upset (SEU) in NMOS depletion-mode-load static RAM (SRAM) chips

A detailed experimental investigation of single-event upset (SEU) in static RAM (SRAM) chips fabricated using a family of high-performance NMOS (HMOS) depletion-mode-load process technologies, has been done. Empirical SEU models have been developed with the aid of heavy-ion data obtained with a three-stage tandem van de Graaff accelerator. The results of this work demonstrate a method by which SEU may be empirically modeled in NMOS integrated circuits.

Zoutendyk, J. A.

Field Funneling and Range Straggling in Silicon Detectors

Magnitudes of field funneling and range straggling determined in silicon-surface-barrier (Schottky-barrier) charged-particle detectors (SSBD's) through meaurement of charges collected from alpha-particle tracks. Method used extended to straightforward measurement of charge collection from heavy-ion tracks in these and other semiconductor devices. Such measurements used to assess single-event upsets in integratedcircuit chips, with view toward making them resistant to radiation. Field funneling and range straggling measured with electronic system in which charge collected from individual ions measured and recorded by multichannel analyzer.

Zoutendyk, J. A.

Simulating Single-Event Upsets in Bipolar RAM's

Simulation technique saves testing. Uses interactive version of SPICE (Simulation Program with Integrated Circuit Emphasis). Device and subcircuit models available in software used to construct macromodel for an integrated bipolar transistor. Time-dependent current generators placed inside transistor macromodel to simulate charge collection from ion track. Significant finding of experiments is standard design practice of reducing power in unaddressed bipolar RAM cell increases sensitivity of cell to single-event upsets.

Zoutendyk, J. A.

Partial-Transmission Scintillation Detector for Ions

Only outer portion of ion beam sampled to prevent unnecessary energy losses. Measurement device allows only periphery of beam to pass through scintillation material. Total flux in uniform beam inferred from peripheral flux. Device provides readings without reducing energy of ions in middle of beam. Measurement device developed for ion beams used in studies of how fast heavy ions affect integrated-circuit chips.

Malone, C. J.

Radiation Hardening of Computers

Single-event upsets reduced by use of oversize transistors. Computers made less susceptible to ionizing radiation by replacing bipolar integrated circuits with properly designed, complementary metaloxide-semiconductor (CMOS) circuits. CMOS circuit chips made highly resistant to single-event upset (SEU), especially when certain feedback resistors are incorporated. Redesigned chips also consume less power than original chips.

Nichols, D. K.

Single-Event Upset (SEU) model verification and threshold determination using heavy ions in a bipolar static RAM

Single-Event Upset (SEU) response of a bipolar low-power Schottky-diode-clamped TTL static RAM has been observed using Br ions in the 100-240 MeV energy range and O ions in the 20-100 MeV range. These data complete the experimental verification of circuit-simulation SEU modeling for this device. The threshold for onset of SEU has been observed by the variation of energy, ion species and angle of incidence. The results obtained from the computer circuit-simulation modeling and experimental model verification demonstrate a viable methodology for modeling SEU in bipolar integrated circuits.

Zoutendyk, J. A.

Single event upset immune integrated circuits for Project Galileo

Tests showed that bipolar chips in the attitude control computer of the Galileo spacecraft would likely cause catastrophic mission failure due to single particle upset. This paper describes the design and testing of CMOS replacements which are speed compatible with the bipolar parts and are immune to upset by 165-MeV krypton ions.

Giddings, A. E.

Method of measuring field funneling and range straggling in semiconductor charge-collecting junctions

Electric-field funneling length is measured while irradiating a semiconductor charge-collecting junction with electron-hole-pair generating charged particles at a first junction bias voltage. The bias voltage is then reduced to a second level in order to reduce the depth of the depletion region such that the total charge can no longer be collected by drift and measured in the energy band previously displayed in the multichannel analyzer. This is representative of the maximum electric field funneling length which may be calculated by measuring the difference at the second bias voltage level of the depletion width and the ion penetration range. The bias voltage is further lowered to a third level at which the particles are collected over a spread of energy levels while at least some of the particles are still collected at the selected energy level. From this the different depths of penetration of the particles are determined while additional effects due to diffusion are minimized.

Zoutendyk, J. A.

Gravitational Effects on Crystal Growth by Vapor Transport

Crystal-growth apparatus makes is possible to measure growth rates in three directions: up, down, and horizontal. Sealed in quartz ampoule, charge of source material vaporizes and condenses in crystalline state at colder end of tube. Apparatus allows effect of gravity on crystal growth determined quantitatively.

Zoutendyk, J. A.

Accelerators for critical experiments involving single-particle upset in solid-state microcircuits

Charged-particle interactions in microelectronic circuit chips (integrated circuits) present a particularly insidious problem for solid-state electronic systems due to the generation of soft errors or single-particle event upset (SEU) by either cosmic rays or other radiation sources. Particle accelerators are used to provide both light and heavy ions in order to assess the propensity of integrated circuit chips for SEU. Critical aspects of this assessment involve the ability to analytically model SEU for the prediction of error rates in known radiation environments. In order to accurately model SEU, the measurement and prediction of energy deposition in the form of an electron-hole plasma generated along an ion track is of paramount importance. This requires the use of accelerators which allow for ease in both energy control (change of energy) and change of ion species. This and other aspects of ion-beam control and diagnostics (e.g., uniformity and flux) are of critical concern for the experimental verification of theoretical SEU models.

Zoutendyk, J. A.