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Watson, R. Kevin

Publications and source records attributed to Watson, R. Kevin.

Micro-Inspector Avionics Module (MAM): A Self-Contained Low Power, Reconfigurable Avionics Platform for Small Spacecrafts and Instruments

This paper describes development of a radiation tolerant, low power, reconfigurable avionics module aimed at meeting the avionics needs of the JPL Micro-Inspector spacecraft. This module represents a complete avionics system, consisting of two PowerPC 405 CPUs embedded within a reconfigurable FPGA fabric of over 8 Million logic gates, 64MB of EDAC protected Flash storage and 128MB of EDAC protected DDR SDRAM or SDRAM memories, along with FPGA SEU mitigation logic, and all necessary power conversion. Processor SEU mitigation is achieved by running the two processors in a lock-step and compare configuration. All of these building blocks are integrated into a double sided circuit board that takes as little as 6 square inches of board space. This module can be embedded into a user system as part of a bigger circuit assembly or as a self contained module. This module is being developed as part of a JPL led Micro-Inspector Program, funded by NASA ESMD aimed at producing a 10Kg micro spacecraft.

configurable

Test report for single event effects of the 80386DX microprocessor

The Jet Propulsion Laboratory Section 514 Single Event Effects (SEE) Testing and Analysis Group has performed a series of SEE tests of certain strategic registers of Intel's 80386DX CHMOS 4 microprocessor. Following a summary of the test techniques and hardware used to gather the data, we present the SEE heavy ion and proton test results. We also describe the registers tested, along with a system impact analysis should these registers experience a single event upset.

Watson, R. Kevin

Internal Correction Of Errors In A DRAM

Error-correcting Hamming code built into circuit. A 256 K dynamic random-access memory (DRAM) circuit incorporates Hamming error-correcting code in its layout. Feature provides faster detection and correction of errors at less cost in amount of equipment, operating time, and software. On-chip error-correcting feature also makes new DRAM less susceptible to single-event upsets.

Zoutendyk, John A.

Spread Of Charge From Ion Tracks In Integrated Circuits

Single-event upsets (SEU's) propagate to adjacent cells in integrated memory circuits. Findings of experiments in lateral transport of electrical-charge carriers from ion tracks in 256K dynamic randon-access memories (DRAM's). As dimensions of integrated circuits decrease, vulnerability to SEU's increases. Understanding gained enables design of less vulnerable circuits.

Zoutendyk, John A.