Engineering topics

Sedlock, Steven James

Publications and source records attributed to Sedlock, Steven James.

4 records

DOE OSTI2024

Photolithography system including selective light array

A system, device, and method for imparting or transferring a geometric pattern on the surface of a substrate. The device comprises, a housing forming at least a partially enclosed space, a light source body comprising an array of light emitters, a base disposed below the light source body and configured for supporting the substrate having a photoresist layer thereon, and a controller for activating a predetermined number of individual light emitters corresponding to the predetermined geometric pattern. Each individual light emitter within the array of light emitters is selectively activatable to emit a light. The array of light emitters comprises a plurality of light-emitting diodes, a plurality of quantum dots, or both.

Young, Barbara Diane↗

DOE OSTI2023

Dopant for improving casting and electroplating performance

Systems, methods, components, and parts are provided for improving casting and electroplating performance of a plated cast part by doping a semiconductor material with an electrically active dopant before mixing the semiconductor material into a base material. The doped semiconductor material improves the castability of the base material and has an improved electrical conductivity which is closer to that of the base material such that a consistency of a subsequent plating on the part is improved.

Young, Barbara Diane↗

DOE OSTI2023

Electrical interconnect structure using metal bridges to interconnect die

A multichip module comprises a carrier, a plurality of chips, an electrical insulating layer, and an electrical interconnect structure. The carrier includes a bottom wall and four side walls defining an internal cavity. The chips are positioned in the internal cavity, with each chip including a plurality of bond pads. The electrical insulating layer is formed from electrically insulating material and is positioned on an upper surface of the carrier and the chips. The electrical interconnect structure includes a plurality of interconnect traces, with each interconnect trace formed from electrically conductive material and electrically connected to a first bond pad on a first chip and a second bond pad on a second chip. Each interconnect trace includes a bridge having a segment that is spaced apart from, and positioned above, the electrical insulating layer.

Young, Barbara Diane↗

DOE OSTI2023

Radio frequency tuning using a multichip module electrical interconnect structure

A method for tuning a resonant frequency of wireless communication circuitry on a multichip module including a plurality of chips includes applying an electrical insulator to an upper surface of the multichip module; creating a plurality of openings in the electrical insulator, each opening being positioned at a successive one of the bond pads to be electrically connected to create a plurality of exposed bond pads; applying metal to each exposed bond pad to form a successive one of a plurality of interconnect bases; removing a portion of the layer of photoresist to create a plurality of bridge supports, each bridge support positioned between a successive pair of interconnect bases; applying metal to each bridge support and associated interconnect bases to form a successive one of the interconnect traces; removing the bridge supports; and disconnecting one or more of the interconnect traces as necessary to obtain a target resonant frequency.

Young, Barbara Diane↗