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Schwartz, Harvey R.

Publications and source records attributed to Schwartz, Harvey R..

Compiled Data On Single-Event Effects Caused By Heavy Ions

Report presents test data on susceptibility of new set of digital integrated circuits and other semiconductor products to single-event effects (soft errors and latchups) caused by heavy ions incident at high energies. Data used to develop generalizations for protecting electronic equipment from single-event effects. In some cases, tested parts selected as candidates for use in specific applications.

Nichols, Donald K.

Determination Of LETs Of SRAMs By Use Of A Laser

Report describes experimental study of use of microelectronic advanced laser scanner (MEALS) to cause single-event upsets (SEUs) in integrated logic circuits. Basic concepts of SEU testing by use of MEALS described in "Laser Scanner Tests for Single-Event Upsets" (NPO-18216), "Single-Event-Upset Laser Scanner With Optical Bias" (NPO-18217), and "More About Laser Scanner Tests for Single-Event Upsets" (NPO-18494). Study part of continuing effort to study SEU effects of ionizing radiation on such circuits and to use MEALS as relatively inexpensive SEU-prescreening laboratory apparatus serving as alternative to heavy-ion acclerator.

Kim, Quiesup

Test report for single event effects of the 80386DX microprocessor

The Jet Propulsion Laboratory Section 514 Single Event Effects (SEE) Testing and Analysis Group has performed a series of SEE tests of certain strategic registers of Intel's 80386DX CHMOS 4 microprocessor. Following a summary of the test techniques and hardware used to gather the data, we present the SEE heavy ion and proton test results. We also describe the registers tested, along with a system impact analysis should these registers experience a single event upset.

Watson, R. Kevin

More About Laser Scanner Tests For Single-Event Upsets

Two reports describe preliminary theoretical and experimental studies based on method described in "Laser Scanner Tests For Single-Event Upsets" (NPO-18216). Laser-scan and heavy-ion data found correlated within factor of two. Method of testing for single-event upsets intended to overcome disadvantages of, complement, and/or substitute for more-expensive cyclotron-testing method, which does not provide spatial resolution.

Kim, Quiesup

An observation of proton-induced latchup

Proton-induced latchup in a CMOS microprocessor known to have a very low heavy-ion-induced latchup threshold LET was observed. The latchup cross section vs. proton energy for three different bias conditions is displayed. Average measures of latchup current within an 11-ms window following the onset of latchup are provided, as a function of bias and incident proton energy. These data can be interpreted in terms of the present understanding of SEE phenomena.

Nichols, Donald K.

Laser Scanner Tests For Single-Event Upsets

Microelectronic advanced laser scanner (MEALS) is opto/electro/mechanical apparatus for nondestructive testing of integrated memory circuits, logic circuits, and other microelectronic devices. Multipurpose diagnostic system used to determine ultrafast time response, leakage, latchup, and electrical overstress. Used to simulate some of effects of heavy ions accelerated to high energies to determine susceptibility of digital device to single-event upsets.

Kim, Quiesup

Internal Correction Of Errors In A DRAM

Error-correcting Hamming code built into circuit. A 256 K dynamic random-access memory (DRAM) circuit incorporates Hamming error-correcting code in its layout. Feature provides faster detection and correction of errors at less cost in amount of equipment, operating time, and software. On-chip error-correcting feature also makes new DRAM less susceptible to single-event upsets.

Zoutendyk, John A.

Spread Of Charge From Ion Tracks In Integrated Circuits

Single-event upsets (SEU's) propagate to adjacent cells in integrated memory circuits. Findings of experiments in lateral transport of electrical-charge carriers from ion tracks in 256K dynamic randon-access memories (DRAM's). As dimensions of integrated circuits decrease, vulnerability to SEU's increases. Understanding gained enables design of less vulnerable circuits.

Zoutendyk, John A.