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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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Onsite 40-kilowatt fuel cell power plant manufacturing and field test program

A joint Gas Research Institute and U.S. Department of Energy Program was initiated in 1982 to evaluate the use of fuel cell power systems for on-site energy service. Forty-six 40 kW fuel cell power plants were manufactured at the United Technologies Corporation facility in South Windsor, Connecticut, and are being delivered to host utilities and other program participants in the United States and Japan for field testing. The construction of the 46 fully-integrated power plants was completed in January 1985 within the constraints of the contract plan. The program has provided significant experience in the manufacture, acceptance testing, deployment, and support of on-site fuel cell systems. Initial field test results also show that these experimental power plants meet the performance and environmental requirements of a commercial specification. This Interim Report encompasses the design and manufacturing phases of the 40 kW Power Plant Manufacturing and Field Test program. The contract between UTC and NASA also provides UTC field engineering support to the host utilities, training programs and associated manuals for utility operating and maintenance personnel, spare parts support for a defined test period, and testing at UTC of a power plant made available from a preceding program phase. These activities are ongoing and will be reported subsequently.

Source record↗

High Performance Spacecraft Computing (HPSC) Middleware Update

High Performance Spacecraft Computing (HPSC) is a joint project between the National Aeronautics and Space Administration (NASA) and Air Force Research Lab (AFRL) to develop a high-performance multi-core radiation hardened flight processor. HPSC offers a new flight computing architecture to meet the needs of NASA missions through 2030 and beyond. Providing on the order of 100X the computational capacity of current flight processors for the same amount of power, the multicore architecture of the HPSC processor, or "Chiplet" provides unprecedented flexibility in a flight computing system by enabling the operating point to be set dynamically, trading among needs for computational performance, energy management and fault tolerance. The HPSC Chiplet is being developed by Boeing under contract to NASA, and is expected to provide prototypes, an evaluation board, system emulators, comprehensive system software, and a software development kit. In addition to the vendor deliverables, the AFRL is funding the development of a flexible Middleware to be developed by NASA Jet Propulsion Laboratory and NASA Goddard Space Flight Center. The HPSC Middleware provides a suite of thirteen high level services to manage the compute, memory and I/O resources of this complex device.This presentation will provide an HPSC project update, an overview of the latest HPSC System Software release, an overview of HPSC Middleware Release 2, and a preview of the third HPSC Middleware release. The presentation will begin with a project update that will provide a look at the high-level changes since the project was introduced at the Flight Software Workshop last year. Next, the presentation will provide an overview of the current suite of HPSC System Software which includes the vendor provided bootloaders, operating systems, emulator, and development tools. Next, the HPSC Middleware progress will be presented, which includes an overview of the features and capabilities of HPSC Middleware Release 2, followed by a look at the reference flight software applications which utilize the Middleware. Finally, the presentation will give a preview of the HPSC Middleware Release 3.

Cudmore, Alan↗