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A Vertical GaN-Based Neutral-Pointless Three-Level Inverter for High-Performance Automotive Traction Applications

Silicon Carbide (SiC) MOSFETs have emerged as a dominant solution for electric vehicle traction inverters because of their superior power density and efficiency compared to Silicon (Si) counterparts. However, SiC devices possess inherent switching speed limitations that constrain the maximum switching frequency and hinder further power density and efficiency improvements. To address these limitations, this paper proposes a vertical Gallium Nitride (vGaN) based X-type Neutral-Pointless (NPL.X) three-level (3L) inverter for an 800V, 200 kW traction system. Integrating 700V vGaN technology within the NPL.X 3L topology enables improved drive efficiency and higher switching frequencies, resulting in enhanced power density and output power quality. To evaluate the performance benefits, this work conducts a comprehensive loss characterization of the vGaN￾based NPL.X topology, providing a direct comparison with a SiC￾based two level (2L) inverter. The results show that the proposed vGaN-based inverter achieves superior efficiency, particularly within the low-torque regions that dominate standard automotive drive cycles. The proposed vGaN-based inverter represents a critical advancement toward high-power-density and high efficiency traction drives

Halawa, Ali [Purdue Univ., West Lafayette, IN (Uni

Postfault Operation of Three-Level Inverter Driven Six-Phase PMSM With Enhanced Torque–Speed Region

This article presents an open-switch postfault operational technique with enhanced torque–speed region for three-level (3L) active neutral point clamped (ANPC) inverter-driven symmetrical six-phase (SSP) permanent magnet synchronous machines (PMSMs). Maximum torque (MT), minimum loss (ML), and single three-phase (STP) operations are commonly used for the postfault operations of six-phase drives. The maximum possible torque and speed in these operations are generally limited by voltage, current ratings, and the neutral point configuration of the motor. To enhance the postfault torque and speed operating region, the torque and speed limits in different postfault operational techniques are determined based on the voltage, current constraints, and neutral point configuration of the SSP-PMSM. In this work, a unified postfault operation is proposed that increases the postfault operational limits by combining MT, ML, and STP operations and modifying the neutral point configuration of the SSP-PMSM. In addition, a technique is also presented that modifies the pulsewidth modulation technique to enable full torque operation below 0.5 p.u. speed. The proposed postfault operational technique enables full-speed (1 p.u.) operation by operating in STP mode and full torque operation (1 p.u.) below 0.5 p.u. speed. Furthermore, the postfault operational technique is experimentally validated using a Gallium Nitride (GaN) device-based3L-ANPC inverter-driven SSP-PMSM.

42 ENGINEERING

DC-Link Capacitor Design for a Neutral-Point-Less Three-Level Dual-Phase Inverter for Traction Application

Conventional multilevel inverters, such as neutral￾point-clamped and T-type inverters, have gained popularity in electric vehicle applications due to their advantages, including high voltage range, high power capability, low switching losses, low total harmonic distortion, and low electromagnetic interference. However, these traditional multilevel inverters require a neutral point connection to generate a zero-voltage vector. The neutral point current oscillates at three times the fundamental frequency, leading to voltage imbalance and overvoltage stress on the power modules. Additionally, the use of two stacked DC-link capacitors increases the volume required for the same overall capacitance and complicates packaging due to ripple current and heat dissipation from separate components. This is a significant concern for traction drive units, where space is limited. In this paper, a neutral-point-less multilevel dual three￾phase inverter topology is investigated for traction inverter applications. Simulation results demonstrate that the proposed topology effectively retains the benefits of multilevel operation while utilizing a single DC-link capacitor. The inverter model was simulated in conjunction with an industry-standard battery model to evaluate the potential for capacitor size reduction compared to a conventional three-level inverter.

33 ADVANCED PROPULSION SYSTEMS

A Digital Three Level Space Vector Modulator for High Frequency Vector Sequence Generation

This letter proposes a digital high-speed three-level space vector pulse width modulator (3L-SVPWM). A conventional 3L-SVPWM is typically computation-based, involving a sequential execution of sub-tasks on a digital signal processor (DSP) based controller. The resulting high computation time of 5.4 μs limits the implementation of additional control blocks for switching frequencies greater than 100 kHz. This is overcome by transforming sub-tasks into digital blocks with 1-0 decisions and simpler arithmetic operations. The sub-task blocks are executed concurrently on a programmable logic device (PLD). Hence, a fast 3L-SVPWM execution in 140 ns is achieved. The proposed digital 3L-SVPWM enables high switching frequency operation of wide bandgap (WBG) device-based 3 L inverters to generate high fundamental frequency waveforms. A finite state machine is an integral part of the proposed implementation with the ability to generate any vector sequence, maximizing the usage of redundant vector states in 3L-SVPWM. Here, the proposed digital 3L-SVPWM operation is demonstrated with a GaN-based 3 L active neutral point clamped (3L-ANPC) inverter. Experimental results are presented at 250 kHz switching frequency to generate vector sequences for center-aligned SVPWM (CA-SVPWM) and common mode voltage reduced SVPWM (CMVR-SVPWM). The results also showcase a high fundamental frequency generation capability of 10 kHz.

active neutral point clamped inverter