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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 19 records
All sourcesNASA NTRSDOE OSTI
DOE OSTI2024

Frontier system-on-chip (SoC) technology for microwave diagnostics (invited)

The next generation of fusion reactors, exemplified by projects such as the Demonstration Power Plant following the International Thermonuclear Experimental Reactor, faces the monumental challenge of proving the viability of generating electricity through thermonuclear fusion. This pursuit introduces heightened complexities in diagnostic methodologies, particularly in microwave-based diagnostics. The increased neutron fluence necessitates significant reductions in vessel penetrations and the elimination of internal diagnostics, posing substantial challenges. SoC technology offers a promising solution by enabling the miniaturization, modularization, integration, and enhancing the reliability of microwave systems. After seven years of research, our team successfully pioneered the V- and W-band system-on-chip approach, leading to the development of active transmitters and passive receiver modules applied in practical settings, notably within the DIII-D tokamak project. Arrays of these modules have supported microwave imaging diagnostics. New physics measurement results from the Electron Cyclotron Emission Imaging system on DIII-D provide compelling evidence of improved diagnostics following the adoption of SoC technology. Furthermore, we achieved a breakthrough in developing an F-band SoC, advancing higher frequency capabilities for fusion devices. These achievements represent a significant leap forward in fusion diagnostic technology, marking substantial progress toward establishing reliable and efficient plasma diagnostics for future fusion reactors.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗
DOE OSTI2025

Initial assessment of second generation of large-area picosecond photodetectors with multi-channel systems-on-a-chip readout

Here, we first briefly describe the history and motivation behind Cherenkov and scintillation light detection. We then discuss the instrumentation needed to detect these photons as it applies to both photodetectors and readout electronics. One of the motivations is future large neutrino detectors that could, in principle, differentiate between Cherenkov and scintillation light if using novel water-based scintillators. In this paper, we present the first measurements utilizing the second generation of Large Area Picosecond Photodetectors (LAPPDs) in conjunction with commercial system-on-a-chip readouts from Nalu Scientific—in particular, the High Density System on Chip (HDSoC) and Advanced ASoC Rapid Digitizer, Variable Adaptive Readout Chip (AARDVARC) platforms. These state-of-the-art full-waveform digitizers feature sampling rates on the order of 1 and 10 samples per nanosecond, respectively. Using a picosecond laser, we measured the timing jitter between a pair of LAPPD channels, demonstrating the potential of this setup for precise timing applications.

Li, V. A. [Lawrence Livermore National Laboratory ↗
DOE OSTI2026

Non-Invasive Electrode Impedance Estimation for Optimized Charge Profile Parameterization of Lithium-Ion Batteries

This work presents a non-invasive method for parameterizing a physically motivated equivalent circuit model of lithium-ion batteries using operando electrochemical impedance spectroscopy and time-domain data. The proposed model consists exclusively of linear circuit elements, enabling computationally efficient simulation and real-time implementation on battery management system chips. By integrating frequency- and time-domain measurements, the model accurately estimates internal states such as the negative electrode potential, achieving a root mean square error of 12.3 mV during fast charging validation. Parameterization requires only rate tests with sinusoidal perturbations at three different ambient temperatures, making the approach experimentally accessible. The model reveals key insights into battery behavior, including rate-dependent overpotentials primarily governed by charge transfer kinetics at the positive electrode, and temperature-dependent impedance contributions from both charge transfer and solid-state diffusion processes. Validation using reference electrodes confirms the model’s ability to detect lithium plating onset and reproduce impedance behavior across a wide range of operating conditions. The approach enables in situ optimization of fast charging profiles and lays the foundation for future extensions incorporating aging effects and plating dynamics.

25 ENERGY STORAGE↗
DOE OSTI2024

Scalable DAQ system operating the CHIPS-5 neutrino detector

The CHIPS R&D project focuses on development of low-cost water Cherenkov neutrino detectors through novel design strategies and resourceful engineering. This work presents an end-to-end DAQ solution intended for a recent 5 kt CHIPS prototype, which is largely based on affordable mass-produced components. Much like the detector itself, the presented instrumentation is composed of modular arrays that can be scaled up and easily serviced. A single such array can carry up to 30 photomultiplier tubes (PMTs) accompanied by electronics that generate high voltage in-situ and deliver time resolution of up to 0.69 ns. In addition, the technology is compatible with the White Rabbit timing system, which can synchronize its elements to within 100 ps. While deployment issues did not permit the presented DAQ system to operate beyond initial evaluation, the presented hardware and software successfully passed numerous commissioning tests that demonstrated their viability for use in a large-scale neutrino detector, instrumented with thousands of PMTs.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2025

Productivity and cost of energy chipping with non-integrated harvesting systems in the Coastal Plain of the US south

Research from the 1980s–2010s suggested that integrated harvesting systems that harvest conventional products (e.g., sawtimber, pulpwood) and energy chips simultaneously were the most effective solution to produce energy chips in the US South. Alternatives, such as biomass-only systems, have important advantages in forest stands with low volumes of merchantable timber. The goal of this study was to estimate the productivity and cost of producing energy chips using non-integrated systems. Innovative chipping contractors using non-integrated systems were identified through contacts with procurement foresters responsible for purchasing energy chips. Elemental time-and-motion studies were conducted to estimate harvesting productivity on five operations, including one clearcut harvest and four first thinnings in overstocked stands. The hourly cost of equipment was estimated using the machine rate method. Cost per tonne was estimated by combining hourly productivity and hourly costs in a modified version of the Auburn Harvesting Analyzer. System productivity averaged 37 tonnes per scheduled machine hour (smh) and cut-and-haul costs averaged $33.86 t −1 (USD), which was comparable to previous estimates from integrated systems. In conclusion, this study suggests there are viable alternatives to integrated harvesting systems to produce energy chips, especially in stands with low volumes of merchantable timber.

09 BIOMASS FUELS↗
DOE OSTI2024

Internship Work Report

I worked on two projects during my summer internship at Sandia. My official title was “Intern - Mission Tech Electrical Eng./Computer Eng.- R&D Undergraduate Summer.” I worked at the central location, which is Albuquerque, New Mexico. The department you are placed in at Sandia doesn’t always correspond to the people you will be working with. For example, I only directly worked with one person from my department this summer. On one of my projects, I worked with a diverse team of engineers from many different departments. On my other project, I mainly worked with two departments, as the project had two distinct parts. As mentioned earlier, I worked on two projects during my summer at Sandia. The first project focused on a lightweight embedded controller in an advanced FPGA System-on-Chip for radar signal processing applications. The term “controller” refers to a hardware device that directs the flow of data between two entities. An FPGA is a reprogrammable integrated circuit (as opposed to an integrated circuit with one purpose). An FPGA was used on this project so in order to protype various ideas for our System-on-Chip. My role on the project was to implement designs on the fabric of the FPGA and design a state machine (written in C) for the processor. My second project was also heavily involved with embedded systems but had a different application. It focused on using a Newton-Raphson control algorithm to stabilize an inverted pendulum using a novel microcontroller. The pendulum dynamics were derived, and it was successfully simulated in MATLAB. I worked on integrating the microcontroller with the inverted pendulum machinery, and converting the Newton-Raphson control algorithm from MATLAB into C. The inverted pendulum was successfully stabilized using a simple PID controller and industry-standard microcontroller. The project is still ongoing, and the team is gearing up for more tests using the novel Newton-Raphson control algorithm and novel microcontroller

42 ENGINEERING↗
DOE OSTI2025

A Synthesis Methodology for Intelligent Memory Interfaces in Accelerator Systems

Domain-specific systems improve the performance of a specific set of applications compared to general-purpose processing systems by deploying custom hardware accelerators. These hardware accelerators are generated using high-level synthesis (HLS) tools. The HLS tools enable a comprehensive design space exploration to optimize the compute performance of the generated accelerators. However, they often ignore the challenges of implementing the accelerators in a system-on-chip, particularly how the accelerators access memory. Our work introduces a buffering system design that improves accelerators' memory accesses by intelligently employing burst transactions to prefetch useful data from external memory to on-chip local buffers. Our design is dynamic, parametric, and transparent to the accelerators generated by HLS tools. We derive the buffering system parameters using appropriate compiler-based analysis passes and memory channel latency constraints. The proposed buffering system design results in, on average, 8.8x performance improvements while lowering memory channel utilization on average by 53.2% for a set of PolyBench kernels.

Limaye, Ankur M. (ORCID:0000000194062584)↗
DOE OSTI2025

End-to-End Workflow for Machine-Learning-Based Qubit Readout With QICK and hls4ml

In this article, we present an end-to-end workflow for superconducting qubit readout that embeds codesigned neural networks into the quantum instrumentation control kit (QICK). Capitalizing on the custom firmware and software of the QICK platform, which is built on Xilinx radiofrequency system-on-chip field-programmable gate arrays (FPGAs), we aim to leverage machine learning (ML) to address critical challenges in qubit readout accuracy and scalability. The workflow utilizes the hls4ml package and employs quantization-aware training to translate ML models into hardware-efficient FPGA implementations via user-friendly Python application programming interfaces. We experimentally demonstrate the design, optimization, and integration of an ML algorithm for single transmon qubit readout, achieving 96% single-shot fidelity with a latency of 32.25 ns and less than 16% FPGA lookup table resource utilization. Our results offer the community an accessible workflow to advance ML-driven readout and adaptive control in quantum information processing applications.

42 ENGINEERING↗
DOE OSTI2025

A compact low-level RF control system for advanced concept compact electron linear accelerator

A compact low-level RF (LLRF) control system based on RF system-on-chip (RFSoC) technology has been designed for the Advanced Concept Compact Electron Linear-accelerator (ACCEL) program, which has challenging requirements in both RF performance and size, weight, and power consumption (SWaP). The compact LLRF solution employs the direct RF sampling technique of RFSoC, which samples the RF signals directly without any analog upconversion and downconversion. Compared with the conventional heterodyne based architecture used for the LLRF system of a linear accelerator (LINAC), the elimination of analog mixers can significantly reduce the size and weight of the system, especially with LINAC requiring a larger number of RF channels. Based on the requirements of ACCEL, a prototype LLRF platform has been developed, and the control schemes have been proposed. The prototype LLRF system demonstrated magnitude and phase fluctuation levels below 1% and 1° on the flattop of a 2 μs RF pulse. The LLRF control schemes proposed for ACCEL are implemented with a prototype hardware platform. In conclusion, this paper will introduce the new compact LLRF solution and summarize a selection of experimental test results of the prototype itself and with the accelerating structure cavities designed for ACCEL.

Liu, C. [SLAC National Accelerator Laboratory (SLA↗
DOE OSTI2025

Local Thermal Conductivity Patterning in Rotating Lattice Crystals of Anisotropic Sb 2 S 3

The ability to control material heat transport properties over space and time can drive advanced functionalities in thermal management for electronics and system-on-chip, and enable thermal circuits. Despite the technological relevance, there are limited demonstrations of local thermal property control. Rotating lattice single (RLS) crystals—formed via laser-induced crystallization of an amorphous substrate—offer a novel avenue for local crystal engineering, unlocking opportunities for microscale property patterning. Here, thermal conductivity (𝜅) imaging is applied to RLS crystals of Sb2S3 to resolve microscale 𝜅 variations across patterned regions. Amorphous areas exhibit 𝜅 as low as 0.6 Wm −1 K −1 , while crystalline regions display periodic 𝜅 variations from 0.7 to over 2.5 Wm −1 K −1 . These variations correspond to changes in crystal orientation, revealing marked 𝜅 anisotropy. The crystal out-of-plane direction (c axis)—featuring van der Waals bonds—shows amorphous-like transport, whereas in-plane directions (a, b axes) exhibit 3.5x and 1.7x larger 𝜅, respectively. First-principles calculations, in excellent agreement with experiments, suggest that the in-plane anisotropy originates from expressed Sb lone pairs, which impart a corrugation along the b axis affecting bond stiffness and 𝜅. These findings demonstrate microscale control of thermal properties via laser-processed metastructures, with significant implications for next-generation thermal management.

14 SOLAR ENERGY↗
DOE OSTI2024

Performance evaluation of an RFSoC operating in a 1.25 Tesla magnetic field

Here, the Belle II experiment at the SuperKEKB collider is preparing for an upgrade after 2027–2028 to handle higher luminosity and increased background rates. A Radio Frequency System-on-Chip (RFSoC) has been identified as a potential candidate for a common front-end upgrade for subsystems requiring high-speed waveform digitization. The RFSoC's ADC and DAC channels were tested across various magnetic field strengths and a few different field orientations. Power consumption and boot memory functionality were also assessed. Results indicate stable operation with negligible performance degradation, suggesting the RFSoC's viability for high-speed digitization tasks in high magnetic field environments.

47 OTHER INSTRUMENTATION↗
DOE OSTI2025

Radio Frequency Field Programable Gate Array Implementation of Reflectometry Cable Monitoring

PNNL has developed an innovative cable testing system that leverages the Xilinx RF System-on-Chip (RFSoC) technology to create a more flexible and capable measurement tool than traditional approaches. The architecture is designed on the ZCU111 development board and takes advantage of the high-speed digital to analog converters (DAC) and analog to digital converters (ADC) to generate and capture digitally synthesized waveforms. The platform allows engineers to easily adjust power, frequency, duration and modulation on the fly rather than being locked into fixed hardware configurations

Tedeschi, Jonathan [Pacific Northwest National Lab↗
DOE OSTI2026

SIMBER: the Simula Berkeley Education and Research Collaboration (CRADA Final Report)

The SIMBER project is centered around advancing the state-of-the-art in the science of modelling of the human heart and leveraging the collaborations between leading research groups at the University of California Berkeley (UC Berkeley), the Lawrence Berkeley National Laboratory (Berkeley Lab), and Simula Research Laboratory (Simula). In particular, the following areas of expertise are shared and expanded through this project: “heart-on-chip” experimental systems from UC Berkeley, mathematical modelling of the heart from Simula, and supercomputing software from Simula and Berkeley Lab. This intersection of expertise is already enabling the development of novel tools and knowledge that produce more accurate models of the human heart in both health and disease, which in turn are leading to drug screening technologies that make cardiac drug development faster, cheaper and more humane.

Li, Xiaoye Sherry [Lawrence Berkeley National Labo↗
DOE OSTI2025

Passband Signal Detection at the Edge

Algorithms for radio frequency (RF) spectrum awareness need to be compatible with edge hardware to be practical for many applications. We developed a signal detection and classification model for the ZCU111 RF System-on-a-Chip (RFSoC) that operates on the fast Fourier transform of passband RF data. The system can detect and classify multiple signals of interest and display the predictions in real-time. The model consists of a modified ConvNeXt backbone and YOLOv3 head to operate on the Deep Learning Processing Unit on the RFSoC. We gathered datasets for training and testing by using a software defined radio to transmit example signals of Wi-Fi 802.11 b/g, Wi-Fi 802.11 n, FM Radio, LTE and LTE-M. By leveraging multiple inputs on the RFSoC frontend, the datasets span up to 4 GHz of bandwidth. The models showed high performance in classification accuracy, center frequency error, bandwidth error, and detection accuracy for both single and multi-signal datasets.

42 ENGINEERING↗
DOE OSTI2026

Scalable multiplexed machine learning gas sensor chips for food classification

Multiplexed gas sensor arrays combined with machine learning have unlocked previously inaccessible applications for scent-based sensing. Current platforms are limited by overlapping sensing materials with similar compositions, leading to highly correlated responses, or multistep deposition processes that hinder scalability. In this work, we developed a 16-element monolithic chip with fully distinct sensing layers, enabling a truly heterogeneous array. The system consists of highly sensitive carbon nanotube field effect transistors that are functionalized through a single-step microdispensing method compatible with automated pipetting systems. The resulting chip produces characteristic signal patterns in response to object-specific scent profiles and, when combined with machine learning algorithms, can perform automated object identification. We demonstrate the classification of 16 different objects, including food spoilage and nut allergens, with a 92.6% overall prediction accuracy.

Bassil, Carla [University of California, Berkeley,↗
DOE OSTI2025

An on-chip phased array for non-classical light

Abstract Quantum science and technology can offer fundamental enhancements in sensing, communications and computing. The expansion from wired to wireless links is an exciting prospect for quantum technologies. For classical technologies, the advent of phased arrays enabled directional and adaptive wireless links by manipulating electromagnetic waves over free space. Here we demonstrate a phased array system on a chip that can receive, image and manipulate non-classical light over free space. We use an integrated photonic-electronic system with more than 1000 functional components on-chip to detect squeezed light. By integrating an array of 32 sub-wavelength engineered metamaterial antennas, we demonstrate a direct free-space-to-chip interface for reconfigurable quantum links. On the same chip, we implement a large-scale array of quantum-limited coherent receivers that can resolve non-classical signals simultaneously across 32 channels. With coherent readout and manipulation of these signals, we demonstrate 32-pixel imaging and spatially configurable reception of squeezed light over free space. Our work advances wireless quantum technologies that could enable practical applications in quantum communications and sensing.

Science & Technology - Other Topics↗
DOE OSTI2025

Radio Frequency Field Programable Gate Array Implementation of Reflectometry Cable Monitoring

This document describes the development of a field programable gate array (FPGA) radio frequency system on a chip (RF SoC) adaptation and evaluation of the single-board device to perform both Frequency Domain Reflectometry (FDR) and Spread Spectrum Time Domain Reflectometry (SSTDR) for offline and online cable testing. The work builds on and leverages the work of Pacific Northwest National Laboratory (PNNL) in airport millimeter wave technology by using the same development hardware employed in that program. The work is performed under sponsorship from the U.S. Department of Energy (DOE) Light Water Reactor Sustainability (LWRS) program and the task objective is to confirm and demonstrate feasibility to adapt FPGA technology for a cost-effective multiplexed single-board electronic module to perform cable tests that are equivalent to commercial and laboratory test instruments for FDR and SSTDR cable tests. The developed 2-channel (extendable to 7 channels) system was compared to dedicated and proven test instruments and shown to produce equivalent results on a range of cables and with a range of damage types. The FPGA reflectometry test board is one of several technologies that could facilitate implementation of online monitoring of safety critical cable systems.

42 ENGINEERING↗