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NASA Center for Integrated Space Microsystems

Develop and maintain a world class, leading edge capability in Advanced Avionic Systems and Advanced Microelectronics Technologies for future highly integrated, miniaturized, autonomous spacecraft systems for deep-space and Earth orbiting missions.

CISM Avionics Microelectronics Miniaturization Aut

A Multi-Mission Testbed for Advanced Technologies

The mission of the Center for Space Integrated Microsystem (CSIM) at the Jet Propulsion Laboratory is to develop advanced avionics systems for future deep space missions. The Advanced Micro Spacecraft (AMS) task is building a multi-mission testbed facility to enable the infusion of CSIM technologies into future missions. The testbed facility will also perform experimentation for advanced avionics technologies and architectures to meet challenging power, performance, mass, volume, reliability, and fault tolerance of future missions. The testbed facility has two levels of testbeds: (1) a Proof-of-Concept (POC) Testbed and (2) an Engineering Model Testbed. The methodology of the testbed development and the process of technology infusion are presented in a separate paper in this conference. This paper focuses only on the design, implementation, and application of the POC testbed. Additional information is contained in the original extended abstract.

Chau, S. N.

A Library of Rad Hard Mixed-Voltage/Mixed-Signal Building Blocks for Integration of Avionics Systems for Deep Space

To build the sensor intensive system-on-a-chip for the next generation spacecrafts for deep space, Center for Integration of Space Microsystems at JPL (CISM) takes advantage of the lower power rating and inherent radiation resistance of Silicon on Insulator technology (SOI). We are developing a suite of mixed-voltage and mixed-signal building blocks in Honeywell's SOI process that can enable the rapid integration of the next generation avionics systems with lower power rating, higher reliability, longer life, and enhanced radiation tolerance for spacecrafts such as the Europa Orbiter and Europa Lander. The mixed-voltage building blocks are predominantly for design of adaptive power management systems. Their design centers around an LDMOS structure that is being developed by Honeywell, Boeing Corp, and the University of Idaho. The mixed-signal building blocks are designed to meet the low power, extreme radiation requirement of deep space applications. These building blocks are predominantly used to interface analog sensors to the digital CPU of the next generation avionics system on a chip. Additional information is contained in the original extended abstract.

Mojarradi, M. M.

Integration of Passive Components for Spacecraft Avionics

The NASA roadmap outlining future deep space missions to Europa and other outer planetary destinations calls for continued reductions in the mass and volume of the spacecraft avionics. Spacecraft power electronics, including the power switches and converters, remain difficult to miniaturize due to the need for large numbers of discrete passive components such as resistors, capacitors, inductors and transformers. As part of the System-on-a-chip program at the Center for Integrated Space Microsystems and at the University of Arkansas, we are working to develop integrated or embedded passive components geared specifically for use in power management and distribution (PMAD) in future avionics over the next five to ten years. This will not only enable a scaling down of the power subsystems, but will make possible new architectures such as "distributed" PMAD. Additional information is contained in the original extended abstract.

Brandon, E. J.

NASA's 3D Flight Computer for Space Applications

The New Millennium Program (NMP) Integrated Product Development Team (IPDT) for Microelectronics Systems was planning to validate a newly developed 3D Flight Computer system on its first deep-space flight, DS1, launched in October 1998. This computer, developed in the 1995-97 time frame, contains many new computer technologies previously never used in deep-space systems. They include: advanced 3D packaging architecture for future low-mass and low-volume avionics systems; high-density 3D packaged chip-stacks for both volatile and non-volatile mass memory: 400 Mbytes of local DRAM memory, and 128 Mbytes of Flash memory; high-bandwidth Peripheral Component Interface (Per) local-bus with a bridge to VME; high-bandwidth (20 Mbps) fiber-optic serial bus; and other attributes, such as standard support for Design for Testability (DFT). Even though this computer system did not complete on time for delivery to the DS1 project, it was an important development along a technology roadmap towards highly integrated and highly miniaturized avionics systems for deep-space applications. This continued technology development is now being performed by NASA's Deep Space System Development Program (also known as X2000) and within JPL's Center for Integrated Space Microsystems (CISM).

Alkalai, Leon