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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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All sourcesNASA NTRSDOE OSTI
NASA NTRS1986

Area Reports. Advanced materials and devices research area. Silicon materials research task, and advanced silicon sheet task

The objectives of the Silicon Materials Task and the Advanced Silicon Sheet Task are to identify the critical technical barriers to low-cost silicon purification and sheet growth that must be overcome to produce a PV cell substrate material at a price consistent with Flat-plate Solar Array (FSA) Project objectives and to overcome these barriers by performing and supporting appropriate R&D. Progress reports are given on silicon refinement using silane, a chemical vapor transport process for purifying metallurgical grade silicon, silicon particle growth research, and modeling of silane pyrolysis in fluidized-bed reactors.

Source record↗
NASA NTRS1995

InGaAlAsPN: A Materials System for Silicon Based Optoelectronics and Heterostructure Device Technologies

A new material system is proposed for silicon based opto-electronic and heterostructure devices; the silicon lattice matched compositions of the (In,Ga,Al)-(As,P)N 3-5 compounds. In this nitride alloy material system, the bandgap is expected to be direct at the silicon lattice matched compositions with a bandgap range most likely to be in the infrared to visible. At lattice constants ranging between those of silicon carbide and silicon, a wider bandgap range is expected to be available and the high quality material obtained through lattice matching could enable applications such as monolithic color displays, high efficiency multi-junction solar cells, opto-electronic integrated circuits for fiber communications, and the transfer of existing 3-5 technology to silicon.

Broekaert, T. P. E.↗
NASA NTRS1980

Low-cost ion implantation and annealing technology for solar cells

Ion implantation and thermal annealing techniques for processing junctions and back surface layers in solar cells are discussed. Standard 10 keV (31)p(+) junction implants and 25 keV (11)B(+) back surface implants in combination with three-step furnace annealing are used for processing a range of silicon materials and device structures. Cells with efficiencies up to 16.5% AM1 are being produced, and large-area terrestrial cells with implanted junctions and back fields being fabricated in pilot production exhibit average efficiencies in excess of 15% AM1. Thermal annealing methods for removal of the radiation damage caused by implantation should be replaced by transient processing techniques in future production. Design studies have been completed for solar cell processing implanters to support 10 MW/yr and 100 MW/yr production lines, and analyses indicate that implantation costs can be reduced to approximately 1 cent/watt.

Kirkpatrick, A. H.↗
NASA NTRS1995

Applications of Silicon Carbide for High Temperature Electronics and Sensors

Silicon carbide (SiC) is a wide bandgap material that shows great promise in high-power and high temperature electronics applications because of its high thermal conductivity and high breakdown electrical field. The excellent physical and electronic properties of SiC allows the fabrication of devices that can operate at higher temperatures and power levels than devices produced from either silicon or GaAs. Although modern electronics depends primarily upon silicon based devices, this material is not capable of handling may special requirements. Devices which operate at high speeds, at high power levels and are to be used in extreme environments at high temperatures and high radiation levels need other materials with wider bandgaps than that of silicon. Many space and terrestrial applications also have a requirement for wide bandgap materials. SiC also has great potential for high power and frequency operation due to a high saturated drift velocity. The wide bandgap allows for unique optoelectronic applications, that include blue light emitting diodes and ultraviolet photodetectors. New areas involving gas sensing and telecommunications offer significant promise. Overall, the properties of SiC make it one of the best prospects for extending the capabilities and operational regimes of the current semiconductor device technology.

Silicon Carbide↗
NASA NTRS1985

Defects in silicon effect on device performance and relationship to crystal growth conditions

A relationship between material defects in silicon and the performance of electronic devices will be described. A role which oxygen and carbon in silicon play during the defects generation process will be discussed. The electronic properties of silicon are a strong function of the oxygen state in the silicon. This state controls mechanical properties of silicon efficiency for internal gettering and formation of defects in the device's active area. In addition, to temperature, time, ambience, and the cooling/heating rates of high temperature treatments, the oxygen state is a function of the crystal growth process. The incorporation of carbon and oxygen into silicon crystal is controlled by geometry and rotation rates applied to crystal and crucible during crystal growths. Also, formation of nucleation centers for oxygen precipitation is influenced by the growth process, although there is still a controversy which parameters play a major role. All these factors will be reviewed with special emphasis on areas which are still ambiguous and controversial.

Jastrzebski, L.↗
NASA NTRS1985

FSA future directions: FSA technology activities in FY86

The silicon material, advanced silicon sheet, device research, and process research activities are explained. There will be no new initiatives. Many activities are targeted for completion and the emphasis will then be on technology transfer. Industrial development of the fluidized-bed reactor (FBR) deposition technology is proceeding. Technology transfer and industry funding of sheet development are continuing.

Leipold, M. H.↗
NASA NTRS1973

Electrode materials for charge coupled devices

The use of polycrystalline silicon in charged coupled semiconductor devices is discussed. In particular, the electrical and optical properties of the material are characterized.

Gajda, W. T. J.↗
NASA NTRS1987

High-temperature electronics

In recent years, there was a growing need for electronics capable of sustained high-temperature operation for aerospace propulsion system instrumentation, control and condition monitoring, and integrated sensors. The desired operating temperature in some applications exceeds 600 C, which is well beyond the capability of currently available semiconductor devices. Silicon carbide displays a number of properties which make it very attractive as a semiconductor material, one of which is the ability to retain its electronic integrity at temperatures well above 600 C. An IR-100 award was presented to NASA Lewis in 1983 for developing a chemical vapor deposition process to grow single crystals of this material on standard silicon wafers. Silicon carbide devices were demonstrated above 400 C, but much work remains in the areas of crystal growth, characterization, and device fabrication before the full potential of silicon carbide can be realized. The presentation will conclude with current and future high-temperature electronics program plans. Although the development of silicon carbide falls into the category of high-risk research, the future looks promising, and the potential payoffs are tremendous.

Seng, Gary T.↗
NASA NTRS1993

Development of Si(1-x)Ge(x) technology for microwave sensing applications

The progress for the first year of the work done under the Director's Discretionary Fund (DDF) research project entitled, 'Development of Si(1-x)Ge(x) Technology for Microwave Sensing Applications.' This project includes basic material characterization studies of silicon-germanium (SiGe), device processing on both silicon (Si) and SiGe substrates, and microwave characterization of transmission lines on silicon substrates. The material characterization studies consisted of ellipsometric and magneto-transport measurements and theoretical calculations of the SiGe band-structure. The device fabrication efforts consisted of establishing SiGe device processing capabilities in the Lewis cleanroom. The characterization of microwave transmission lines included studying the losses of various coplanar transmission lines and the development of transitions on silicon. Each part of the project is discussed individually and the findings for each part are presented. Future directions are also discussed.

Mena, Rafael A.↗
NASA NTRS1993

Micro-opto-mechanical devices and systems using epitaxial lift off

The integration of high quality, single crystal thin film gallium arsenide (GaAs) and indium phosphide (InP) based photonic and electronic materials and devices with host microstructures fabricated from materials such as silicon (Si), glass, and polymers will enable the fabrication of the next generation of micro-opto-mechanical systems (MOMS) and optoelectronic integrated circuits. Thin film semiconductor devices deposited onto arbitrary host substrates and structures create hybrid (more than one material) near-monolithic integrated systems which can be interconnected electrically using standard inexpensive microfabrication techniques such as vacuum metallization and photolithography. These integrated systems take advantage of the optical and electronic properties of compound semiconductor devices while still using host substrate materials such as silicon, polysilicon, glass and polymers in the microstructures. This type of materials optimization for specific tasks creates higher performance systems than those systems which must use trade-offs in device performance to integrate all of the function in a single material system. The low weight of these thin film devices also makes them attractive for integration with micromechanical devices which may have difficulty supporting and translating the full weight of a standard device. These thin film devices and integrated systems will be attractive for applications, however, only when the development of low cost, high yield fabrication and integration techniques makes their use economically feasible. In this paper, we discuss methods for alignment, selective deposition, and interconnection of thin film epitaxial GaAs and InP based devices onto host substrates and host microstructures.

Camperi-Ginestet, C.↗
NASA NTRS1986

Space solar cell research: Problems and potential

The value of a passive, maintenance-free, renewable energy source was apparent in the early days of the space program, and the silicon solar cell was pressed into service. Efficiencies of those early space solar arrays were low, and lifetimes shorter than hoped for, but within a decade significant advances had been made in both areas. Better performance was achieved through improvements in silicon single crystal material, better device designs, and a better understanding of the factors that affect the performance of a solar cell in space. Chief among the latter, particularly for the mid-to-high altitude (HEO) and geosynchronous (GEO) orbits, are the effects of the naturally occurring particulate radiation environment. Although not as broadly important to the photovoltaic community at large as increased efficiency, the topic of radiation damage is critically important to use of solar cells in space, and is a major component of the NASA research program in space photovoltaics. A brief overview of some of the opportunities and challenges for space photovoltaic applications is given, and some of the current research directed at achieving high efficiency and controlling radiation damage in space solar cells is discussed.

Flood, D. J.↗
NASA NTRS1985

Crystal growth for high-efficiency silicon solar cells workshop: Summary

The state of the art in the growth of silicon crystals for high-efficiency solar cells are reviewed, sheet requirements are defined, and furture areas of research are identified. Silicon sheet material characteristics that limit cell efficiencies and yields were described as well as the criteria for the ideal sheet-growth method. The device engineers wish list to the material engineer included: silicon sheet with long minority carrier lifetime that is uniform throughout the sheet, and which doesn't change during processing; and sheet material that stays flat throughout device processing, has uniform good mechanical strength, and is low cost. Impurities in silicon solar cells depreciate cell performance by reducing diffusion length and degrading junctions. The impurity behavior, degradation mechanisms, and variations in degradation threshold with diffusion length for silicon solar cells were described.

Dumas, K. A.↗
NASA NTRS1986

High efficiency crystalline silicon solar cells

A review of the entire research program since its inception ten years ago is given. The initial effort focused on the effects of impurities on the efficiency of silicon solar cells to provide figures of maximum allowable impurity density for efficiencies up to about 16 to 17%. Highly accurate experimental techniques were extended to characterize the recombination properties of the residual imputities in the silicon solar cell. A numerical simulator of the solar cell was also developed, using the Circuit Technique for Semiconductor Analysis. Recent effort focused on the delineation of the material and device parameters which limited the silicon efficiency to below 20% and on an investigation of cell designs to break the 20% barrier. Designs of the cell device structure and geometry can further reduce recombination losses as well as the sensitivity and criticalness of the fabrication technology required to exceed 20%. Further research is needed on the fundamental characterization of the carrier recombination properties at the chemical impurity and physical defect centers. It is shown that only single crystalline silicon cell technology can be successful in attaining efficiencies greater than 20%.

Sah, C. Tang↗
NASA NTRS1986

Space solar cell research - Problems and potential

The value of a passive, maintenance-free, renewable energy source was immediately recognized in the early days of the space program, and the silicon solar cell, despite its infancy, was quickly pressed into service. Efficiencies of those early space solar arrays were low, and lifetimes shorter than hoped for, but within a decade significant advances had been made in both areas. Better performance was achieved because of a variety of factors, ranging from improvements in silicon single crystal material, to better device designs, to a better understanding of the factors that affect the performance of a solar cell in space. Chief among the latter, particularly for the mid-to-high altitude (HEO) and geosynchronous (GEO) orbits, are the effects of the naturally occurring particulate radiation environment. Although not as broadly important to the photovoltaic community at large as increased efficiency, the topic of radiation damage is critically important to use of solar cells in space, and is a major component of the NASA research program in space photovoltaics. This paper will give a brief overview of some of the opportunities and challenges for space photovoltaic applications, and will discuss some of the current reseach directed at achieving high efficiency and controlling the effects of radiation damage in space solar cells.

Flood, Dennis J.↗
NASA NTRS1985

Defects and device performance

The necessity for a low-cost crystalline silicon sheet material for photovoltaics has generated a number of alternative crystal growth techniques that would replace Czochralski (Cz) and float-zone (FZ) technologies. Efficiencies of devices fabricated from low resistivity FZ silicon are approaching 20%, and it is highly likely that this value will be superseded in the near future. However, FZ silicon is expensive, and is unlikely ever to be used for photovoltaics. Cz silicon has many of the desirable qualities of FZ except that minority-carrier lifetimes at lower resistivities are significantly less than those of FZ silicon. Even with Cz silicon, it is unlikely that cost goals can be met because of the poor-material yield that results from sawing and other aspects of the crystal rowth. Although other silicon sheet technologies have been investigated, almost all have characteristics that limit efficiency to approx. 16%. In summary, 20% efficient solar cells can likely be fabricated from both FZ and Cz silicon, but costs are likely to be ultimately unacceptable. Alternate silicon technologies are not likely to achieve this goal, but cost per watt figures may be eventually better than either of the single crystal technologies and may rival any thin-film technology.

Storti, G.↗
NASA NTRS2004

RFID and Memory Devices Fabricated Integrally on Substrates

Electronic identification devices containing radio-frequency identification (RFID) circuits and antennas would be fabricated integrally with the objects to be identified, according to a proposal. That is to say, the objects to be identified would serve as substrates for the deposition and patterning of the materials of the devices used to identify them, and each identification device would be bonded to the identified object at the molecular level. Vacuum arc vapor deposition (VAVD) is the NASA derived process for depositing layers of material on the substrate. This proposal stands in contrast to the current practice of fabricating RFID and/or memory devices as wafer-based, self-contained integrated-circuit chips that are subsequently embedded in or attached to plastic cards to make smart account-information cards and identification badges. If one relies on such a chip to store data on the history of an object to be tracked and the chip falls off or out of the object, then one loses both the historical data and the means to track the object and verify its identity electronically. Also, in contrast is the manufacturing philosophy in use today to make many memory devices. Today s methods involve many subtractive processes such as etching. This proposal only uses additive methods, building RFID and memory devices from the substrate up in thin layers. VAVD is capable of spraying silicon, copper, and other materials commonly used in electronic devices. The VAVD process sprays most metals and some ceramics. The material being sprayed has a very strong bond with the substrate, whether that substrate is metal, ceramic, or even wood, rock, glass, PVC, or paper. An object to be tagged with an identification device according to the proposal must be compatible with a vacuum deposition process. Temperature is seldom an issue as the substrate rarely reaches 150 F (66 C) during the deposition process. A portion of the surface of the object would be designated as a substrate for the deposition of the device. By use of a vacuum arc vapor deposition apparatus, a thin electrically insulating film would first be deposited on the substrate. Subsequent layers of materials would then be deposited and patterned by use of known integrated-circuit fabrication techniques. The total thickness of the deposited layers could be much less than the 100- m thickness of the thinnest state-of-the-art self-contained microchips. Such a thin deposit could be readily concealed by simply painting over it. Both large vacuum chambers for production runs and portable hand-held devices for in situ applications are available.

Schramm, Harry F.↗
NASA NTRS2016

Long-Term Reliability of a Hard-Switched Boost Power Processing Unit Utilizing SiC Power MOSFETs

Silicon carbide (SiC) power devices have demonstrated many performance advantages over their silicon (Si) counterparts. As the inherent material limitations of Si devices are being swiftly realized, wide-band-gap (WBG) materials such as SiC have become increasingly attractive for high power applications. In particular, SiC power metal oxide semiconductor field effect transistors' (MOSFETs) high breakdown field tolerance, superior thermal conductivity and low-resistivity drift regions make these devices an excellent candidate for power dense, low loss, high frequency switching applications in extreme environment conditions. In this paper, a novel power processing unit (PPU) architecture is proposed utilizing commercially available 4H-SiC power MOSFETs from CREE Inc. A multiphase straight boost converter topology is implemented to supply up to 10 kilowatts full-scale. High Temperature Gate Bias (HTGB) and High Temperature Reverse Bias (HTRB) characterization is performed to evaluate the long-term reliability of both the gate oxide and the body diode of the SiC components. Finally, susceptibility of the CREE SiC MOSFETs to damaging effects from heavy-ion radiation representative of the on-orbit galactic cosmic ray environment are explored. The results provide the baseline performance metrics of operation as well as demonstrate the feasibility of a hard-switched PPU in harsh environments.

Ikpe, Stanley A.↗