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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 19 records
All sourcesNASA NTRSDOE OSTI
DOE OSTI2020

Side Channel Considerations for SHA-512

We consider a theoretical side-channel attack on SHA-512; the attack should easily generalize to other algorithms in the SHA-2 family. Rather than looking at a side-channel attack on an HMAC, which has been done in various papers, we assume that the targeted device is applying the hash function as a pseudo-random function (prf) in order to generate a secret key from a secret seed, as recommended by NIST. The analyst uses side-channel information to try to recover the secret seed. We use entropy/information theory to show how one might judge whether or not a side-channel attack might be possible and/or feasible, and we show how the design of the implementation can affect the feasibility of an attack.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2021

Side-channel Leakage Assessment Metrics: A Case Study of GIFT Block Ciphers

Determination of an adequate level of security and providing subsequent mechanisms to achieve it, is one of the most pressing problems regarding embedded computing devices. While there are some solutions available for resource-rich computer systems, direct application of these solutions to resource-constrained environments are often unfeasible. The fundamental problem for such resource-constrained systems is the fact that current cryptographic algorithms utilize significant energy consumption and storage overhead. Both the cryptographic algorithm and its physical implementation affect the resilience of a cryptosystem against side-channel attacks. A side-channel attack represents a process that exploits leakages in order to extract sensitive information such as the key. This paper focuses on Correlation Power Analysis (CPA) which is side-channel attack based on the power consumption leakage. In 2016 the U.S. Commerce Department’s National Institute of Standards and Technology (NIST) initiated the call for proposals of new cryptographic algorithms to strengthen the cryptographic defense of networked devices against cyberattacks and to protect the data created by those innumerable device. This work evaluates S-boxes used by NIST candidates PICCOLO, GIFT, and PRESENT, as well as several S-box variants that demonstrated sufficient weaknesses against classical cryptanalysis, for a quantitative comparison in terms of resiliency to CPA attack. Three well-known theoretical metrics are evaluated: transparency order (TO and RTO), nonlinearity, and signal-to-noise (SNR) ratio, aiming to characterize the resistance of these S-boxes against adversaries exploiting physical leakages. Experimental results from attacks on an 8- bit XMEGA were obtained via the ChipWhisperer platform and of all the S-boxes evaluated, GIFT64 with a PICCOLO S-box was found to be the most susceptible to CPA. Results showed that variations in TO and RTO were not sufficient to ensure practical CPA resistance and that among S-boxes with equal non-linearity there were no significant differences in the TO and SNR variants.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2021

Side-channel Leakage Assessment Metrics: A Case Study of GIFT Block Ciphers

Determination of an adequate level of security and providing subsequent mechanisms to achieve it, is one of the most pressing problems regarding embedded computing devices. While there are some solutions available for resource-rich computer systems, direct application of these solutions to resource-constrained environments are often unfeasible. The fundamental problem for such resource-constrained systems is the fact that current cryptographic algorithms utilize significant energy consumption and storage overhead. Both the cryptographic algorithm and its physical implementation affect the resilience of a cryptosystem against side-channel attacks. A side-channel attack represents a process that exploits leakages in order to extract sensitive information such as the key. This paper focuses on Correlation Power Analysis (CPA) which is side-channel attack based on the power consumption leakage. In 2016 the U.S. Commerce Department’s National Institute of Standards and Technology (NIST) initiated the call for proposals of new cryptographic algorithms to strengthen the cryptographic defense of networked devices against cyberattacks and to protect the data created by those innumerable device. This work evaluates S-boxes used by NIST candidates PICCOLO, GIFT, and PRESENT, as well as several S-box variants that demonstrated sufficient weaknesses against classical cryptanalysis, for a quantitative comparison in terms of resiliency to CPA attack. Three well-known theoretical metrics are evaluated: transparency order (TO and RTO), nonlinearity, and signal-to-noise (SNR) ratio, aiming to characterize the resistance of these S-boxes against adversaries exploiting physical leakages. Experimental results from attacks on an 8- bit XMEGA were obtained via the ChipWhisperer platform and of all the S-boxes evaluated, GIFT64 with a PICCOLO S-box was found to be the most susceptible to CPA. Results showed that variations in TO and RTO were not sufficient to ensure practical CPA resistance and that among S-boxes with equal non-linearity there were no significant differences in the TO and SNR variants.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2019

A Little Something on the Side: Exploration of Power Side-channels in Embedded Cryptography

Given the ubiquity of embedded devices in modern society, strong cryptographic solutions are a necessity to ensure privacy and security. In addition to the challenges that traditional cryptography faces, embedded cryptography is more vulnerable to side-channel attacks due to its location in the hands of the (un)trusted user. We propose that adjusting the mathematical properties of the cryptosystems can affect the information leakage through these side-channels. Our experimental results confirm that the information leakage from power side-channels is heavily affected by both the mathematical structure as well as discrete implementation choices.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2026

DISARM: Target Electronic Device Informed Mitigation of Software Runtime Side-Channel Vulnerabilities

Program runtime/timing attacks exploit variations in a program’s execution times to extract sensitive information from the program (e.g. encryption keys, sensitive variable data, intellectual property). State-of-the-art solutions to runtime side-channel attacks attempt to balance the execution time of the sensitive code for different control flow paths to eliminate the timing leakage. However, during the mitigation process, most techniques do not consider the underlying hardware/device on which the target program is supposed to run on. This can lead to over-fixing (unnecessary extra operations), under-fixing (not solving the imbalance properly), and even failures. Here, we propose DISARM, a joint hardware-software methodology (unlike any existing solution) for mitigating runtime side-channel vulnerabilities that utilizes timing values from real embedded devices to generate targeted software fixes. We implement DISARM to support C/C++/Java source codes and validate it across 22 standard benchmarks. DISARM outperforms state-of-the-art solutions such as PENDULUM and DifFuzzaR in terms of execution time overhead, code size overhead, and correctness on five different embedded/edge devices.

Timing/runtime side-channel↗
DOE OSTI2024

Beyond the Bridge: Contention-Based Covert and Side Channel Attacks on Multi-GPU Interconnect

Recently, high-speed interconnects like NVLink have become a standard integration in modern multi-GPU systems, serving as a crucial bridge between CPUs and GPUs. This study highlights the vulnerability of multi-GPU systems to covert and side-channel attacks arising from congestion on these interconnects. An adversary, operating without special permissions, can extract private information about a victim's activities by monitoring NVLink congestion. Specifically, we leverage this insight to develop a covert channel attack across two GPUs, achieving a respectable bandwidth of 33 Kbps. Additionally, we introduce a side-channel attack that allows attackers to fingerprint applications on a remote GPU by probing the shared NVLink interconnect. We underscore the urgent nature of the threats posed by these attacks and advocate for heightened awareness within both industry and academia to implement multi-GPU interconnects with enhanced security measures.

Zhang, Yicheng↗
DOE OSTI2023

Spy in the GPU-box: Covert and Side Channel Attacks on Multi-GPU System

The deep learning revolution has been enabled in large part by GPUs, and more recently accelerators, which make it possible to carry out computationally demanding training and inference in acceptable times. As the size of machine learning networks and workloads continues to increase, multi-GPU machines have emerged as an important platform offered on High Performance Computing and cloud data centers. Since these machines are shared among multiple users, it becomes increasingly important to protect applications against potential attacks. In this paper, we explore the vulnerability of Nvidia's DGX multi-GPU machines to covert and side channel attacks. These machines consist of a number of discrete GPUs that are interconnected through a combination of custom interconnect (NVLink) and PCIe connections. We reverse engineer the interconnected cache hierarchy and show that it is possible for an attacker on one GPU to cause contention on the L2 cache of another GPU. We use this observation to first develop a covert channel attack across two GPUs, achieving the best bandwidth of around 4 MB/s. We also develop a prime and probe attack on a remote GPU allowing an attacker to recover the cache access pattern of another workload. This access pattern can be used in any number of side channel attacks: we demonstrate a proof of concept attack that fingerprints the application running on the remote GPU, with high accuracy. We also develop a proof of concept attack to extract hyperparameters of a machine learning workload. Our work establishes for the first time the vulnerability of these machines to microarchitectural attacks and can guide future research to improve their security.

Dutta, Sankha↗
DOE OSTI2020

Side Channel Considerations for AES Intermediate Rounds

We illustrate a theoretical side-channel analysis on the intermediate rounds of AES, using only the Hamming weights of the bytes registered after the S-box operation. Input and output state values are unknown. Simulations and a blind test were used to show the feasibility of the analysis under ideal conditions. General applicability of the idea and possible extensions are discussed, as well as limiting assumptions. Some implementation approaches are described in Appendix A, in the case of constrained computing capabilities (desktop or laptop).

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2025

Evaluation of additive manufacturing side channels for nuclear nonproliferation applications

The nuclear industry is continuing to grow and adopt new technologies to manufacture components. One of the technologies under consideration is additive manufacturing (AM). AM could make production of components at lower cost and could lessen lead times significantly. However, AM could be prone to proliferation risks. AM machines give off signatures during the manufacturing process, and these signatures offer an alternative means of observing the component. Correlations between these signatures and the geometry being manufactured could be developed; enabling proliferators as they could take advantage of these correlations to steal AM manufacturing instructions relating to nuclear technology. This work pertains to preliminary work exploring the feasibility of tapping into AM side channels to predict geometries being manufactured on AM machines. The feasibility of utilizing vibration to draw geometric correlations will be assessed on an Ultimaker 2 + thermoplastic 3D printer.

Additive manufacturing↗
DOE OSTI2022

CyOTE ASSET OWNER ENGAGEMENT – SIDE CHANNEL POWER ANALYSIS PROTOTYPE

The U.S. Department of Energy’s (DOE) Office of Cybersecurity, Energy Security, and Emergency Response (CESER), through the Cybersecurity for the Operational Technology Environment (CyOTE) Program, worked with energy sector asset owners and operators (AOOs), partners, and Idaho National Laboratory (INL) to develop capabilities for AOOs to independently identify adversarial tactics, techniques, and procedures (TTPs) within their operational technology (OT) environments. The CyOTE methodology seeks to identify adversarial techniques within an AOO OT environment that could result in physical disruptions to energy flow or damage to equipment. CyOTE provides a general roadmap for AOOs, starting from a triggering event, or the point in time and space they perceive an anomalous event or condition meriting investigation, and culminating when the AOO has sufficient confidence to make a business risk decision on the appropriate resolution. This paper outlines the results of one such engagement with the New York Power Authority (NYPA), where the CyOTE program partnered with an AOO to develop a design specification for a power side channel detector to identify anomalous changes to device load. It describes the goal of developing this capability, the development process, the challenges the technical teams faced and the future steps an AOO will need to take to install and use this detector in its OT environment.

99 GENERAL AND MISCELLANEOUS↗
DOE OSTI2022

Detecting Hardware Trojans in PCBs Using Side Channel Loopbacks

Malicious modifications to printed circuit boards (PCBs) are known as hardware Trojans. These may arise when malafide third parties alter PCBs premanufacturing or postmanufacturing and are a concern in safety-critical applications, such as industrial control systems. In this research, we examine how data-driven detection can be utilized to detect such Trojans at run-time. We develop a flexible and reconfigurable PCB test bed derived from the popular open-source programmable logic controller (PLC) platform “OpenPLC.” We then develop a Trojan detection framework, which utilizes and analyzes multimodal side channels (e.g., timing, magnetic signals, power, and hardware performance counters). We consider defender-configurable input/output (I/O) loopback test, comparison with design-document baselines, and magnetometer-aided monitoring of system behavior under defender-chosen excitations. Our approach can extend to golden-free environments. Golden (known-good) versions of the PCBs are assumed not available, but design information, datasheets, and component-level data are available. We demonstrate the efficacy of our approach on a range of Trojans instantiated in the test bed.

42 ENGINEERING↗
DOE OSTI2026

Hardware Aware Mitigation of Timing Side-Channel Vulnerabilities in Critical Infrastructure Software

Program runtime/timing attacks exploit variations in a program’s execution times to extract sensitive information from the program (e.g. encryption keys, sensitive variable data, intellectual property). State-of-the-art solutions to runtime sidechannel attacks attempt to balance the execution time of the sensitive code for different control flow paths to eliminate the timing leakage. However, during the mitigation process, most techniques do not consider the underlying hardware/device on which the target program is supposed to run on. This can lead to over-fixing (unnecessary extra operations), under-fixing (not solving the imbalance properly), and even failures. We propose DISARM, a joint hardware-software methodology (unlike any existing solution) for mitigating runtime side-channel vulnerabilities that utilizes timing values from real embedded devices to generate targeted software fixes. We implement DISARM to support C/C++/Java source codes and validate it across 22 standard benchmarks. DISARM outperforms state-of-the-art solutions such as PENDULUM and DifFuzzAR in terms of execution time overhead (up to −46%), code size overhead (up to −10%), and correctness (no failures) on five different embedded/edge devices.

Suha, Tasneem [University of Maine]↗
DOE OSTI2021

Evaluation of Interior Cellular Shades in a Residential Building

Windows are major contributors to energy demand in residential homes because of their inferior thermal resistance compared with the opaque envelope and sometimes from unwanted solar heat gain. Window attachments can help to mitigate this demand by controlling the solar heat gains and enhancing the thermal resistance of the windows. In this study, the energy savings potential of cellular shades in residential homes is studied using experimental testing and energy simulations. The energy performance of the shading devices was experimentally tested during the heating season from December 2019 to May 2020 with a focus on cellular shades. Five shading devices—three single and two double cellular/cell-in-cell shades—were used to compare the performance with generic horizontal (venetian) blinds using two nearly identical sideby-side rooms in a residential building with their exterior window facing east. Another objective of the experimental testing was to evaluate any impact of the side-channel of the shading device on energy savings. To observe the impact of the side-channels on energy savings, from shades in two of the test cases, cellular shades with side-channels were used. From the experimental testing, daily energy savings in the range of 9% to 23% were observed by considering data from 6 p.m. until 6 a.m. of the next day.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗
DOE OSTI2023

Granular Flow in Novel Octet Shape–Based Lattice Frame Material

Moving packed-bed heat exchangers in concentrated solar power (CSP) plants involves heat transfer between heated falling particles and supercritical carbon dioxide. The overall effective thermal conductivity of the moving packed bed and particle-side channel contact resistances are still the bottlenecks in achieving the desirable thermal transport levels. To this end, a novel moving packed bed heat exchanger consisting of an Octet lattice packed between the walls of the particle-side channel is proposed in this study. Granular flow analysis in Octet lattice moving packed bed heat exchanger (OLHX) was conducted through experiments and discrete element method (DEM)-based numerical simulations. The experimental images clearly demonstrated stagnation regions upstream of lattice fibers, void regions downstream of the fiber junctions, and wavy-type unobstructed flow on the lateral sides of the fibers. DEM simulations were successful in capturing all these critical flow phenomena. Larger flow velocities were observed on the lateral sides of the fibers in the simulations. Also, when the particles in the silo were emptied, the final images showed an accumulation of particles on the inter-fiber as well as fiber–channel wall junctions. Moreover, the fiber connections resulted in some regions devoid of particle contact on the channel endwall, which means that these regions would suffer from poor thermal exchange. Finally, the overall mass flowrate increased with increasing porosity for a fixed particle diameter.

14 SOLAR ENERGY↗