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Results for “semiconductor device fabrication”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 19 records
All sourcesNASA NTRSDOE OSTI
DOE OSTI2024

A strategy to eliminate selenium oxide islands formed on the ZnSe/GaAs epilayer

Atomically clean and smooth surfaces are essential for semiconductor device fabrication and epitaxial regrowth. In this regard, spontaneously formed oxide islands or clusters on the surfaces of II-VI semiconductor exposures to air can disrupt interface formation. Using ZnSe/GaAs heterostructures grown by molecular beam epitaxy (MBE), we investigated the effect of surface treatments in eliminating oxide islands. The samples were probed with atomic force microscopy, low-temperature photoluminescence, and scanning electron microscopy. Here, it was found that ultra-high vacuum (UHV) annealing at 200°C, regardless of annealing duration, largely removed the islands while leaving the crystallinity of the ZnSe and GaAs epilayers unaffected. UHV annealing at higher temperatures of 300°C completely removed the islands, but the optical properties of ZnSe and/or GaAs epilayers deteriorated depending on the annealing duration. Our observations provide guidance to set thermal annealing strategies for removing oxide islands from the surfaces of II-VI/III-V semiconductor heterostructures depending on the desired properties.

36 MATERIALS SCIENCE↗
DOE OSTI2023

High-throughput manufacturing of epitaxial membranes from a single wafer by 2D materials-based layer transfer process

Layer transfer techniques have been extensively explored for semiconductor device fabrication as a path to reduce costs and to form heterogeneously integrated devices. These techniques entail isolating epitaxial layers from an expensive donor wafer to form freestanding membranes. However, current layer transfer processes are still low-throughput and too expensive to be commercially suitable. Here we report a high-throughput layer transfer technique that can produce multiple compound semiconductor membranes from a single wafer. We directly grow two-dimensional (2D) materials on III–N and III–V substrates using epitaxy tools, which enables a scheme comprised of multiple alternating layers of 2D materials and epilayers that can be formed by a single growth run. Each epilayer in the multistack structure is then harvested by layer-by-layer mechanical exfoliation, producing multiple freestanding membranes from a single wafer without involving time-consuming processes such as sacrificial layer etching or wafer polishing. Moreover, atomic-precision exfoliation at the 2D interface allows for the recycling of the wafers for subsequent membrane production, with the potential for greatly reducing the manufacturing cost.

77 NANOSCIENCE AND NANOTECHNOLOGY↗
DOE OSTI2020

Surface photovoltage spectroscopy observes junctions and carrier separation in gallium nitride nanowire arrays for overall water-splitting

Gallium nitride (GaN) nanowire arrays on silicon are able to drive the overall water-splitting reaction with up to 3.3% solar-to-hydrogen efficiency. Photochemical charge separation is key to the operation of these devices, but details are difficult to observe experimentally because of the number of components and interfaces. Here, we use surface photovoltage spectroscopy to study charge transfer in i-, n-, and p-GaN nanowire arrays on n+ -Si wafers in the presence and absence of Rh/Cr 2 O 3 co-catalysts. The effect of the space charge layer and sub-bandgap defects on majority and minority carrier transport can be clearly observed, and estimates of the built-in potential of the junctions can be made. Transient illumination of the p-GaN/n + -Si junction generates up to -1.4 V surface photovoltage by carrier separation along the GaN nanowire axis. This process is central to the overall water-splitting function of the n + -Si/p-GaN/Rh/Cr 2 O 3 nanowire array. Overall, these results improve our understanding of photochemical charge transfer and separation in group III–V semiconductor nanostructures for the conversion of solar energy into fuels.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗
DOE OSTI2022

Pit rim decomposition into multiple quantum dots on surfaces of epitaxial thin films grown on pit-patterned substrates

Here, we report results of dynamical simulations according to an experimentally validated surface morphological evolution model on the formation of regular arrays of quantum dot molecules (QDMs) consisting of 1D arrays of smaller interacting quantum dots (QDs). These QD arrays form along the sides of each pit rim on the surface of a coherently strained thin film epitaxially deposited on a semiconductor substrate, the surface of which consists of a periodic pattern of inverted prismatic pits with rectangular pit openings. We find that this complex QDM pattern results from the decomposition of the pit rim from a “quantum fortress” with four elongated QDs into four 1D arrays of multiple smaller QDs arranged along each side of the pit rim. Systematic parametric analysis indicates that varying the pit opening dimensions and the pit wall inclination directly impacts the number of QDs in the resulting QDM pattern, while varying the pit depth only affects the dimensions of the QDs in the nanostructure pattern. Therefore, the number, arrangement, and sizes of QDs in the resulting pattern of QDMs on the film surface can be engineered precisely by proper tuning of the pit design parameters. Our simulation results are supported by predictions of morphological stability analysis, which explains the pit rim decomposition into multiple QDs as the outcome of a tip-splitting instability and provides a fundamental characterization of the post-instability nanostructure pattern. Our theoretical findings can play a vital role in designing optimal semiconductor surface patterns toward enabling future nanofabrication technologies.

36 MATERIALS SCIENCE↗
DOE OSTI2023

Controlled Dielectric Breakdown to Form Pinhole Passivating Contacts

This contribution explores an alternate route to forming pinhole-based poly-Si/dielectric/c-Si passivating contacts. The method utilizes controlled dielectric breakdown or electroforming to produce nanoscale pinholes in a thick (non-tunnelling) dielectric which, when annealed, allows dopant atoms to pass from doped poly-Si through the pinholes and into the c-Si wafer, forming conductive pathways. We show that the pinholes lose passivation after electroforming but can be repassivated with a forming gas anneal. N-type contacts show contact resistivities of ~20 mOhm-cm2, but p-type contacts are ~100 mOhm-cm2. Devices show a distinct kink in the J-V curve indicative of a barrier to transport. The method can be expanded to optimized dielectric passivation stacks (not just thin, single layers) and can be formed in parallel over the faces of the wafer in selected areas (pinholes only under the grid lines).

CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND SU↗
DOE OSTI2024

Dislocation half-loop control for optimal V-defect density in GaN-based light emitting diodes

V-defects are morphological defects that typically form on threading dislocations during epitaxial growth of $(0001)$-oriented GaN layers. A V-defect is a hexagonal pyramid-shaped depression with six {$10\bar{1}1$}-oriented sidewalls. These semipolar sidewalls have a lower polarization barrier than the polarization barriers present between the polar c-plane quantum wells and quantum barriers and can laterally inject carriers directly into quantum wells in GaN-based light emitting diodes (LEDs). This is especially important, as the high polarization field in c-plane GaN is a significant factor in the high forward voltage of GaN LEDs. The optimal V-defect density for efficient lateral carrier injection in a GaN LED (∼10 9 cm −2 ) is typically an order of magnitude higher than the threading dislocation density of GaN grown on patterned sapphire substrates (∼10 8 cm −2 ). Pure-edge dislocation loops have been known to exist in GaN, and their formation into large V-defects via low-temperature growth with high Si-doping has recently been studied. Here, in this work, we develop a method for pure-edge threading dislocation half-loop formation and density control via disilane flow, growth temperature, and thickness of the half-loop generation layer. We also develop a method of forming the threading dislocation half-loops into V-defects of comparable size to those originating from substrate threading dislocations.

Crystallographic defects↗
DOE OSTI2022

Gallium Nitride Superjunction Transistor (Continued Funding Report)

The initial goal of this project is to develop the gallium vacancy assisted diffusion (GAID) method in GaN and apply it to demonstrate 2-terminal, 3-terminal, and large area Superjunction-enhanced modules. These devices will find use in high efficiency power conversion applications with the capability of operating at higher voltages, higher frequency, and less loss than comparable stat-ofthe-art devices. The approach of this project has been to utilize simulation tools to drive diffusion experiments and inform semiconductor device fabrication processes. VASP has been relied upon to simulate first principles diffusion mechanisms while SILVACO TCAD has been utilized to understand tradeoffs of the the critical dimensions in GaN devices.

42 ENGINEERING↗
DOE OSTI2023

Synthetic Metal Atomic Layer Deposition Tool (Final Report)

As part of the Cyclotron Road program, Laminera Inc. worked towards development of atomic layer deposition process customizations and tool modifications to produce synthetic metal films at commercial scale and improve the film quality. Today's state-of-the-art in atomic layer deposited synthetic metal technology is only possible at a research-scale because current tools have practical limitations for scaling industrially and generating high conductivity films. Ultrathin, conformal synthetic metal films have many possible applications such as high surface area nanoporous electrodes for supercapacitors and water desalination devices; protective electrode coatings for electrochemical devices; seed layers for semiconductor device fabrication; or metallic component stabilizing coatings that enable enhanced storage density in next generation hard disk drives. The best synthetic metal conductive and plasmonic properties have been demonstrated using sputtering, which relies on high temperature sputtering with substrate dependent and directional growth limiting usage. This work explored refining process and tool modifications to create ultrathin, conformal, synthetic metal films that can be deposited with high quality over complex three-dimensional surfaces.

36 MATERIALS SCIENCE↗
DOE OSTI2024

Modeling and Design of Micro Flux Monitors for Neutron Fluence Measurements

Measuring neutron flux is critical to understanding the characteristics of nuclear reactors and can provide information on the energy spectrum, total neutron fluence, and operational history of a facility. Such measurements are typically performed by irradiating high-purity materials in an operating reactor for a known length of time. By measuring and identifying activation products in the irradiated materials and referencing the energy-dependent cross section of each isotope, the neutron energy spectrum and total fluence can be determined. Historical techniques use a variety of small, individually pressed foils or wires for dosimeter devices, which can result in excessively high levels of radioactivity and complications in handling after irradiation. The present work describes a new neutron dosimetry concept, named the micro flux monitor, that uses semiconductor device fabrication processes to deposit thin films of flux monitoring materials in precise geometries onto a SiC wafer. This approach allows multiple dosimetry materials to be located on a single device, simplifying irradiation and subsequent analysis. The geometry, and therefore mass, of each material can be custom-tailored for a specific application—considering the expected neutron flux, duration of irradiation, and device retrieval time of a facility. Additionally, hundreds of identical dosimetry monitors can be produced simultaneously, reducing fabrication costs. Finally, the extremely thin metal dimensions of these devices could improve the fidelity of neutron fluence measurements by reducing neutron self-shielding and gamma self-attenuation effects.

22 GENERAL STUDIES OF NUCLEAR REACTORS↗
DOE OSTI2021

Methods and devices for fabricating and assembling printable semiconductor elements

The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.

Nuzzo, Ralph G.↗
DOE OSTI2021

Influence of quantum-confined device fabrication on semiconductor-laser theory

Among Professor Arthur Gossard’s many contributions to crystal growth are those resulting in important improvements in the quality and performance of quantum-well and quantum-dot semiconductor lasers. In celebration of his 85th birthday, we review the development of a semiconductor laser theory that is motivated and guided, in part, by those advances. This theory combines condensed matter theory and laser physics to provide understanding at a microscopic level, i.e., in terms of electrons and holes, and their interaction with the radiation field while influenced by the lattice.

36 MATERIALS SCIENCE↗
DOE OSTI2022

Solution‐Processed CsPbBr 3 Quantum Dots/Organic Semiconductor Planar Heterojunctions for High‐Performance Photodetectors

Abstract Planar heterojunctions (PHJs) are fundamental building blocks for construction of semiconductor devices. However, fabricating PHJs with solution‐processable semiconductors such as organic semiconductors (OSCs) is a challenge. Herein, utilizing the orthogonal solubility and good wettability between CsPbBr 3 perovskite quantum dots (PQDs) and OSCs, fabrication of solution‐processed PQD/OSC PHJs are reported. The phototransistors based on bilayer PQD/PDVT‐10 PHJs show responsivity up to 1.64 × 10 4 A W −1 , specific detectivity of 3.17 × 10 12 Jones, and photosensitivity of 5.33 × 10 6 when illuminated by 450 nm light. Such high photodetection performance is attributed to efficient charge dissociation and transport, as well as the photogating effect in the PHJs. Furthermore, the tri‐layer PDVT‐10/PQD/Y6 PHJs are used to construct photodiodes working in self‐powered mode, which exhibit broad range photoresponse from ultraviolet to near‐infrared, with responsivity approaching 10 −1 A W −1 and detectivity over 10 6 Jones. These results present a convenient and scalable production processes for solution‐processed PHJs and show their great potential for optoelectronic applications.

36 MATERIALS SCIENCE↗
DOE OSTI2025

Multistate resistance in TaN/(Hf,Zr)O 2 /Ta ferroelectric tunnel junctions

Ferroelectric tunnel junctions (FTJs) utilizing hafnium zirconium oxide (HZO) have emerged as promising non-volatile memory elements for microelectronics, compatible with back end of line (BEOL) complementary–metal–oxide semiconductor fabrication. This study investigates asymmetric electrode TaN/HZO/Ta devices with a 6 nm thick HZO layer as FTJs for multistate resistive memory applications. The individual FTJs exhibit a resistance ratio exceeding 10× when utilized as a binary state device, with pulsing between −1.7 and +1.4 V to set the high resistance state (HRS) and low resistance state (LRS), respectively. Following with reduced write voltage pulses allows the ferroelectric device to operate with a selection of over 32 distinct resistance states (2 5 bits) between the LRS and HRS. This work then explores the stability of the resistance states during write/read pulse cycling, along with the stability of the state after multiple read pulses. Accessing the multibit state shows stability within 50 reads with the binary state remaining stable for more than 4000 reads pulses. With their multistate tunability and versatility, FTJs hold promise as BEOL memory elements for compute-in-memory (CiM) arrays, binary digital memory, or weighted vector matrix multiplication applications with low power consumption during computations.

CMOS↗
DOE OSTI2024

Science challenges and research opportunities for plasma applications in microelectronics

Low-temperature plasmas (LTPs) are essential to manufacturing devices in the semiconductor industry, from creating extreme ultraviolet photons used in the most advanced lithography to thin film etching, deposition, and surface modifications. It is estimated that 40%–45% of all process steps needed to manufacture semiconductor devices use LTPs in one form or another. LTPs have been an enabling technology in the multidecade progression of the shrinking of device dimensions, often referred to as Moore’s law. New challenges in circuit and device design, novel materials, and increasing demands to achieve environmentally benign processing technologies require advances in plasma technology beyond the current state-of-the-art. The Department of Energy Office of Science Fusion Energy Sciences held a workshop titled Plasma Science for Microelectronics Nanofabrication in August 2022 to discuss the plasma science challenges and technical barriers that need to be overcome to continue to develop the innovative plasma technologies required to support and advance the semiconductor industry. One of the key outcomes of the workshop was identifying a set of priority research opportunities (PROs) to focus attention on the most strategic plasma science challenges to address to benefit the semiconductor industry. For each PRO, scientific challenges and recommended strategies to address those challenges were identified. Furthermore, this article summarizes the PROs identified by the workshop participants.

36 MATERIALS SCIENCE↗
DOE OSTI2019

Optical systems fabricated by printing-based assembly

Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and/or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities. Optical systems of the present invention include devices and device arrays exhibiting a range of useful physical and mechanical properties including flexibility, shapeability, conformability and stretchablity.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2022

Optical systems fabricated by printing-based assembly

Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and/or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities. Optical systems of the present invention include devices and device arrays exhibiting a range of useful physical and mechanical properties including flexibility, shapeability, conformability and stretchablity.

Rogers, John↗
DOE OSTI2025

Monolithic AlScN/SiC phononic waveguides for scalable acoustoelectric and quantum devices

Unlike conventional surface acoustic wave devices, phononic waveguide systems enable higher circuit density and stronger strain and piezoelectric fields, making them promising for advanced acoustoelectric and quantum applications. One such material system for generating and guiding phonons at gigahertz frequencies is AlScN on SiC, which can be synthesized by sputter depositing AlScN directly onto SiC wafers. The AlScN on the SiC platform allows for tightly vertically-confined acoustic modes with high electromechanical coupling, high speed of sound, and simple fabrication of strip and rib waveguides. Until now, this system has only been studied as a slab waveguide platform, i.e., without any lateral waveguiding. Here, we demonstrate a two-dimensionally confined phononic architecture in AlScN on SiC that supports guided modes at 2.95 and 4.05 GHz. These modes exhibit strong electromechanical coupling coefficients (k 2 = 4.27%) and propagation losses on the order of 10 dB/mm. Furthermore, this architecture is well-suited for phononic routing and power-efficient active or nonlinear devices such as amplifiers, mixers, and oscillators, and is compatible with the integration of quantum systems, including vacancy centers, charge carriers, photons, and spins, either embedded in SiC or heterogeneously integrated on the surface.

Electrical components↗