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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 19 records
All sourcesNASA NTRSDOE OSTI
DOE OSTI2025

Programmable Cryogenic Memory in a Ge/GeSi Heterostructure

Programmable memory components that operate optimally at cryogenic temperatures are essential for cryogenic computing architectures that seek to implement computing-in-memory. In this work, we demonstrate highly programmable memory in a Ge/GeSi heterostructure field-effect transistor (HFET). To operate, the HFET is gated to introduce positive carriers within the Ge quantum well, creating a high-conductance state. We show that this device can be set to a low-conductance state by sweeping a negative bias on the device drain, and reset it to its high-conductance state by sweeping a more positive bias on the device gate, thereby creating memory. We then determine that the device can be programmed within a 103 range of conductances using either the SET or the RESET operation. We propose that memory is achieved through charge trapping as carriers tunnel out of the quantum well, and that altering the density and spatial distribution of carriers modulates the device conductance. This mechanism exhibits endurance over 1000 cycles at temperatures ≤ 25 K, suggesting that the carrier traps are located at the oxide-semiconductor interface. As a first demonstration of programmable conductance in a Ge/GeSi HFET, this work highlights the potential of group-IV HFETs to perform as analog cryogenic memory components.

cryogenic memory↗
DOE OSTI2025

Automated Programmable Logic Controller Memory Forensics Using RGB Image Analysis and Deep Learning

The introduction of Industry 4.0 and Internet-based technologies has enhanced industrial control system operations but have inadvertently increased their vulnerabilities to cyber attacks. When an industrial control system is compromised, security analysts need to identify the root cause quickly to start the recovery process and develop mitigation strategies. Memory forensics is critical in the incident analysis process to ascertain what occurred. Approaches for analyzing the persistent memory in industrial control devices are limited and almost nonexistent for volatile memory. This chapter proposes an automated methodology for programmable logic controller memory dump analysis using computer vision and deep learning techniques. The methodology converts the sequences of bytes in a programmable logic controller memory dump to red-green-blue pixels and employs a deep learning model that learns the underlying patterns and features of pre-labeled forensic artifacts in images and segments them into distinct regions. The trained model is employed to automatically segment new memory images and identify forensic artifacts. Evaluation of the methodology on a Schneider Electric Modicon M221 programmable logic controller under code injection and code modification attacks demonstrates its ability to detect attack artifacts in memory dumps.

Asmar Awad, Rima [ORNL] (ORCID:0000000233407742)↗
DOE OSTI2026

Protonic nickelate device networks for spatiotemporal neuromorphic computing

Computation in biological neural circuits arises from the interplay of nonlinear temporal responses and spatially distributed dynamic network interactions. Replicating this richness in hardware has remained challenging, as most neuromorphic devices emulate only isolated neuron- or synapse-like functions. Here we introduce an integrated neuromorphic computing platform in which both nonlinear spatiotemporal processing and programmable memory are realized within a single perovskite nickelate material system. By engineering symmetric and asymmetric hydrogenated NdNiO 3 junction devices on the same wafer, we combine ultrafast, proton-mediated transient dynamics with stable multilevel resistance states. Networks of symmetric NdNiO 3 junctions exhibit emergent spatial interactions mediated by proton redistribution, while each node simultaneously provides short-term temporal memory, enabling nanosecond-scale operation with an energy cost of ~0.2 nJ per input. When interfaced with asymmetric output units serving as reconfigurable long-term weights, these networks allow both feature transformation and linear classification in the same material system. Leveraging these emergent interactions, the platform enables real-time pattern recognition and achieves high accuracy in spoken digit classification and early seizure detection, outperforming temporal-only or uncoupled architectures. These results position protonic nickelates as a compact, energy-efficient, CMOS-compatible platform that integrates processing and memory for scalable intelligent hardware.

Electrical and electronic engineering↗
DOE OSTI2026

PET waste- and bio-derived imine vitrimers for shape-memory, intrinsic flame-retardant, and recyclable carbon fiber composites

Developing circular multifunctional vitrimers and carbon fiber–reinforced polymers (CFRPs) that are simultaneously recyclable, mechanically robust, and intrinsically flame retardant remains a major challenge. Here, in this study, we report multifunctional vitrimers and their carbon fiber–reinforced vitrimer (CFRV) composites, where the vitrimer design integrates closed-loop recyclability, enhanced interfacial adhesion, and intrinsic flame retardancy within a single materials platform. The vitrimer matrix is synthesized from post-consumer polyethylene terephthalate (PET) waste and a vanillin-derived phosphorus-containing crosslinker, forming an imine-based network. The resulting vitrimer resin exhibits high tensile strength, thermal healability, repeated reprocessability, programmable shape memory, and rapid chemical depolymerization under mild conditions. Amine-functionalized carbon fibers significantly improve fiber–matrix interfacial bonding, yielding CFRVs with tensile strengths up to 789 MPa and complete recovery of structurally intact fibers after chemical recycling. The phosphorus-rich aromatic network further imparts intrinsic flame retardancy, enabling self-extinguishing behavior without external additives. This work advances a materials design paradigm for next-generation multifunctional, sustainable vitrimers and CFRVs, while simultaneously addressing the recycling challenges associated with both plastic and CFRP waste.

Bio-derived crosslinker↗
DOE OSTI2025

JACC.shared: Leveraging HPC Metaprogramming and Performance Portability for Computations That Use Shared Memory GPUs

In this work, we present JACC.shared, a new feature of Julia for ACCelerators (JACC), which is the performanceportable and metaprogramming model of the just-in-time and LLVM-based Julia language. This new feature allows JACC applications to leverage the high-performance computing (HPC) capabilities of high-bandwidth, on-chip GPU memory. Historically, exploiting high-bandwidth, shared-memory GPUs has not been a priority for high-level programming solutions. JACC.shared covers that gap for the first time, thereby providing a highlevel, portable, and easy-to-use solution for programmers to exploit this memory and supporting all current major accelerator architectures. Well-known HPC and AI workloads, such as multi/hyperspectral imaging and AI convolutions, have been used to evaluate JACC.shared on two exascale GPU architectures hosted by some of the most powerful US Department of Energy supercomputers: Perlmutter (NVIDIA A100) and Frontier (AMD MI250X). The performance evaluation reports speedup of up to 3.5× by adding only one line of code to the base codes, thus providing important accelerators in a simple, portable, and transparent way and elevating the programming productivity and performance-portability capabilities for Julia/JACC HPC, AI, and scientific applications.

Valero Lara, Pedro [ORNL] (ORCID:0000000214794310)↗
DOE OSTI2025

Tunable shear thickening, aging, and rejuvenation in suspensions of shape-memory-endowed liquid crystalline particles

The morphological features of particles, notably shape anisotropy, critically influence the rheological properties of dense suspensions, spanning both natural and engineered systems. This work explores the potential of using shape memory particles to dynamically regulate suspension fluid flow through controllable shape transformations. First, we synthesize shape-memory particles with programmable anisotropy from liquid crystal elastomers, such that the stiffness and shapes of the particles can be tuned by manipulating temperature. Our findings reveal that suspensions from such particles exhibit significant tunability in shear thickening behavior, transitioning from discontinuous shear thickening to a Newtonian-like response within a narrow temperature range of 60 ° C. This capability to modulate rheological responses in situ presents an approach for addressing processing challenges in many applications where control over flow behavior is paramount. Furthermore, we also show that suspensions composed of these anisotropic particles can undergo physical aging, and evolve into a glassy state. This state can be escaped upon activation of the shape memory effect. This reversibility underscores the potential for using such materials to engineer systems that can enter or come out of kinetic arrest by leveraging internal mechanical responses to external stimuli. The insights gained here not only broaden our understanding of the interplay between particle geometry and suspension dynamics but also pave the way for leveraging ensembles of stimuli-responsive objects to precisely control collective behaviors in many-body systems.

Science & Technology - Other Topics↗
DOE OSTI2026

Dynamic Interfacial Design in Adaptive Hybrid Materials Enables Reversible and Tunable Mechano-Optic Smart Responses

Next-generation polymeric materials are shifting toward adaptive and interactive behaviors of living systems; however, designing materials that can reversibly modulate optical properties under mechanical deformation while maintaining mechanical robustness remains a key challenge. Here, we report a mechanically robust vitrimer-based adaptive hybrid material (AHM) that exhibits a stretch-induced reversible transparency-to-opacity transition, enabled by the integration of dynamic interactions at the polymer–silica nanoparticle interface and controlled nanoparticle self-assembly. The AHM combines boronic ester–functionalized polystyrene-b-poly(ethylene-co-butylene)-b-polystyrene (S-Bpin) with diol-functionalized silica nanoparticles (diol-SiNPs) to form a hybrid network hosting both dynamic boronic ester and hydrogen-bonding interactions. These reversible linkages facilitate controlled nanoparticle self-assembly and enable strain-induced nanoparticle alignment/aggregation. Upon stretching, SiNP-rich domains align and aggregate within the polymer matrix, while local modulus mismatch between stiff aggregated SiNP/borylated-styrene-rich regions and the softer elastomeric midblock induces surface microwrinkle formation. These internal aggregates and surface wrinkles cooperatively enhance light scattering, producing the opaque state under strain. Furthermore, the tailored AHM exhibits high toughness, thermomechanical stability, reprocessability, and programmable shape-memory behavior. This work presents a dynamic interfacial design strategy for mechanically robust, optically reconfigurable, and reusable soft materials for adaptive optics, smart windows, sensing, soft robotics, and circular smart-material platforms.

adaptive hybrid materials↗
DOE OSTI2025

Architecture-Aware Models of AI Engines for High-Performance Matrix Matrix Multiplication

The AI Engine (AIE) architecture, available in systems from mobile SoCs to server-class FPGAs, aims to efficiently execute AI/ML tasks through a two-dimensional array of compute tiles. Previous work on AIEs has explored different approaches to mapping computation across spatial arrays, but the compute kernel running on each tile has not been the focus. Additionally, the AIE-ML architecture introduces memory tiles and omits programmable logic, requiring new approaches to staging and moving data throughout the array. In this work we update analytical models developed for CPUs to produce the design of high performance kernels while introducing new model considerations such as memory structure, throughput, and latency as required by the AIE hardware. We evaluate our models by developing AIE-ML kernels for matrix multiplication in low-precision data types showing performance up to 95% of compute peak for the kernel when data resides in local memory and above 90% of compute peak when data resides in main memory.

Binder, Elliott D. [Carnegie Mellon University, Pi↗
DOE OSTI2025

Ultra-Fast Non-Volatile Resistive Switching Devices with Over 512 Distinct and Stable Levels for Memory and Neuromorphic Computing

Low-current multilevel programmability with inherent non-volatility and high stability of resistance states is required for both multi-bit memory storage and deep learning accelerators but is difficult to achieve. Here, in a resistive switching system, this work realizes >512 (>9 bits) distinct non-volatile conductance levels with stable retention for each state with current levels down to the nanoampere range, highly promising for potential integration with small processing nodes with ultra-low power consumption requirements. This is achieved by demonstrating a new thin film design concept that encompasses three key features: an ultra-thin epitaxial oxygen ionic switching layer that provides a tunable energy barrier at the bottom electrode, an overcoat amorphous layer that acts as an ion migration barrier for stable state retention, and a partial conductive filament as a localized electronic transport channel to the epitaxial switching layer. A large dynamic resistance range of up to seven orders of magnitude is achieved with reset-free transitions among intermediate states, and programmability is demonstrated with ultra-fast (20 ns) pulses. Artificial neural network (ANN) simulations, based on the experimental performance and its non-idealities, demonstrate close-to-ideal inference accuracies for various Modified National Institute of Standards and Technology (MNIST) data sets.

36 MATERIALS SCIENCE↗
DOE OSTI2026

Optical control of integer and fractional Chern insulators

Optical control of topology, particularly in the presence of electron correlations, is an interesting topic with broad scientific and technological impact. Twisted MoTe 2 bilayer (tMoTe 2 ) is a zero-field fractional Chern insulator (FCI), exhibiting the fractionally quantized anomalous Hall effect. As the chirality of the edge states and sign of the Chern number are determined by the underlying ferromagnetic polarization, manipulation of ferromagnetism would realize control of the Chern insulator (CI)/FCI states. Here, in this work, we demonstrate control of ferromagnetic polarization, and thus the CI and FCI states, by circularly polarized optical pumping in tMoTe 2 . At low excitation power, we achieve on-demand preparation of ferromagnetic polarization by optical training, that is, electrically tuning the system from non-ferromagnetic to desirable ferromagnetic states under helicity-selective optical pumping. With increased excitation power, we further realize direct optical switching of ferromagnetic polarization at a temperature far below the Curie temperature. Both optical training and direct switching are most effective near CI and FCI states, which we attribute to a gap-enhanced valley polarization of optically pumped holes. The magnetization can be dynamically switched by modulating the helicity of optical excitation. Spatially resolved measurements further demonstrate optical writing of ferromagnetic, and thus CI (or FCI) domains. Our work realizes precise optical control of a topological quantum many-body system with potential applications in topological spintronics, quantum memories and creation of exotic edge states by programmable patterning of integer and fractionally quantized anomalous Hall domains.

ferromagnetism↗
DOE OSTI2024

Sentinel

Network intrusion detection systems (NIDS) are commonplace in network security but they frequently employ algorithms that are computational demanding requiring hardware and software with significant power requirements. Two examples of such resource-intensive algorithms used for network security are regular expression matching and broader signature pattern matching which are commonly used in deep packet inspection (DPI). Network security algorithms that have large power requirements may be a challenge for low-power internet-of-things (IoT) environments, which generally lack the power resources to implement complex security measures like computationally expensive DPI at the edge. Furthermore, IoT environments incorporating 5G standalone networks have network latency constraints beyond just power that make DPI at the edge even more difficult. Programmable logic is ideally suited for machine learning inference for DPI because of its deep instruction level parallelism and single-cycle memory access. Machine learning approaches for DPI have been explored before using the programmable logic of field programmable gate arrays (FPGA) as a potential solution for NIDS approaches that would be power-suitable for IoT. However, those previous programmable logic NIDS approaches utilize either a supervised or unsupervised learning model. Sentinel utilizes the ensemble of these two machine learning approaches known as a semi-supervised approach which has shown promise in NIDS implementations. Sentinel provides a programmable logic implementation of a semi-supervised approach for DPI which operates at much lower power and latency than a GPU implementation with negligible loss of accuracy due to quantization through a logistic regressor.

Anderson, MatthewW [Idaho National Laboratory (INL↗
DOE OSTI2026

A Survey on the Expanding Scope and Interdisciplinary Opportunities for Processing-in-Memory Techniques

Processing-in-Memory (PIM) is emerging as a practical path to overcome the limitations of traditional von Neumann architectures. At its core, PIM systems implement computing primitives such as logic operations and multiply-accumulate acceleration through compute-in-memory, near-memory processing, or hybrid designs. The role of memory cells varies widely across technologies, acting as inputs, outputs, or analog accumulators through bit-lines and sense amplifiers. This diversity creates trade-offs in precision, bandwidth, latency, and programmability, making it difficult to build a unified understanding on the progress of the field. In this survey, we organize recent advances of PIM into three areas. First, we discuss the progress on the architectural optimizations of PIM and its integration with both DRAM and emerging non-volatile memories. Second, we examine how PIM is being used to accelerate key computing domains, including generative AI workloads and high-performance kernels, along with new approaches. Third, we highlight the growing adoption of PIM in computational sciences, where it is being applied to solve interdisciplinary problems such as genome analysis, mRNA quantification, mass spectrometry, quantum circuit simulation, wave modeling, and secure computation. Finally, we synthesize the major challenges that continue to slow PIM adoption, including manufacturing constraints, power delivery, thermal reliability, data consistency, runtime and memory-management coordination, and the difficulty of building portable software abstractions without sacrificing commercial viability. This work provides an updated, structured perspective on PIM’s potential across computing and computational sciences and the barriers that must be solved for it to reach its full impact.

Asifuzzaman, Kazi [Oak Ridge National Laboratory (↗
DOE OSTI2025

Extending SEER for Extreme Heterogeneity

Heterogeneous and multi-device nodes are increasingly common in high-performance computing and data centers, yet existing programming models often lack simple, transparent, and portable support for these diverse architectures. The main contribution of this work is the development of novel SEER capabilities to address this challenge by providing a descriptive programming model that allows applications to seamlessly leverage heterogeneous nodes across various device types. SEER uses efficient memory management and can select the proper device[s] depending on the computational cost of the applications. This is completely transparent to the programmer, thereby providing a highly productive programming environment. Integrating extreme heterogeneity into the SEER library as shown with the use of NVIDIA and AMD GPUs simultaneously allows it to expand and exploit the performance possibilities. Our analysis based on the well-known Conjugate Gradient algorithm reports accelerations above 1.5 × on computationally demanding steps of such an algorithm by using both architectures simultaneously.

Teranishi, Keita [ORNL] (ORCID:0000000166472690)↗
DOE OSTI2025

Supramolecular Control of Ionic Retention in Electrolyte-Gated Synaptic Transistors

Electrolyte-gated transistors with ion-trapping layers offer a promising platform for artificial synapses in neuromorphic computing, yet molecular mechanisms governing ionic retention remain poorly understood. Here, in this study, we present a supramolecular approach to modulate ion retention by incorporating a crown ether derivative-based polymer network as an ion-trapping layer on top of a semiconducting monolayer. We show that the balance between ion–host binding and ion–solvent interactions dictates the kinetics of ion capture and release, which in turn controls the memory characteristics of the device. By varying the solvent dielectric constant, we tune the ionic retention time from nearly permanent trapping to rapid relaxation. Intermediate solvent polarity enables programmable short- and long-term synaptic behaviors, including excitatory postsynaptic current, paired-pulse facilitation, and long-term potentiation and depression. These findings establish a direct link between supramolecular ion recognition and synaptic plasticity and provide a generalizable design strategy for ionic–electronic neuromorphic devices.

36 MATERIALS SCIENCE↗
DOE OSTI2026

Magnetic hysteresis experiments performed on quantum annealers

While quantum annealers have emerged as versatile and controllable platforms for experimenting on correlated spin systems, the important phenomenology of magnetic memory and hysteresis remain unexplored on hardware designed to escape metastable states via quantum tunneling. Here, we present the first general protocol to experiment on magnetic hysteresis on programmable quantum annealers and implement it on three D-Wave superconducting qubit quantum annealers, using up to thousands of spins, for both ferromagnetic and disordered Ising models, and across different graph topologies. We observe hysteresis loops whose area depends nonmonotonically on quantum fluctuations, exhibiting both expected and unexpected features, such as disorder-induced steps and nonmonotonicities. Our work establishes quantum annealers as a platform for probing nonequilibrium emergent magnetic phenomena, thereby broadening the role of analog quantum computers into foundational questions in condensed matter physics.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2025

GRAPH — an readout ASIC for large MCP based detectors

We present a programmable 16 channel, mixed signal, low power readout ASIC, having the project historically named Gigasample Recorder of Analog waveforms from a PHotodetector (GRAPH). It is designed to read large aperture single photon imaging detectors using micro channel plates for charge multiplication, and measuring the detector's response on crossed strips anodes to extrapolate the incoming photon position. Each channel consists of a fast, low power and low noise charge sensitive amplifier, which provides a myriad of coarse and fine programmable options for gain and shaping settings. Further, the amplified signal is recorded using, to our knowledge novel, the Hybrid Universal sampLing Architecture (HULA) ADC. A kind of mixed signal double buffer memory, that enables concurrent waveform recording, and selected event digitized data extraction. The sampling frequency is freely adjustable between few kHz up to 125 MHz, while the chip's internal digital memory holds a history 2048 samples for each channel, with a digital headroom of 12 bits. An optimized region of interest sample-read algorithm allows to extract the information just around the event pulse peak, while selecting the next event, thus substantially reducing the operational dead time. The chip is designed in 130 nm TSMC CMOS technology, and its power consumption is around 47 mW per channel.

47 OTHER INSTRUMENTATION↗
DOE OSTI2026

Multifunctional electrochemical memory stabilized by phase coexistence

Our growing computing needs, especially in applications that heavily rely on artificial intelligence (AI), motivate a search for new components that could substantially augment the performance of general-purpose digital computers. Beyond ON/OFF switching, new components with linear multistate analog resistive tuning, nonlinear volatile switching, spiking, oscillatory, stochastic and other complex functionalities could enable highly efficient neuromorphic computing schemes for AI information processing. Compared to the extreme multifunctionality of biological neurons, realizing all the above characteristics in a single, scalable analog component remains a grand challenge. Here we investigate electrochemical gating combined with localized thermal activation to program and switch a single, vertically integrated and dimensionally scaled electrothermal chemical random access memory (ETCRAM) with a channel and reservoir composed of phase-separated vanadium oxide. Closely related to electrochemical RAM (ECRAM), ETCRAM uses an integrated gate-heater electrode to overcome kinetic barriers that help retain states at ambient temperatures. In addition to synapse-like stable and programmable analog resistance states arising from redox-tunable phase coexistence, a single component exhibits neuron-like nonlinear conductance switching with a tunable threshold and self-driven dynamics owing to the thermally driven metal-insulator phase transition in vanadium dioxide. More broadly, we demonstrate that electrochemically stabilized phase coexistence could unlock analog electronics with novel functionality, stability, reconfigurability, and scalability.

Oh, Sangheon [Sandia National Lab. (SNL-CA), Liver↗
DOE OSTI2025

A hybrid neural architecture: Online attosecond x-ray characterization

The emergence of high-repetition-rate x-ray free-electron lasers (XFELs), such as SLAC’s LCLS-II, serves as our canonical example for autonomous controls that necessitate high-throughput diagnostics paired with streaming computational pipelines capable of single-shot analysis with extremely low latency. We present the deterministic characterization with an integrated parallelizable hybrid resolver architecture, a hybrid machine learning framework designed for fast, accurate analysis of XFEL diagnostics using angular streaking-based sinogram images. This architecture integrates convolutional neural networks and bidirectional long short-term memory models to denoise input, identify x-ray sub-spike features, and extract sub-spike relative delays with sub-30 attosecond temporal resolution. Deployed on low-latency hardware, it achieves over 10 kHz throughput with 168.3 μs inference latency, indicating scalability to 14 kHz with field-programmable gate array integration. By transforming regression tasks into classification problems and leveraging optimized error encoding, we achieve high precision with low-latency performance that is critical for real-time streaming event selection and experimental control feedback signals. This represents a key development in real-time control pipelines for next-generation autonomous science, generally, and high repetition-rate x-ray experiments in particular.

Accelerator Physics (physics.acc-ph)↗