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At least 19 records

On the Efficacy of Source Code Optimizations for Cache-Based Systems

Obtaining high performance without machine-specific tuning is an important goal of scientific application programmers. Since most scientific processing is done on commodity microprocessors with hierarchical memory systems, this goal of "portable performance" can be achieved if a common set of optimization principles is effective for all such systems. It is widely believed, or at least hoped, that portable performance can be realized. The rule of thumb for optimization on hierarchical memory systems is to maximize temporal and spatial locality of memory references by reusing data and minimizing memory access stride. We investigate the effects of a number of optimizations on the performance of three related kernels taken from a computational fluid dynamics application. Timing the kernels on a range of processors, we observe an inconsistent and often counterintuitive impact of the optimizations on performance. In particular, code variations that have a positive impact on one architecture can have a negative impact on another, and variations expected to be unimportant can produce large effects. Moreover, we find that cache miss rates - as reported by a cache simulation tool, and confirmed by hardware counters - only partially explain the results. By contrast, the compiler-generated assembly code provides more insight by revealing the importance of processor-specific instructions and of compiler maturity, both of which strongly, and sometimes unexpectedly, influence performance. We conclude that it is difficult to obtain performance portability on modern cache-based computers, and comment on the implications of this result.

VanderWijngaart, Rob F.

On the Efficacy of Source Code Optimizations for Cache-Based Systems

Obtaining high performance without machine-specific tuning is an important goal of scientific application programmers. Since most scientific processing is done on commodity microprocessors with hierarchical memory systems, this goal of "portable performance" can be achieved if a common set of optimization principles is effective for all such systems. It is widely believed, or at least hoped, that portable performance can be realized. The rule of thumb for optimization on hierarchical memory systems is to maximize temporal and spatial locality of memory references by reusing data and minimizing memory access stride. We investigate the effects of a number of optimizations on the performance of three related kernels taken from a computational fluid dynamics application. Timing the kernels on a range of processors, we observe an inconsistent and often counterintuitive impact of the optimizations on performance. In particular, code variations that have a positive impact on one architecture can have a negative impact on another, and variations expected to be unimportant can produce large effects. Moreover, we find that cache miss rates-as reported by a cache simulation tool, and confirmed by hardware counters-only partially explain the results. By contrast, the compiler-generated assembly code provides more insight by revealing the importance of processor-specific instructions and of compiler maturity, both of which strongly, and sometimes unexpectedly, influence performance. We conclude that it is difficult to obtain performance portability on modern cache-based computers, and comment on the implications of this result.

VanderWijngaart, Rob F.

Performance and Portability of a Linear Solver Across Emerging Architectures

A linear solver algorithm used by a large-scale unstructured-grid computational fluid dynamics application is examined for a broad range of familiar and emerging architectures. Efficient implementation of a linear solver is challenging on recent CPUs offering vector architectures. Vector loads and stores are essential to effectively utilize available memory bandwidth on CPUs, and maintaining performance across different CPUs can be difficult in the face of varying vector lengths offered by each. A similar challenge occurs on GPU architectures, where it is essential to have coalesced memory accesses to utilize memory bandwidth effectively. In this work, we demonstrate that restructuring a computation, and possibly data layout, with regard to architecture is essential to achieve optimal performance by establishing a performance benchmark for each target architecture in a low level language such as vector intrinsics or CUDA. In doing so, we demonstrate how a linear solver kernel can be mapped to Intel® Xeon™ and Xeon Phi™, Marvell® ThunderX2®, NEC® SX-Aurora™ TSUBASA Vector Engine, and NVIDIA® and AMD® GPUs. We further demonstrate that the required code restructuring can be achieved in higher level programming environments such as OpenACC, OCCA, and Intel® OneAPI™/SYCL, and that each generally results in optimal performance on the target architecture. Relative performance metrics for all implementations are shown, and subjective ratings for ease of implementation and optimization are suggested.

Programming models

Position requirements for space station personnel and linkages to portable microcomputer performance assessment

The development and use of a menu of performance tests that can be self-administered on a portable microcomputer are investigated. In order to identify, develop, or otherwise select the relevant human capabilities/attributes to measure and hence include in the performance battery, it is essential that an analysis be conducted of the jobs or functions that will be performed throughout a space shuttle mission. The primary job analysis instrument, the Position Analysis Questionnaire (PAQ), is discussed in detail so the reader will have sufficient background for understanding the application of the instrument to the various work activities included within the scope of the study, and the derivation of the human requirements (abilities/attributes) from the PAQ analyses. The research methodology is described and includes the procedures used for gathering the PAQ data. The results are presented in detail with specific emphasis on identifying critical requirements that can be measured with a portable computerized assessment battery. A discussion of the results is given with implications for future research.

Jeanneret, P. R.

Evaluating the performance of portable air filter walls for the James Webb Space Telescope launch campaign

The James Webb Space Telescope (JWST) launched from the Centre Spatial Guyanais (CSG) in December 2021. JWST’s requirements permitted processing in International Organization for Standardization (ISO) Class 7 or better facilities, but CSG was only equipped with ISO Class 8 facilities. To temporarily upgrade the air cleanliness in the Payload Processing Facility, Fueling Hall, and Final Assembly Building Encapsulation Hall, NASA provided two portable High Efficiency Particulate Air (HEPA) and carbon filter walls that were used in each location. The walls were comprised of stacks of two modules high and arranged in push-push configurations as shown to be most effective via Computational Fluid Dynamics simulations of expected floor layouts in each facility. After delivery to NASA’s Goddard Space Flight Center in 2020, the walls underwent initial verification measurements inside a cleanroom and validation testing in an uncontrolled area to quantify their improvement of air cleanliness and particle and molecular fallout. Validation testing showed improvements of 83-99% for airborne particle counts, 79-91% for particle fallout, and 50-90% for molecular fallout. The particle improvements were applied to the contamination budget analysis that tracked current and predicted future cleanliness against End-of-Life requirements for JWST’s critical surfaces. At CSG, the walls successfully maintained an ISO Class 7 environment or better within their envelope in each location, despite their presence in ISO Class 8 facilities with dense integration operations.

HEPA, Contamination Control, Filtration

Evaluating the Performance of Portable Air Filter Walls for the James Webb Space Telescope Launch Campaign

The James Webb Space Telescope (JWST) launched from the Centre Spatial Guyanais (CSG) in December 2021. JWST’s requirements permitted processing in International Organization for Standardization (ISO) Class 7 or better facilities, but CSG was only equipped with ISO Class 8 facilities. To temporarily upgrade the air cleanliness in the Payload Processing Facility, Fueling Hall, and Final Assembly Building Encapsulation Hall, NASA provided two portable High Efficiency Particulate Air (HEPA) and carbon filter walls that were used in each location. The walls were comprised of stacks of two modules high and arranged in push-push configurations as shown to be most effective via Computational Fluid Dynamics simulations of expected floor layouts in each facility. After delivery to NASA’s Goddard Space Flight Center in 2020, the walls underwent initial verification measurements inside a cleanroom and validation testing in an uncontrolled area to quantify their improvement of air cleanliness and particle and molecular fallout. Validation testing showed improvements of 83-99% for airborne particle counts, 79-91% for particle fallout, and 50-90% for molecular fallout. The particle improvements were applied to the contamination budget analysis that tracked current and predicted future cleanliness against End-of-Life requirements for JWST’s critical surfaces. At CSG, the walls successfully maintained an ISO Class 7 environment or better within their envelope in each location, despite their presence in ISO Class 8 facilities with dense integration operations.

HEPA, Contamination Control, Filtration

Performance Analysis and Portability of the PLUM Load Balancing System

The ability to dynamically adapt an unstructured mesh is a powerful tool for solving computational problems with evolving physical features; however, an efficient parallel implementation is rather difficult. To address this problem, we have developed PLUM, an automatic portable framework for performing adaptive numerical computations in a message-passing environment. PLUM requires that all data be globally redistributed after each mesh adaption to achieve load balance. We present an algorithm for minimizing this remapping overhead by guaranteeing an optimal processor reassignment. We also show that the data redistribution cost can be significantly reduced by applying our heuristic processor reassignment algorithm to the default mapping of the parallel partitioner. Portability is examined by comparing performance on a SP2, an Origin2000, and a T3E. Results show that PLUM can be successfully ported to different platforms without any code modifications.

Oliker, Leonid

Scalable Performance Environments for Parallel Systems

As parallel systems expand in size and complexity, the absence of performance tools for these parallel systems exacerbates the already difficult problems of application program and system software performance tuning. Moreover, given the pace of technological change, we can no longer afford to develop ad hoc, one-of-a-kind performance instrumentation software; we need scalable, portable performance analysis tools. We describe an environment prototype based on the lessons learned from two previous generations of performance data analysis software. Our environment prototype contains a set of performance data transformation modules that can be interconnected in user-specified ways. It is the responsibility of the environment infrastructure to hide details of module interconnection and data sharing. The environment is written in C++ with the graphical displays based on X windows and the Motif toolkit. It allows users to interconnect and configure modules graphically to form an acyclic, directed data analysis graph. Performance trace data are represented in a self-documenting stream format that includes internal definitions of data types, sizes, and names. The environment prototype supports the use of head-mounted displays and sonic data presentation in addition to the traditional use of visual techniques.

Reed, Daniel A.

Users manual for the Automated Performance Test System (APTS)

The characteristics of and the user information for the Essex Automated Performance Test System (APTS) computer-based portable performance assessment battery are given. The battery was developed to provide a menu of performance test tapping the widest possible variety of human cognitive and motor functions, implemented on a portable computer system suitable for use in both laboratory and field settings for studying the effects of toxic agents and other stressors. The manual gives guidance in selecting, administering and scoring tests from the battery, and reviews the data and studies underlying the development of the battery. Its main emphasis is on the users of the battery - the scientists, researchers and technicians who wish to examine changes in human performance across time or as a function of changes in the conditions under which test data are obtained. First the how to information needed to make decisions about where and how to use the battery is given, followed by the research background supporting the battery development. Further, the development history of the battery focuses largely on the logical framework within which tests were evaluated.

Lane, N. E.

A Multi-Architecture Approach for Implicit Computational Fluid Dynamics on Unstructured Grids

High-performance computing (HPC) architectures are trending toward manycore paradigms such as graphics processing units (GPUs). Approximately half of the top 100 publicly disclosed supercomputers in the world utilize GPU accelerators for performance. This is in contrast to a decade ago, where there were only a few such machines in the top 100. It is not currently possible to compile and run legacy central processing unit (CPU) software efficiently on GPUs without significant refactoring. Though a number of frameworks offering performance portability exist, none offer a standardized specification that is supported by all major hardware vendors. Additionally, experiences show that obtaining a high percentage of peak performance often requires architecture-specific code. This work details a pragmatic multi-architecture computational fluid dynamics library focused on aerospace problems across the speed range from low subsonic to hypersonic flows involving thermochemical nonequilibrium. A thin abstraction layer above NVIDIA CUDA C++ is utilized, which enables primarily single-source software currently capable of running efficiently on multicore CPUs, NVIDIA GPUs, AMD GPUs, and Intel GPUs. Results on various problems of interest across the speed range are presented and performance is compared between various architectures.

GPU

A Multi-Architecture Approach for Implicit Computational Fluid Dynamics on Unstructured Grids

High-performance computing (HPC) architectures are trending toward manycore paradigms such as graphics processing units (GPUs). Approximately half of the top 100 publicly disclosed supercomputers in the world utilize GPU accelerators for performance. This is in contrast to a decade ago, where there were only a few such machines in the top 100. It is not currently possible to compile and run legacy central processing unit (CPU) software efficiently on GPUs without significant refactoring. Though a number of frameworks offering performance portability exist, none offer a standardized specification that is supported by all major hardware vendors. Additionally, experiences show that obtaining a high percentage of peak performance often requires architecture-specific code. This work details a pragmatic multi-architecture computational fluid dynamics library focused on aerospace problems across the speed range from low subsonic to hypersonic flows involving thermochemical nonequilibrium. A thin abstraction layer above NVIDIA CUDA C++ is utilized, which enables primarily single-source software currently capable of running efficiently on multicore CPUs, NVIDIA GPUs, AMD GPUs, and Intel GPUs. Results on various problems of interest across the speed range are presented and performance is compared between various architectures.

GPU

GPU Acceleration of VULCAN-CFD

This work presents a comprehensive overview of recent advancements in the application of GraphicsProcessing Units (GPUs) to accelerate the NASA-developed VULCAN-CFD code for hypersonic flow sim-ulations. The unstructured solver in VULCAN-CFD is undergoing a significant rewrite from modern Fortranto C++, enabling its execution on both GPUs and CPUs through the utilization of Kokkos, a programmingmodel for performance portability developed by Sandia National Labs. The paper outlines some modifica-tions that were made in the original implementation of VULCAN-CFD in order to harness the computationalpower of GPUs. Finally, we demonstrate performance improvements achieved through GPU acceleration.The accelerated code throughput on one GPU is shown to match approximately 200 CPU cores for bothsingle species and multi-species reacting cases.

Matthew O'Connell

Efficacy of Code Optimization on Cache-Based Processors

In this paper a number of techniques for improving the cache performance of a representative piece of numerical software is presented. Target machines are popular processors from several vendors: MIPS R5000 (SGI Indy), MIPS R8000 (SGI PowerChallenge), MIPS R10000 (SGI Origin), DEC Alpha EV4 + EV5 (Cray T3D & T3E), IBM RS6000 (SP Wide-node), Intel PentiumPro (Ames' Whitney), Sun UltraSparc (NERSC's NOW). The optimizations all attempt to increase the locality of memory accesses. But they meet with rather varied and often counterintuitive success on the different computing platforms. We conclude that it may be genuinely impossible to obtain portable performance on the current generation of cache-based machines. At the least, it appears that the performance of modern commodity processors cannot be described with parameters defining the cache alone.

VanderWijngaart, Rob F.

Developing Information Power Grid Based Algorithms and Software

This exploratory study initiated our effort to understand performance modeling on parallel systems. The basic goal of performance modeling is to understand and predict the performance of a computer program or set of programs on a computer system. Performance modeling has numerous applications, including evaluation of algorithms, optimization of code implementations, parallel library development, comparison of system architectures, parallel system design, and procurement of new systems. Our work lays the basis for the construction of parallel libraries that allow for the reconstruction of application codes on several distinct architectures so as to assure performance portability. Following our strategy, once the requirements of applications are well understood, one can then construct a library in a layered fashion. The top level of this library will consist of architecture-independent geometric, numerical, and symbolic algorithms that are needed by the sample of applications. These routines should be written in a language that is portable across the targeted architectures.

Dongarra, Jack

Comparison of Knee and Ankle Dynamometry between NASA's X1 Exoskeleton and Biodex System 4

Pre- and post-flight dynamometry is performed on International Space Station crewmembers to characterize microgravity-induced strength changes. Strength is not assessed in flight due to hardware limitations and there is poor understanding of the time course of in-flight changes. PURPOSE: To assess the reliability of a prototype dynamometer, the X1 Exoskeleton (EXO) and its agreement with a Biodex System 4 (BIO). METHODS: Eight subjects (4 M/4 F) completed 2 counterbalanced testing sessions of knee extension/flexion (KE/KF), 1 with BIO and 1 with EXO, with repeated measures within each session in normal gravity. Test-retest reliability (test 1 and 2) and device agreement (BIO vs. EXO) were evaluated. Later, to assess device agreement for ankle plantarflexion (PF), 10 subjects (4 M/6 F) completed 3 test conditions (BIO, EXO, and BIOEXO); BIOEXO was a hybrid condition comprised of the Biodex dynamometer motor and the X1 footplate and ankle frame. Ankle comparisons were: BIO vs. BIOEXO (footplate differences), BIOEXO vs. EXO (motor differences), and BIO vs. EXO (all differences). Reliability for KE/KF was determined by intraclass correlation (ICC). Device agreement was assessed with: 1) repeated measures ANOVA, 2) a measure of concordance (rho), and 3) average difference. RESULTS: ICCs for KE/KF were 0.99 for BIO and 0.96 to 0.99 for EXO. Agreement was high for KE (concordance: 0.86 to 0.95; average differences: -7 to +9 Nm) and low to moderate for KF (concordance: 0.64 to 0.78; average differences: -4 to -29 Nm, P<0.05). BIO vs. BIOEXO PF concordance ranged from 0.89 to 0.92 and mean differences ranged from -9 to +3 Nm (BIO < BIOEXO). BIOEXO vs. EXO PF concordance ranged from 0.73 to 0.80 while mean differences were -18 to -36 Nm (BIOEXO < EXO, P<0.05). PF concordance for BIO vs. EXO was slightly lower (0.61 to 0.84) and mean differences were greater (-27 to -33 Nm; BIO < EXO, P<0.05). CONCLUSION: BIO and EXO were similarly reliable for KE and KF. KE measures produced high agreement between devices; KF did not. For ankle PF, torque differences due to the two footplates were small. However, the X1 motor reports greater torques than the Biodex motor during PF. This first prototype provides proof of concept for a reliable, robotic-based exoskeleton to perform portable dynamometry for large muscle groups of the lower body.

English, K. L.

Portable microwave test packages for beam-waveguide antenna performance evaluations

Portable microwave test packages used to evaluate a new 34-m-diameter beam-waveguide (BWG) antenna are described. The experimental methodology involved transporting test packages to different focal points of the BWG system and making noise temperature, antenna efficiency, and holography measurements. Comparisons of data measured at the different focal points enabled determinations of performance degradations caused by various mirrors in the BWG system. It is shown that, due to remarkable stabilities and accuracies of radiometric data obtained through the use of the microwave test packages, degradations caused by the BWG system were successfully determined.

Otoshi, Tom Y.