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Results for “parasitic inductance”

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NASA NTRS2019

Design of Low Inductance Busbar for 500 kVA Three-Level ANPC Converter

The adoption of SiC devices in high power applications enables higher switching speed, which requires lower circuit parasitic inductance to reduce the voltage overshoot. This paper presents the design of a busbar for a 500 kVA three-level active natural clamped converter. The layout of the busbar is discussed in detail based on the analysis of the multiple commutation loops, magnetic cancelling effect, and DC-link capacitor placement. The loop inductance of the designed busbar is verified with simulation, impedance measurements and converter experiment. The results can match with each other and the inductances of small and large loop are 6.5 nH and 17.5 nH respectively, which is significantly lower than the busbars of NPC type converters in other references.

SiC MOSFET↗

NASA NTRS1981

High-frequency high-voltage high-power DC-to-DC converters

The current and voltage waveshapes associated with the power transitor and the power diode in an example current-or-voltage step-up (buck-boost) converter were analyzed to highlight the problems and possible tradeoffs involved in the design of high voltage high power converters operating at switching frequencies in the range of 100 Khz. Although the fast switching speeds of currently available power diodes and transistors permit converter operation at high switching frequencies, the resulting time rates of changes of current coupled with parasitic inductances in series with the semiconductor switches, produce large repetitive voltage transients across the semiconductor switches, potentially far in excess of the device voltage ratings. The need is established for semiconductor switch protection circuitry to control the peak voltages appearing across the semiconductor switches, as well as to provide the waveshaping action require for a given semiconductor device. The possible tradeoffs, as well as the factors affecting the tradeoffs that must be considered in order to maximize the efficiency of the converters are enumerated.

Wilson, T. G.↗

NASA NTRS1981

Research on design feasibility of high-power light-weight dc-to-dc converters for space power applications

Utilizing knowledge gained from past experience with experimental current-or-voltage step-up dc-to-dc converter power stages operating at output powers up to and in excess of 2 kW, a new experimental current-or-voltage step-up power stage using paralleled bipolar junction transistors (BJTs) as the controlled power switch, was constructed during the current reporting period. The major motivation behind the construction of this new experimental power stage was to improve the circuit layout so as to reduce the effects of stray circuit parasitic inductances resulting from excess circuit lead lengths and circuit loops, and to take advantage of the layout improvements which could be made when some recently-available power components, particularly power diodes and polypropylene filter capacitors, were incorporated into the design.

Wilson, T. G.↗

NASA NTRS1992

Analysis of shielded CPW discontinuities with air-bridges

The effect of air-bridges on the performance of various coplanar waveguides (CPW) discontinuities is studied. Specifically, the coupled open-end CPW's and the short-end shunt CPW stub discontinuities are considered. The high frequency effect of the air-bridge is evaluated using a hybrid technique. At first, the frequency dependent equivalent circuit of the planar discontinuity without the air-bridge is derived using the Space Domain Integral Equation (SDIE) method. Then, the circuit is modified by incorporating the air-bridge's parasitic inductance and capacitance which are evaluated using a simple quasi-static model. The frequency response of each discontinuity with and without the air-bridge is studied and the scattering parameters are plotted in the frequency range 30-50 GHz for typical CPW dimensions.

Dib, N. I.↗

NASA NTRS2012

Single Pixel Characterization of X-Ray TES Microcalorimeter Under AC Bias at MHz Frequencies

In this paper we present the progress made at SRON in the read-out of GSFC x-ray transition-edge sensor (TES) micro-calorimeters in the frequency domain. The experiments reported so far, whose aim was to demonstrate an energy resolution of 2eV at 6 keV with a TES acting as a modulator, were carried out at frequencies below 700 kHz using a standard flux locked loop (FLL) SQUID read-out scheme. The TES read-out suffered from the use of sub-optimal circuit components, large parasitic inductances, low quality factor resonators and poor magnetic field shielding. We have developed a novel experimental set-up, which allows us to test several read-out schemes in a single cryogenic run. In this set-up, the TES pixels are coupled via superconducting transformers to 18 high-Q lithographic LC filters with resonant frequencies ranging between 2 and 5 MHz. The signal is amplified by a two-stage SQUID current sensor and baseband feedback is used to overcome the limited SQUID dynamic range. We study the single pixel performance as a function of TES bias frequency, voltage and perpendicular magnetic field.

Gottardi, L.↗

NASA NTRS1980

Stress-relieved solder joints

Mechanical stress on solder joints is reduced by procedure for soldering electronic components to circuit boards. Procedure was developed for radio-frequency (RF) strip-line circuits, for which dimensions must be carefully controlled to minimize parasitic capacitance and inductance. Procedure consists of loosening component from its mounting after each lead is soldered relieving induced stresses before next soldering step.

Zemenick, C. J.↗

NASA NTRS1978

Predicting performance of power converters operating with switching frequencies in the vicinity of 100 kHZ

A model describing the turning-on period of a power switching transistor in an energy storage voltage step-up converter is presented. Comparisons between an experimental layout and the circuit model during the turning-on interval demonstrate the ability of the model to closely predict the effects of circuit topology on the performance of the converter. A phenomenon of particular importance that is observed in the experimental circuits and is predicted by the model is the deleterious feedback effect of the parasitic emitter lead inductance on the base current waveform during the turning-on interval.

Bahler, D. D.↗

NASA NTRS1989

Monolithic transistor gate energy recovery system

Energy is recovered from an insulated gate semiconductor switch, such as a MOSFET, that is otherwise lost in the gate capacitance by producing a notch in the gate control voltage for an interval B following an interval A after initial application of a gate control voltage pulse for turning the switch on, and a notch for an interval C following termination of the gate control voltage pulse followed by interval D during which the switch is turned on again, where each interval is a period .DELTA.T given by ##EQU1## L.sub.s is the inductance (discrete and/or parasitic) in series with the gate electrode of the insulated gate semiconductor switch, and C.sub.in is the capacitance of that switch between its gate and source electrodes. The interval .DELTA.T may be provided directly by timing in a pulse forming circuit for the gate control voltage applied, or adaptively by sensing the gate voltage v.sub.g and comparing it with fixed progressively higher voltages v.sub.1, v.sub.2 and v.sub.3, where v.sub.2 is intermediate v.sub.1 and v.sub.3 which correspond to the lower and upper levels of v.sub.g as the switch is turned off and on.

Rippel, Wally E.↗

NASA NTRS1990

High power density dc-to-dc converters for aerospace applications

Three dc-to-dc converter topologies aimed at high-power high-frequency applications are introduced. Major system parasitics, namely, the leakage inductance of the transformer and the device output capacitance are efficiently utilized. Of the three circuits, the single-phase and three-phase versions of the dual active bridge topology demonstrate minimal stresses, better utilization of the transformer, bidirectional, and buck-boost modes of operation. All circuits operate at a constant switching frequency, thus simplifying design of the reactive elements. The power transfer characteristics and soft-switching regions on the Vout-Iout plane are identified. Two coaxial transformers with different cross-sections were built for a rating of 50 kVA. Based on the single-phase dual active bridge topology, a 50 kW, 50 kHz converter operating at an input voltage of 200 Vdc and an output voltage of 1600 Vdc was fabricated. Characteristics of current-fed output make the dual active bridge topologies amenable to paralleling and hence extension to megawatt power levels. Projections to a 1 MW system operating from a 500 Vdc input, at an output voltage of 10 kVdc and a switching frequency of 50 kHz, using MOS-controlled thyristors, coaxially wound transformers operating at three times the present current density with cooling, and multilayer ceramic capacitors, suggests an overall power density of 0.075 to 0.08 kg/kW and an overall efficiency of 96 percent.

Divan, Deepakraj M.↗

NASA NTRS1989

Microwave field effect transistor

Electrodes of a high power, microwave field effect transistor are substantially matched to external input and output networks. The field effect transistor includes a metal ground plane layer, a dielectric layer on the ground plane layer, a gallium arsenide active region on the dielectric layer, and substantially coplanar spaced source, gate, and drain electrodes having active segments covering the active region. The active segment of the gate electrode is located between edges of the active segments of the source and drain electrodes. The gate and drain electrodes include inactive pads remote from the active segments. The pads are connected directly to the input and output networks. The source electrode is connected to the ground plane layer. The space between the electrodes and the geometry of the electrodes extablish parasitic shunt capacitances and series inductances that provide substantial matches between the input network and the gate electrode and between the output network and the drain electrode. Many of the devices are connected in parallel and share a common active region, so that each pair of adjacent devices shares the same source electrodes and each pair of adjacent devices shares the same drain electrodes. The gate electrodes for the parallel devices are formed by a continuous stripe that extends between adjacent devices and is connected at different points to the common gate pad.

Huang, Ho-Chung↗

NASA NTRS2014

Passive Resonant Bidirectional Converter with Galvanic Barrier

A passive resonant bidirectional converter system that transports energy across a galvanic barrier includes a converter using at least first and second converter sections, each section including a pair of transfer terminals, a center tapped winding; a chopper circuit interconnected between the center tapped winding and one of the transfer terminals; an inductance feed winding interconnected between the other of the transfer terminals and the center tap and a resonant tank circuit including at least the inductance of the center tap winding and the parasitic capacitance of the chopper circuit for operating the converter section at resonance; the center tapped windings of the first and second converter sections being disposed on a first common winding core and the inductance feed windings of the first and second converter sections being disposed on a second common winding core for automatically synchronizing the resonant oscillation of the first and second converter sections and transferring energy between the converter sections until the voltage across the pairs of transfer terminals achieves the turns ratio of the center tapped windings.

Rosenblad, Nathan S.↗

NASA NTRS1940

A generalized vortex theory of the screw propeller and its application

The vortex theory as presented by the author in earlier papers has been extended to permit the solution of the following problems: (1) the investigation of the relation between thrusts and torque distribution and energy loss as given by the induction of helical vortex sheets and by the parasite drag; (2) the checking of the theorem of Betz of the rigidly behaving helical vortex sheet of minimum induced energy loss; (3) the extension of the theory of the screw propeller of minimum energy loss for the inclusion of parasite-drag distribution along the blades. A simple system of diagrams has been developed to systematize the design of airplane propellers for a wide range of parasite-drag distribution along the blades.

Reissner, Hans↗

NASA NTRS2009

Differential InP HEMT MMIC Amplifiers Embedded in Waveguides

Monolithic microwave integrated-circuit (MMIC) amplifiers of a type now being developed for operation at frequencies of hundreds of gigahertz contain InP high-electron-mobility transistors (HEMTs) in a differential configuration. The differential configuration makes it possible to obtain gains greater than those of amplifiers having the single-ended configuration. To reduce losses associated with packaging, the MMIC chips are designed integrally with, and embedded in, waveguide packages, with the additional benefit that the packages are compact enough to fit into phased transmitting and/or receiving antenna arrays. Differential configurations (which are inherently balanced) have been used to extend the upper limits of operating frequencies of complementary metal oxide/semiconductor (CMOS) amplifiers to the microwave range but, until now, have not been applied in millimeter- wave amplifier circuits. Baluns have traditionally been used to transform from single-ended to balanced configurations, but baluns tend to be lossy. Instead of baluns, finlines are used to effect this transformation in the present line of development. Finlines have been used extensively to drive millimeter- wave mixers in balanced configurations. In the present extension of the finline balancing concept, finline transitions are integrated onto the affected MMICs (see figure). The differential configuration creates a virtual ground within each pair of InP HEMT gate fingers, eliminating the need for inductive vias to ground. Elimination of these vias greatly reduces parasitic components of current and the associated losses within an amplifier, thereby enabling more nearly complete utilization of the full performance of each transistor. The differential configuration offers the additional benefit of multiplying (relative to the single-ended configuration) the input and output impedances of each transistor by a factor of four, so that it is possible to use large transistors that would otherwise have prohibitively low impedances. Yet another advantage afforded by the virtual ground of the differential configuration is elimination of the need for a ground plane and, hence, elimination of the need for back-side metallization of the MMIC chip. In turn, elimination of the back-side metallization simplifies fabrication, reduces parasitic capacitances, and enables mounting of the MMIC in the electric-field plane ("E-plane") of a waveguide. E-plane mounting is consistent with (and essential for the utility of) the finline configuration, in which transmission lines lie on a dielectric sheet in the middle of a broad side of the waveguide. E-plane mounting offers a combination of low loss and ease of assembly because no millimeter-wave wire bonds or transition substrates are required. Moreover, because there is no ground plane behind the MMIC, the impedance for the detrimental even (single-ended) mode is high, suppressing coupling to that mode. Still another advantage of E-plane mounting is that the fundamental waveguide mode is inherently differential, eliminating the need for a balun to excite the differential mode.

Kangaslahti, Pekka↗

NASA NTRS2010

Temperature Dependence of Thin Film Spiral Inductors on Alumina Over a Temperature Range of 25 to 475 C

In this paper, we present an analysis of inductors on an Alumina substrate over the temperature range of 25 to 475 C. Five sets of inductors, each set consisting of a 1.5, 2.5, 3.5, and a 4.5 turn inductor with different line width and spacing, were measured on a high temperature probe station from 10 MHz to 30 GHz. From these measured characteristics, it is shown that the inductance is nearly independent of temperature for low frequencies compared to the self resonant frequency, the parasitic capacitances are independent of temperature, and the resistance varies nearly linearly with temperature. These characteristics result in the self resonant frequency decreasing by only a few percent as the temperature is increased from 25 to 475 C, but the maximum quality factor decreases by a factor of 2 to 3. These observations based on measured data are confirmed through 2D simulations using Sonnet software.

Ponchak, George E.↗

NASA NTRS1988

Advances in SIS receiver technology

Significant advances in SIS receiver technology since the last Asilomar meeting include: superconductor materials, integrated inductive tuning elements, and planar mounting structures. The effect of these advances is to push the upper frequency operating limit from about 600 to 1500 GHz, and to enhance the feasibility of focal plane arrays of heterodyne receivers. A fundamental high frequency operating limit of SIS mixers is set by the superconducting energy gap. A practical limitation for high frequency operation of SIS junctions is their parasitic capacitance and resistance. The performance of the mixer will be degraded by the Resistor-Capacitor rolloff. Several designs were reported for inductive elements integrated on the same substrate as the SIS junctions to tune out the bulk junction capacitance. Most millimeter SIS-based heterodyne receivers have used waveguide coupling structures. Technology has advanced to the state where programs that have a high probability of success can be defined to produce arrays of SIS receivers for frequencies as high as 1500 GHz.

Frerking, M. A.↗

NASA NTRS1990

High power density dc/dc converter: Selection of converter topology

The work involved in the identification and selection of a suitable converter topology is described. Three new dc/dc converter topologies are proposed: Phase-Shifted Single Active Bridge DC/DC Converter; Single Phase Dual Active Bridges DC/DC Converter; and Three Phase Dual Active Bridges DC/DC Converter (Topology C). The salient features of these topologies are: (1) All are minimal in structure, i.e., each consists of an input and output bridge, input and output filter and a transformer, all components essential for a high power dc/dc conversion process; (2) All devices of both the bridges can operate under near zero-voltage conditions, making possible a reduction of device switching losses and hence, an increase in switching frequency; (3) All circuits operate at a constant frequency, thus simplifying the task of the magnetic and filter elements; (4) Since, the leakage inductance of the transformer is used as the main current transfer element, problems associated with the diode reverse recovery are eliminated. Also, this mode of operation allows easy paralleling of multiple modules for extending the power capacity of the system; (5) All circuits are least sensitive to parasitic impedances, infact the parasitics are efficently utilized; and (6) The soft switching transitions, result in low electromagnetic interference. A detailed analysis of each topology was carried out. Based on the analysis, the various device and component ratings for each topology operating at an optimum point, and under the given specifications, are tabulated and discussed.

Divan, Deepakraj M.↗

NASA NTRS1973

Parasitic suppressing circuit

A circuit for suppressing parasitic oscillations across an inductor operating in a resonant mode is described. The circuit includes a switch means and resistive means connected serially across the inductor. A unidirectional resistive-capacitive network is also connected across the inductor and to the switch means to automatically render the switch means conducting when inductive current through the inductor ceases to flow.

Fowler, J. T.↗