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At least 19 records

Advancing microelectronics through nanoscale science: A perspective on needs and opportunities from the nanoscale science research centers

Microelectronics are the cornerstone of the modern world, enhancing our daily lives by providing services such as communications and datacenters. These resources are accessible thanks to the continual pursuit of a deeper understanding of the chemical and physical phenomena underlying the materials synthesis approaches and fabrication processes used to create microelectronic components and subsequently the components' responses to electrical, optical, and other stimuli that are utilized within microelectronic systems. Today, further development of microelectronics requires multidisciplinary expertise across scientific disciplines and fields of study—synthesis, materials characterization, nanoscale fabrication, and performance characterization—with focus placed on comprehending the nanoscale forms and features of microelectronic components. The Nanoscale Science Research Centers (NSRCs) are Department of Energy, Office of Science user facilities that support the international scientific community in advancing nanoscale science and technology. As a key component of the U.S. Government's National Nanotechnology Initiative, the NSRCs enable transformative discoveries by providing world-class facilities, expertise, and collaborative opportunities. Here, in this perspective, we showcase a non-exhaustive cross-section of the capabilities housed at and developed by the NSRCs and their user communities to address fundamental synthesis, metrology, fabrication, and performance considerations toward advancing the development of new microelectronics. Finally, we provide a timely outlook on the next major areas of necessary development in nanoscale sciences to continue the innovation of microelectronics into the next generation.

2D materials

AI-Enhanced Co-Design for Next-Generation Microelectronics: Innovating Innovation (Workshop Report)

The Artificial Intelligence Enhanced Co-Design for Next Generation Microelectronics virtual workshop was held April 4-5, 2023, and attended by subject matter experts from universities, industry, and national laboratories. This was the third in a series of workshops to motivate the research community to identify and address major challenges facing microelectronics research and production. The 2023 workshop focused on a set of topics from materials to computing algorithms, and included discussions on relevant federal legislation and such as the Creating Helpful Incentives to Produce Semiconductors and Science Act (CHIPS Act) which was signed into law in the summer of 2022. Talks at the workshop included edge computing in radiation environments, new materials for neuromorphic computing, advanced packaging for microelectronics, and new AI techniques. We also received project updates from several of the Department of Energy (DOE) microelectronics co-design projects funded in the fall of 2021, and from three of the Energy Frontier Research Centers (EFRCs) that had been funded in the fall of 2022. The workshop also conducted a set of breakout discussions around the five principal research directions (PRDs) from the 2018 Department of Energy workshop report: 1) define innovative material, device, and architecture requirements driven by applications, algorithms, and software; 2) revolutionize memory and data storage; 3) re-imagine information flow unconstrained by interconnects; 4) redefine computing by leveraging unexploited physical phenomena; 5) reinvent the electricity grid through new materials, devices, and architectures. We tasked each breakout group to consider one primary PRD (and other PRDs as relevant topics arose during discussions) and to address questions such as whether the research community has embraced co-design as a methodology and whether new developments at any level of innovation from materials to programming models requires the research community to reevaluate the PRDs developed back in 2018.

97 MATHEMATICS AND COMPUTING

Applications of Fracture Mechanics to Quantitative Accelerated Life Testing of Plastic Encapsulated Microelectronics

Accelerated testing must address the failure mechanisms active within the devices undergoing tests in order to assess lifetimes in a meaningful way. The assumption of constant temperature, thermally activated lifetime, based upon the Arrhenius assumptions, does not always provide the necessary understanding to interpret accelerated tests in microelectronics. Plastic encapsulants, dielectric polymers, and underfill materials are subject to delamination and cracking with thermal cycling. Crack propagation during use environment exposure, drives the potential for failure of microelectronic devices and is therefore a necessary focal point in qualification and life testing. This paper reviews the available research in the application of fracture mechanics to this class of problems in microelectronics including relevant test data. In addition, useful acceleration factor models are derived for polymer crack propagation based on principles of linear elastic fracture mechanics. Further, a simple approach to estimating the minimum temperature cycling ranges, necessary to propagate a crack, is also presented. Finally, a methodology of applying acceleration factors to develop testing plans is shown, with an example in spaceflight for a cubesat in low Earth orbit. Overall, this is a paper that shows a useful and appropriate process for creating physics of failure based life testing for delamination and cracking failures in microelectronic polymers in a temperature cycling environment.

Accelerated testing

Implications of Pb-free microelectronics assembly in aerospace applications

The commercial microelectronics industry is rapidly moving to completely Pb-free assembly strategies within the next decade. This trend is being driven by existing and proposed legislation in Europe and in Japan. The microelectronics industry has become truly global, as indicated by major U .S. firms who already adopted Pb-free implementation programs. Among these forward-looking firms are AT&T, IBM, Motorola, HP and Intel to name a few.Following Moore's law, advances in microelectronics are happening very rapidly. In many cases, commercial industry is ahead of the aerospace sector in technology. Progress by commercial industry, along with cost, drives the use of Commercial Off-The-Shelf (COTS) parts for military and space applications. We can thus anticipate that the aerospace industry will, at some point, be forced to use Pb-free components and subsystems as part of their standard business practices. In this paper we attempt to provide a snapshot of the commercial industry trends and how they may impact electronics in the aerospace environment. In addition, we also look at different strategies for implementation. Finally we present data collected on a recent NASA project to focus on finding suitable alternatives to eutectic tin-lead solders and solder pastes. The world is moving toward implementation of environmentally friendly manufacturing techniques. The aerospace industry will be forced to deal with issues related with Pb free assembly, either by availability or legislation. This paper provides some insight into some of the tradeoffs that should be considered.

Pb-free electronics manufacturing

Report on laser-induced fluorescence transitions relevant for the microelectronics industry and sustainability applications

A wide variety of feed gases are used to generate low-temperature plasmas for the microelectronics and sustainability applications. These plasmas often have a complex combination of reactive and nonreactive species which may have spatial and temporal variations in density, temperature, and energy. Accurate knowledge of these parameters and their variations is critically important for understanding and advancing these applications through validated and predictive modeling and the design of relevant devices. Laser-induced fluorescence (LIF) provides both spatial and temporally resolved information about the plasma-produced radicals, ions, and metastables. However, the use of this powerful diagnostic tool requires the knowledge of optical transitions including excitation and fluorescence wavelengths which may not be available or scattered through a huge literature domain. In this paper, we collected, analyzed, and compiled the available transitions for laser-induced fluorescence for more than 160 chemical species relevant to the microelectronics industry and the sustainability applications. A list of species with overlapping LIF excitations and fluorescence wavelengths have been identified. Finally, this summary is intended to serve as a data reference for LIF transitions and should be updated in the future.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY

Unraveling fundamental mechanisms of silicon nitride crystallization in microelectronics manufacturing

This research project investigates the fundamental mechanisms of silicon nitride (SiN) crystallization, aiming to enhance the understanding of this critical material in microelectronics manufacturing. Through a collaborative effort between Sandia National Laboratories, the University of Tennessee, and the University of Florida, we developed a comprehensive framework that integrates experimental techniques, atomistic modeling, meso-scale simulations, and an integrated multi-scale model to capture this physical phenomenon on multiple time and length scales . The project developed a new machine learning based atomistic potential and utilized advanced phase field modeling to capture the complexities of polycrystalline growth and the influence of mechanical stresses on crystallization dynamics. By employing a grain tracker algorithm, the meso-scale model effectively identified and tracked individual crystal grains, enabling the simulation of anisotropic growth behaviors reflective of SiN’s physical properties. The integration of atomistic simulations with meso-scale modeling created a powerful multi-scale framework that validated atomistic inputs and enhanced predictive accuracy for crystallization dynamics at larger scales, validated experimentally. This adaptable modeling capability not only accelerates development times by informing manufacturing processes but also serves as a valuable starting point for understanding crystallization physics in similar materials. The insights gained from this research unlock new opportunities for the development of advanced materials tailored for future microelectronics and photonics applications. Overall, this project represents a significant advancement in understanding of fundamental physics of SiN and establishes a foundation for future research in material science, bridging the gap between atomic-level phenomena and macroscopic material behaviors for practical applications.

36 MATERIALS SCIENCE

Military requirements for microelectronics: View from the field

During the past decade, the field of military application of microelectronics has grown by leaps and bounds. Costs to develop these systems have taken on a primary role in technology as opposed to previous emphasis on innovative designs. The future of microelectronics is investigated in regard to the military developer who must insure that a system is developed which can be operated and maintained in an economical manner in a field environment.

Residori, L. B.

Relevance of microelectronic education to industrial needs

The relevance of microelectronic education to industrial needs was evaluated, and four categories were surveyed: (1) facts and rules; (2) skills; (3) personality; and (4) deductive-inductive reasoning. Examples of specific items in each category are given to illustrate their meaning and it was indicated as to which items in each category are strongly impacted by microelectronics courses and laboratories.

Prince, J. L.

Microelectronics bioinstrumentation systems

Microelectronic bioinstrumentation systems to be employed in the Cardiovascular Deconditioning Program were developed. Implantable telemetry systems for long-term monitoring of animals on earth were designed to collect physiological data necessary for the understanding of the mechanisms of cardiovascular deconditioning. In-flight instrumentation systems, microelectronic instruments, and RF powering techniques for other life science experiments in the NASA program were studied.

Ko, W. H.

Design, processing and testing of LSI arrays, hybrid microelectronics task

Mathematical cost models previously developed for hybrid microelectronic subsystems were refined and expanded. Rework terms related to substrate fabrication, nonrecurring developmental and manufacturing operations, and prototype production are included. Sample computer programs were written to demonstrate hybrid microelectric applications of these cost models. Computer programs were generated to calculate and analyze values for the total microelectronics costs. Large scale integrated (LST) chips utilizing tape chip carrier technology were studied. The feasibility of interconnecting arrays of LSU chips utilizing tape chip carrier and semiautomatic wire bonding technology was demonstrated.

Himmel, R. P.

The NASA Microelectronics Space Radiation Effects Program (MSREP) at the Jet Propulsion Laboratory

The primary objective of the Microelectronics Space Radiation Effects Program (MSREP) at the Jet Propulsion Laboratory (JPL) is to assist NASA in the selection of radiation hardened microelectronic parts for insertion in NASA space systems through radiation testing and research. Prior to presenting examples of the research and testing on Single Event Effects (SEE) and Total Ionizing Dose (TID) effects, the space radiation environment and radiation requirements for the CRAFT/Cassini program, a typical JPL space project, are discussed.

Barnes, C.

Comparison of single event upset rates for microelectronic memory devices during interplanetary solar particle events

Variability in the methods and models used for single event upset calculations in microelectronic memory devices can lead to a range of possible upset rates. Using heavy ion and proton data for selected DRAM and SRAM memories, we have calculated an array of upset rates in order to compare the Adams worst case interplanetary solar flare model to a model proposed by scientists at the Jet Propulsion Laboratory. In addition, methods of upset rate calculation are compared: the Cosmic Ray Effects on Microelectronics CREME code and a Monte Carlo algorithm developed at the Applied Physics Laboratory. The results show that use of a more realistic, although still conservative, model of the space environment can have significant cost saving benefits.

Mckerracher, P. L.

A microelectronics approach for the ROSETTA surface science package

In relation to the Rosetta surface science package, the benefits of the application of advanced microelectronics packaging technologies and other output from the Mars environmental survey (MESUR) integrated microelectronics study are reported on. The surface science package will be designed to operate for tens of hours. Its limited mass and power consumption make necessary a highly integrated design with all the instruments and subunits operated from a centralized control and information management subsystem.

Sandau, Rainer

Center for Space Microelectronics Technology. 1993 Technical Report

The 1993 Technical Report of the Jet Propulsion Laboratory Center for Space Microelectronics Technology summarizes the technical accomplishments, publications, presentations, and patents of the Center during the past year. The report lists 170 publications, 193 presentations, and 84 New Technology Reports and patents. The 1993 Technical Report of the Jet Propulsion Laboratory Center for Space Microelectronics Technology summarizes the technical accomplishments, publications, presentations, and patents of the Center during the past year. The report lists 170 publications, 193 presentations, and 84 New Technology Reports and patents.

Source record

Advanced Microelectronics Technologies for Future Small Satellite Systems

Future small satellite systems for both Earth observation as well as deep-space exploration are greatly enabled by the technological advances in deep sub-micron microelectronics technologies. Whereas these technological advances are being fueled by the commercial (non-space) industries, more recently there has been an exciting new synergism evolving between the two otherwise disjointed markets. In other words, both the commercial and space industries are enabled by advances in low-power, highly integrated, miniaturized (low-volume), lightweight, and reliable real-time embedded systems. Recent announcements by commercial semiconductor manufacturers to introduce Silicon On Insulator (SOI) technology into their commercial product lines is driven by the need for high-performance low-power integrated devices. Moreover, SOI has been the technology of choice for many space semiconductor manufacturers where radiation requirements are critical. This technology has inherent radiation latch-up immunity built into the process, which makes it very attractive to space applications. In this paper, we describe the advanced microelectronics and avionics technologies under development by NASA's Deep Space Systems Technology Program (also known as X2000). These technologies are of significant benefit to both the commercial satellite as well as the deep-space and Earth orbiting science missions. Such a synergistic technology roadmap may truly enable quick turn-around, low-cost, and highly capable small satellite systems for both Earth observation as well as deep-space missions.

Alkalai, Leon

Technical Challenges in Reliable Microelectronics Packaging of Microelectromechanical Systems (MEMS) for Space Applications

MEMS have shown a significant promise in the last decade for a variety of applications such as air-bag, pressure sensors, accelerometer, microgyro, chemical sensors, artificial nose, etc. Standard semiconductor microelectronics packaging needs the integrated circuits (IC) to be protected from the harsh environment, and provide electrical communication with the other parts of the circuit, facilitate thermal dissipation efficiently, and impart mechanical strength to the silicon die. Microelectronics packaging involves wafer dicing, bonding, lead attachment, encapsulation to protect from the environment, electrical integrity, and package leak tests to assure the reliable IC packaging technology. Active elements or microstructures in MEMS devices often interfaces with the hostile environment where packaging leak tests and testing of such devices using chemical and mechanical parameters will be very difficult and expensive. Packaging of MEMS is significantly complex as they serve to protect from the environment and microstructures interact with the same environment to measure or affect the desired physical or chemical parameters. The most of the silicon circuitry is sensitive to temperature, moisture, magnetic field, light, and electromagnetic interference. The package must then protect the on-board silicon circuitry while simultaneously exposing the microsensor to the effect it measures to assure the packaging technology of MEMS. MEMS technology has a major application in developing a microspacecraft for space systems provided reliability of MEMS packaging technology is sufficiently addressed. This MEMS technology would eventually miniaturize many of the components of the spacecraft to reach the NASA's goal by building faster, cheaper, better, smaller spacecraft to explore the space more effectively. This paper discusses the latest developments in the MEMS technology and challenging technical issues in the packaging of hermetically sealed and non-hermetically sealed MEMS sensor devices for microspacecraft applications.

Ramesham, Rajeshuni

Assessment and Assurance of Microelectronics Packaging Technology of Microelectromechanical Systems (MEMS)

Microelectromechanical systems (MEMS) have shown a significant promise in the last decade for a variety of applications such as air-bag, pressure sensors, accelerometer, microgyro, etc. Standard semiconductor microelectronics packaging needs the integrated circuits to be protected from the harsh environment, and provide electrical communication with the other parts of the circuit, facilitate thermal dissipation efficiently, and impart mechanical strength to the silicon die. Microelectronics packaging involves wafer dicing, bonding, lead attachment, encapsulation to protect from the environment, electrical integrity, and package leak tests to assure the packaging technology. In the case of MEMS the microstructures (active elements) often interfaces with the hostile environment where packaging leak tests and testing of such devices using chemical and mechanical parameters will be very difficult and expensive. Packaging of MEMS is significantly complex as they serve to protect from the environment and microstructures interact with the same environment to measure or affect the desired physical or chemical parameters. The most of the silicon circuitry is sensitive to temperature, moisture, magnetic field, light, and electromagnetic interference. The package must then protect the on-board silicon circuitry while simultaneously exposing the microsensor to the effect it 'measures to assure the MEMS technology by lowering the risk to zero. MEMS technology has a major application in developing a microspacecraft for space systems provided assurance of MEMS technology is sufficiently addressed nondestructively. This technology would eventually miniaturize many of the components of the spacecraft to reach the NASA's safety and mission assurance goal by building faster, cheaper, better, smaller spacecraft to explore the space more effectively by teaming-up with the other NASA centers using the limited resources available. This paper discusses the latest developments in the MEMS technology and challenging issues in the packaging of hermetically sealed and non-hermetically sealed MEMS sensor devices based on silicon, poly-silicon, and other materials for microspacecraft applications considering the space environment and reliability assurance qualification guidelines in perspective. Acknowledgments: The above research work is supported by the NASA Electronics Parts and Packaging Program (NEPP) and performed by the Jet Propulsion Laboratory, California Institute of Technology, Pasadena, CA under a contract with the NASA - Code Q for the Office of Safety and Mission Assurance Program 323-79.

Ramesham, Rajeshuni