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Results for “medium voltage (MV) inductor”

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All sources NASA NTRS DOE OSTI

DOE OSTI2021

Medium Voltage Converter Inductor Insulation Design Considering Grid Requirements

Medium voltage (MV) SiC devices facilitate direct (without 50-/60-Hz transformer) connection of the power electronics converter to the MV grid using simple topology. Compared to the insulation design of MV inductors that have been widely used in the power system, the insulation design of the MV converter filter inductors has new challenges. Particularly, the grid impact on insulation requirements on converter filter inductors is rarely discussed. This article introduces the insulation design of a grid-side filter inductor for a 13.8-kV power conditioning system converter. The grid insulation requirements, including the short-duration power frequency overvoltage and the lightning impulse voltage, are considered in the design. To meet the requirements, the layer-to-layer insulation, winding-to-core/ground insulation, the air gap discharge between the winding and the core, the local electric field, as well as the interturn transient voltage distribution are considered. Furthermore, the designed inductors are validated by the 46 kV (>1 min) dc hi-pot test, 12-kV ac partial discharge test, one-hour single-phase converter full rating test, as well as three-phase converter full rating test.

42 ENGINEERING↗

DOE OSTI2023

Design and Demonstration of an 850 V dc to 13.8 kV ac 100 kW Three-phase Four-wire Power Conditioning System Converter Using 10 kV SiC MOSFETs

In this paper, an 850 V dc to 13.8 kV ac 100 kW modular multilevel three-phase four-wire dc/ac converter based on 10 kV SiC MOSFETs is designed and demonstrated. The design considerations of key components, including the dc-link, device cooling, gate driver, isolated gate driver power supply (GDPS), medium voltage (MV) ac filter inductor, MV and medium frequency transformer, and the mechanical design are discussed. Two converters are designed, and two prototypes are developed, to study the converter paralleling operation and scalability. Both converters are fully tested up to their voltage and power ratings. However, the two converters are not identical. Based on the design and test results of the first converter, the MV power stage, transformer design, GDPS, as well as the low voltage power stage in the second converter are improved for smaller size and/or higher efficiency. Compared to the version 1 converter, the version 2 converter achieves 49% volume reduction and 2 percentage point efficiency improvement, with a peak efficiency of 98.4% at the rated power.

Li, Haiguo↗

DOE OSTI2024

A Compact, Single Stage, >1 kV Medium-Voltage Line Impedance Stabilization Network

This paper presents the design of a single-phase, single-stage line impedance stabilization network (LISN) for medium-voltage (MV) applications. More than 1 kV rated widebandgap (WBG) power semiconductor switches are increasingly utilized in new, emerging power electronics energy systems to improve power density and efficiency. However, due to inherently fast-switching speeds, WBG switch modules emit considerable electromagnetic interference (EMI) (e.g., common mode (CM) or differential mode (DM)). State-of-the-art offers standardized LISN solutions to validate and certify the new energy system for electromagnetic compatibility (EMC). However, most are for low voltage applications (i.e., < 1 kV). MV LISNs (i.e., > 1 kV) are rare until recently and literature does not provide sufficient guidelines for designing and characterizing such devices. It has been a critical challenge for many scientists and engineers to reliably certify the emerging MV energy systems (e.g., electric ships and aircraft). This paper addresses such a technology gap. Specifically, a CISPR 16-1-2 compliant 50Ω/50μH LISN with 1.5kV, 75A and 30MHz measurement capability has been proposed. Detailed performance study versus non-linear parasitic parameters variations in MV inductors and capacitors have been done. Based on new understandings, novel techniques to intuitively mitigate unwanted parasitic have been proposed to develop the proposed LISN successfully. Thorough characterization of important LISN parameters are presented and factors influencing them are analyzed. A rigorous analysis, experimental tests, and in-depth comparisons over state-of-the-art have been made to validate the effectiveness. This is done through the state-of-the-art 300kVA MV EMI testbed.

42 ENGINEERING↗

DOE OSTI2020

Soft-Switching Solid-State Transformer With Reduced Conduction Loss

Solid-state transformers (SSTs) are a promising solution photovoltaic (PV), wind, traction, data center, battery energy storage system (BESS), and fast charging electric vehicle (EV) applications. The traditional SSTs are typically three-stage, i.e., hard-switching cascaded multilevel rectifiers and inverters with dual active bridge (DAB) converters, which leads to bulky passives, low efficiency, and high electromagnetic interference (EMI). This article proposes a new soft-switching solid-state transformer (S4T). The S4T has full-range zero-voltage switching (ZVS), electrolytic capacitor-less dc link, and controlled dv/dt, which reduces EMI. The S4T comprises two reverse-blocking current-source inverter (CSI) bridges, auxiliary branches for ZVS, and transformer magnetizing inductor as a reduced dc link with 60% ripple. Compared with the prior S4T, an effective change on the leakage inductance diode is made to reduce the number of the devices on the main power path by 20% for significant conduction loss saving and retain the same functionality of damping the resonance between the leakage and resonant capacitors and recycling trapped leakage energy. The conduction loss saving is crucial, being the dominating loss mechanism in SSTs. Importantly, the proposed single-stage SST not only holds the potential for high power density and high efficiency but also has full functionality, e.g., multiport dc loads integration, voltage regulation, and reactive power compensation, unlike the traditional single-stage matrix SST. The S4T can achieve single-stage isolated bidirectional dc–dc, ac–dc, dc–ac, or ac–ac conversion. It can also be configured input-series output-parallel (ISOP) in a modular way for medium-voltage (MV) grids. Hence, the S4T is a promising candidate for the SST. The full functionality, e.g., voltage buck–boost, multiport, etc., and the universality of the S4T for the dc–dc, dc–ac, and ac–ac conversion are verified through the simulations and experiments of two-port and three-port MV prototypes based on 3.3 kV SiC MOSFETs in dc–dc, dc–ac, and ac–ac modes at 2 kV.

14 SOLAR ENERGY↗

DOE OSTI2022

DC-Link Current Minimization Control for Current Source Converter-Based Solid-State Transformer

This article proposes a fast predictive control method and a small DC-link inductor to minimize the DC-link current in current-source converter (CSC)-based solid-state transformer. The DC-link current minimization can significantly reduce power loss and improve efficiency. The challenge of this problem is on improving both steady-state and dynamic performance. PI control methods and large DC-link inductors are conventionally used in the CSC but have limited dynamic performance. A model predictive control (MPC) method is proposed to achieve switching-cycle-level settling time, and the DC-link inductor is sized for 40% ripple to enable fast current change. Importantly, this article also proposes to minimize the DC-link current by varying the current even within a line cycle under single-phase load to improve the steady-state performance, in contrast with the reduction to a constant value in the literature. The proposed MPC features a constant switching frequency without weighting factors. The MPC does not have a high computational burden and is implemented in a regular digital controller for a prototype of soft-switching solid-state transformer (S4T) with reduced conduction loss. The effectiveness of the proposed method has been experimentally verified on the SiC S4T prototype during steady-state and dynamics under different multiport power flow conditions up to 2 kV peak. Here, the DC-link current in the experiments is close to the minimum current with a short zero-vector duration, which further verifies the performance of the proposed method.

14 SOLAR ENERGY↗