Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “interconnection options”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 19 records

Development of tandem cells consisting of GaAs single crystal and CuInSe2/CdZnS polycrystalline thin films

The tandem cells consisting of GaAs single crystal and CuInSe2 polycrystalline thin films are being developed under the joint program of the Boeing Co. and Kopin Corp. to meet the increasing power needs for future spacecraft. The updated status of this program is presented along with experimental results such as cell performance, and radiation resistance. Other cell characteristics including the specific power of and the interconnect options for this tandem cell approach are also discussed.

Kim, Namsoo P.↗

A reliability tradeoff study of interconnecting power processors to mercury ion thrusters

A Monte Carlo mission simulation program has been developed to optimize the solar electric propulsion (SEP) thrust subsystem configuration for an Encke comet rendezvous mission. This program examines several possible options for interconnecting power processors to the mercury ion thrusters in order to enhance mission reliability and to reduce SEP subsystem weight. The quantity of power processors and ion thrusters required to perform the mission successfully depends not only on the total required thrust, but also on the individual thruster and power processor performance and reliability. Based on these considerations, it was necessary to determine the quantity of the active power processors and ion thrusters required at any time and the means of providing redundancy. The results provide the basis for selecting an optimum SEP thrust subsystem for this mission and other missions.

Costogue, E. N.↗

Requirements and options for communications services in support of the Systems Autonomy Demonstration Project

A study of the requirements and options for interconnecting the development systems and demonstration test beds at NASA centers supporting the Systems Autonomy Demonstration Project (SADP) is presented. The communications requirements of SADP development and demonstration environments are described, potential communications protocols are examined, and expected communications error rates and system availability are described.

Brown, Richard M.↗

Fast, Massively Parallel Data Processors

Proposed fast, massively parallel data processor contains 8x16 array of processing elements with efficient interconnection scheme and options for flexible local control. Processing elements communicate with each other on "X" interconnection grid with external memory via high-capacity input/output bus. This approach to conditional operation nearly doubles speed of various arithmetic operations.

Heaton, Robert A.↗

Aeroelastic effects in multi-rotor vehicles with application to a hybrid heavy lift system. Part 1: Formulation of equations of motion

This report presents a set of governing coupled differential equations for a model of a hybrid aircraft. The model consists of multiple rotor systems connected by an elastic interconnecting structure, with options to add any combination of or all of the following components; i.e., thrusters, a buoyant hull, and an underslung weight. The dynamic equations are written for the individual blade with hub motions, for the rigid body motions of the whole model, and also for the flexible modes of the interconnecting structure. One of the purposes of this study is to serve as the basis of a numerical study aimed at determining the aeroelastic stability and structural response characteristics of a Hybrid Heavy Lift Airship (HHLA). It is also expected that the formulation may be applicable to analyzing stability and responses of dual rotor helicopters such as a Heavy Lift Helicopter (HLH). Futhermore, the model is capable of representing coupled rotor/body aeromechanical problems of single rotor helicopters.

Venkatesan, C.↗

Advanced packaging for Integrated Micro-Instruments

The relationship between packaging, microelectronics, and micro-electrical-mechanical systems (MEMS) is an important one, particularly when the edges of performance boundaries are pressed, as in the case of miniaturized systems. Packaging is a sort of physical backbone that enables the maximum performance of these systems to be realized, and the penalties imposed by conventional packing approaches is particularly limiting for MEMS devices. As such, advanced packaging approaches, such as multi-chip modules (MCM's) have been touted as a true means of electronic 'enablement' for a variety of application domains. Realizing an optimum system of packaging, however, in not as simple as replacing a set of single chip packages with a substrate of interconnections. Research at Phillips Laboratory has turned up a number of integrating options in the two- and three-dimensional rending of miniature systems with physical interconnection structures with intrinsically high performance. Not only do these structures motivate the redesign of integrated circuits (IC's) for lower power, but they possess interesting features that provide a framework for the direct integration of MEMS devices. Cost remains a barrier to the application of MEMS devices, even in space systems. Several innovations are suggested that will result in lower cost and more rapid cycle time. First, the novelty of a 'constant floor plan' MCM which encapsulates a variety of commonly used components into a stockable, easily customized assembly is discussed. Next, the use of low-cost substrates is examined. The anticipated advent of ultra-high density interconnect (UHDI) is suggested as the limit argument of advanced packaging. Finally, the concept of a heterogeneous 3-D MCM system is outlined that allows for the combination of different compatible packaging approaches into a uniformly dense structure that could also include MEMS-based sensors.

Lyke, James L.↗

Progress in High Power Density SOFC Material Development for Aerospace Applications

Solid oxide fuel cell (SOFC) systems for aircraft applications require order of magnitude increase in specific power density and long life under aircraft operating conditions. Advanced SOFC materials and fabrication processes are being developed at NASA GRC to increase specific power density and durability of SOFC cell and stack. Initial research efforts for increasing specific power density are directed toward increasing the operating temperature for the SOFC system and reducing the weight of the stack. While significant research is underway to develop anode supported SOFC system operating at temperatures in the range of 650 - 850 C for ground power generation applications, such temperatures may not yield the power densities required for aircraft applications. For electrode-supported cells, SOFC stacks with power densities greater than 1.0 W/sq cm are favorable at temperatures in excess of 900 C. The performance of various commercial and developmental anode supported cells is currently being evaluated in the temperature range of 900 to 1000 C to assess the performance gains and materials reliability. The results from these studies will be presented. Since metal interconnects developed for lower temperature operation are not practical at these high temperatures, advanced perovskite based ceramic interconnects with high electronic conductivity and lower sintering temperatures are being developed. Another option for increasing specific power density of SOFC stacks is to decrease the stack weight. Since the interconnect contributes to a significant portion of the stack weight, considerable weight benefits can be derived by decreasing its thickness. Eliminating the gas channels in the interconnect by engineering the pore structure in both anode and cathode can offer significant reduction in thickness of the ceramic interconnect material. New solid oxide fuel cells are being developed with porous engineered electrode supported structures with a 10 - 20 micron thin electrolyte. The performance data for advanced SOFC cells with engineered porosity in both electrodes will be presented.

Cable, Thomas L.↗

High-Speed Ring Bus

The high-speed ring bus at the Jet Propulsion Laboratory (JPL) allows for future growth trends in spacecraft seen with future scientific missions. This innovation constitutes an enhancement of the 1393 bus as documented in the Institute of Electrical and Electronics Engineers (IEEE) 1393-1999 standard for a spaceborne fiber-optic data bus. It allows for high-bandwidth and time synchronization of all nodes on the ring. The JPL ring bus allows for interconnection of active units with autonomous operation and increased fault handling at high bandwidths. It minimizes the flight software interface with an intelligent physical layer design that has few states to manage as well as simplified testability. The design will soon be documented in the AS-1393 standard (Serial Hi-Rel Ring Network for Aerospace Applications). The framework is designed for "Class A" spacecraft operation and provides redundant data paths. It is based on "fault containment regions" and "redundant functional regions (RFR)" and has a method for allocating cables that completely supports the redundancy in spacecraft design, allowing for a complete RFR to fail. This design reduces the mass of the bus by incorporating both the Control Unit and the Data Unit in the same hardware. The standard uses ATM (asynchronous transfer mode) packets, standardized by ITU-T, ANSI, ETSI, and the ATM Forum. The IEEE-1393 standard uses the UNI form of the packet and provides no protection for the data portion of the cell. The JPL design adds optional formatting to this data portion. This design extends fault protection beyond that of the interconnect. This includes adding protection to the data portion that is contained within the Bus Interface Units (BIUs) and by adding to the signal interface between the Data Host and the JPL 1393 Ring Bus. Data transfer on the ring bus does not involve a master or initiator. Following bus protocol, any BIU may transmit data on the ring whenever it has data received from its host. There is no centralized arbitration or bus granting. The JPL design provides for autonomous synchronization of the nodes on the ring bus. An address-synchronous latency adjust buffer (LAB) has been designed that cannot get out of synchronization and needs no external input. Also, a priority-driven cable selection behavior has been programmed into each unit on the ring bus. This makes the bus able to connect itself up, according to a maximum redundancy priority system, without the need for computer intervention at startup. Switching around a failed or switched-off unit is also autonomous. The JPL bus provides a map of all the active units for the host computer to read and use for fault management. With regard to timing, this enhanced bus recognizes coordinated timing on a spacecraft as critical and addresses this with a single source of absolute and relative time, which is broadcast to all units on the bus with synchronization maintained to the tens of nanoseconds. Each BIU consists of up to five programmable triggers, which may be programmed for synchronization of events within the spacecraft of instrument. All JPL-formatted data transmitted on the ring bus are automatically time-stamped.

Wysocky, Terry↗

Limits on Interconnection Bandwidth for On-Board Processing

This viewgraph presentation reviews the constraints, and concerns of spacecraft design, in particular spacecraft instrumentation design and the issues concerning space communication. The advantages and disadvantages of several communication options are reviewed. Ultimately there will be spacecraft communication not between boxes on spacecraft, but between spacecraft. The future of spacecraft communication is interplanetary networks.

interconnects↗

Materials Development for Auxiliary Components for Large Compact Mo/Au TES Arrays

We describe our current fabrication process for arrays of superconducting transition edge sensor microcalorimeters, which incorporates superconducting Mo/Au bilayers and micromachined silicon structures. We focus on materials and integration methods for array heatsinking with our bilayer and micromachining processes. The thin superconducting molybdenum bottom layer strongly influences the superconducting behavior and overall film characteristics of our molybdenum/gold transition-edge sensors (TES). Concurrent with our successful TES microcalorimeter array development, we have started to investigate the thin film properties of molybdenum monolayers within a given phase space of several important process parameters. The monolayers are sputtered or electron-beam deposited exclusively on LPCVD silicon nitride coated silicon wafers. In our current bilayer process, molybdenum is electron-beam deposited at high wafer temperatures in excess of 500 degrees C. Identifying process parameters that yield high quality bilayers at a significantly lower temperature will increase options for incorporating process-sensitive auxiliary array components (AAC) such as array heat sinking and electrical interconnects into our overall device process. We are currently developing two competing technical approaches for heat sinking large compact TES microcalorimeter arrays. Our efforts to improve array heat sinking and mitigate thermal cross-talk between pixels include copper backside deposition on completed device chips and copper-filled micro-trenches surface-machined into wafers. In addition, we fabricated prototypes of copper through-wafer microvias as a potential way to read out the arrays. We present an overview on the results of our molybdenum monolayer study and its implications concerning our device fabrication. We discuss the design, fabrication process, and recent test results of our AAC development.

Finkbeiner, F. m.↗

Selective broadcast interconnection - A novel scheme for fiber-optic local-area networks

A passive, unswitched scheme is introduced for directly interconnecting N stations, each of which has C transmitters and receivers. Implementations using fiber optics with spatial multiplexing and optionally wavelength multiplexing are discussed. This scheme utilizes the same resources as standard topologies with C parallel buses but outperforms them in two respects: (1) the aggregate throughput is proportional to C squared rather than to C; and (2) the power of each transmitter need reach only N/C, instead of N, receivers.

Marhic, M. E.↗

Ultramicrowave communications system, phase 2

Communications system design was completed and reviewed. Minor changes were made in order to make it more cost effective and to increase design flexibility. System design activities identified the techniques and procedures to generate and monitor high data rate test signals. Differential bi-phase demodulation is the proposed method for this system. The mockup and packaging designs were performed, and component layout and interconnection constraints were determined, as well as design drawings for dummy parts of the system. The possibility of adding a low cost option to the transceiver system was studied. The communications program has the advantage that new technology signal processing devices can be readily interfaced with the existing radio frequency subsystem to produce a short range radar.

Source record↗

Electronic Switch Arrays for Managing Microbattery Arrays

Integrated circuits have been invented for managing the charging and discharging of such advanced miniature energy-storage devices as planar arrays of microscopic energy-storage elements [typically, microscopic electrochemical cells (microbatteries) or microcapacitors]. The architecture of these circuits enables implementation of the following energy-management options: dynamic configuration of the elements of an array into a series or parallel combination of banks (subarrarys), each array comprising a series of parallel combination of elements; direct addressing of individual banks for charging/or discharging; and, disconnection of defective elements and corresponding reconfiguration of the rest of the array to utilize the remaining functional elements to obtain the desited voltage and current performance. An integrated circuit according to the invention consists partly of a planar array of field-effect transistors that function as switches for routing electric power among the energy-storage elements, the power source, and the load. To connect the energy-storage elements to the power source for charging, a specific subset of switches is closed; to connect the energy-storage elements to the load for discharging, a different specific set of switches is closed. Also included in the integrated circuit is circuitry for monitoring and controlling charging and discharging. The control and monitoring circuitry, the switching transistors, and interconnecting metal lines are laid out on the integrated-circuit chip in a pattern that registers with the array of energy-storage elements. There is a design option to either (1) fabricate the energy-storage elements in the corresponding locations on, and as an integral part of, this integrated circuit; or (2) following a flip-chip approach, fabricate the array of energy-storage elements on a separate integrated-circuit chip and then align and bond the two chips together.

Mojarradi, Mohammad↗

Development of a Thin Film Solar Cell Interconnect for the Powersphere Concept

Progressive development of microsatellite technologies has resulted in increased demand for lightweight electrical power subsystems including solar arrays. The use of thin film photovoltaics has been recognized as a key solution to meet the power needs. The lightweight cells can generate sufficient power and still meet critical mass requirements. Commercially available solar cells produced on lightweight substrates are being studied as an option to fulfill the power needs. The commercially available solar cells are relatively inexpensive and have a high payoff potential. Commercially available thin film solar cells are primarily being produced for terrestrial applications. The need to convert the solar cell from a terrestrial to a space compatible application is the primary challenge. Solar cell contacts, grids and interconnects need to be designed to be atomic oxygen resistant and withstand rapid thermal cycling environments. A mechanically robust solar cell interconnect is also required in order to withstand handling during fabrication and survive during launch. The need to produce the solar cell interconnects has been identified as a primary goal of the Powersphere program and is the topic of this paper. Details of the trade study leading to the final design involving the solar cell wrap around contact, flex blanket, welding process, and frame will be presented at the conference.

Simburger, Edward J.↗

Results of thin-route satellite communication system analyses including estimated service costs

A variety of cost and performance tradeoffs are addressed and the preliminary design of a communications satellite system capable of meeting isolated rural users' needs is presented. Small inexpensive rural earth stations are linked via the satellite to a nation wide network of large earth stations which are, in turn, interconnected to the switching exchanges of the conventional telephone network. Optimum earth station EIRP and G/T and satellite transponder power are defined as a function of a wide variety of system options.

Wright, D. L.↗

High-speed, cross-continental networks - A necessity

The networking requirements that the Earth Observing System (EOS) program has levied on NASA and the national and international operational networking communities is addressed. The objectives of the EOS program are listed and include the development and operation of an observing system to acquire essential, global earth science data on a long-term, sustained basis and in a manner which maximizes the scientific utility of the data and simplifies data analysis. Network design issues are also discussed, including protocol selection, the Transport Control Protocol/Internet Protocol suite, the Open Systems Interconnect network suite, and the internet evolution. Open and closed network issues are also discussed. A number of networks now in place are assessed including NASNet, and ESNet. These offer possible options and/or solutions to be considered by the NASA Headquarters EOS Data and Information Systems Program.

Wong, C. M.↗

Gain in computational efficiency by vectorization in the dynamic simulation of multi-body systems

An improved technique for the identification and extraction of the exact quantities associated with the degrees of freedom at the element as well as the flexible body level is presented. It is implemented in the dynamic equations of motions based on the recursive formulation of Kane et al. (1987) and presented in a matrix form, integrating the concepts of strain energy, the finite-element approach, modal analysis, and reduction of equations. This technique eliminates the CPU intensive matrix multiplication operations in the code's hot spots for the dynamic simulation of the interconnected rigid and flexible bodies. A study of a simple robot with flexible links is presented by comparing the execution times on a scalar machine and a vector-processor with and without vector options. Performance figures demonstrating the substantial gains achieved by the technique are plotted.

Amirouche, F. M. L.↗

CoCoSim Tutorial: Contract-based Compositional Verification of Simulink Models

This tutorial presents CoCoSim, a verification framework for MATLAB Simulink and Stateflow models. We demonstrate CoCoSim’s architecture, designed to be compatible with Lustre-based verification tools, as well as easily extensible to other candidate backends. We focus on CoCoSim’s powerful compositional verification scheme, which allows for scalable verification through the usage of abstractions of subsystems, express ed in the form of Assume-Guarantee Contracts. We show CoCoSim’s interconnection with NASA’s Formal Requirements Tool (FRET), that enables a seamless transition between authoring and formally verifying requirements for Simulink/Stateflow models. Finally, we discuss work in progress with regards to test case generation options in CoCoSim, demonstrating the generation of MC/DC tests for Simulink artifacts.

Formal Verification↗