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A Survey on the Design, Detection, and Prevention of Pre-Silicon Hardware Trojans

The complexity of the semiconductor design lifecycle and globalized manufacturing process creates concern over the threat of deliberate malicious alterations, or hardware Trojans, being inserted into microelectronic designs. This has resulted in a significant corpus of hardware Trojan research including Trojan design and benchmarking efforts and development of corresponding metrics and detection and prevention techniques, over the last two decades. In this survey, we first highlight efforts in Trojan design and benchmarking, followed by a cataloging of seminal and recent works in Trojan detection and prevention and their accompanied metrics. Given the volume of literature in this field, this survey considers only pre-silicon techniques. We make this distinction between pre- and post-silicon to properly scope and provide appropriate context into the capabilities of existing hardware Trojan literature. Each major section (design, prevention, and detection) is accompanied by insights, and common pitfalls, which we highlight can be addressed by future research.

42 ENGINEERING↗

Targeted modification of hardware trojans

The use of untrusted design tools, components, and designers, coupled with untrusted device fabrication, introduces the possibility of malicious modifications being made to integrated circuits (ICs) during their design and fabrication. These modifications are known as hardware trojans. The widespread use of commercially purchased 3rd party intellectual property (3PIP) and commercial design tools extends even into trusted design flows. Unfortunately, due to the theoretical result that there is no program that can decide whether any other program will eventually halt, we know that the properties of a program, or circuit, cannot be known in advance of running it. While we can design a circuit to meet some functional specification and generate a simulation or test suite to obtain at least probabilistic confidence that the circuit implements the intended functionality, we cannot test a circuit for unintended functionality due to the combinatorially large state space. To address these concerns, we have developed a design-time method for automatically and systematically modifying portions of a design that exhibit characteristics of hardware trojans. After each modification, the functionality of the design is verified against a comprehensive simulation suite to ensure that the intended circuit functionality has not been changed. This approach can be applied to any digital circuit and does not rely on secret keys or obfuscation.

97 MATHEMATICS AND COMPUTING↗

Detecting Hardware Trojans in PCBs Using Side Channel Loopbacks

Malicious modifications to printed circuit boards (PCBs) are known as hardware Trojans. These may arise when malafide third parties alter PCBs premanufacturing or postmanufacturing and are a concern in safety-critical applications, such as industrial control systems. In this research, we examine how data-driven detection can be utilized to detect such Trojans at run-time. We develop a flexible and reconfigurable PCB test bed derived from the popular open-source programmable logic controller (PLC) platform “OpenPLC.” We then develop a Trojan detection framework, which utilizes and analyzes multimodal side channels (e.g., timing, magnetic signals, power, and hardware performance counters). We consider defender-configurable input/output (I/O) loopback test, comparison with design-document baselines, and magnetometer-aided monitoring of system behavior under defender-chosen excitations. Our approach can extend to golden-free environments. Golden (known-good) versions of the PCBs are assumed not available, but design information, datasheets, and component-level data are available. We demonstrate the efficacy of our approach on a range of Trojans instantiated in the test bed.

42 ENGINEERING↗

Randomization of dangling nodes in a digital circuit design to mitigate hardware trojans

Described herein are various technologies pertaining to randomizing logic associated with dangling nodes in a digital circuit design. A dangling node is an input to or output from a logic gate in the digital circuit design that is identified as not impacting a desired output of the digital circuit design. Randomizing the logic associated with a dangling node can include deleting a logic gate, adding a logic gate, replacing a logic gate with another logic gate, etc. Randomizing the logic associated with the dangling node prevents hardware trojans that may have been inserted into the circuit design from being implemented in a circuit that is generated based upon the design.

97 MATHEMATICS AND COMPUTING↗

PRISTINE: An Emulation Platform for PCB-Level Hardware Trojans

Printed circuit Boards (PCBs) are becoming increasingly vulnerable to malicious design alteration, also known as Trojan attacks, due to a distributed business model that often involves various untrusted parties. Such attacks can be mounted at various stages in the PCB life cycle. The relative ease of alteration of PCB hardware even after fabrication (due to physical access to surface-mounted critical components and traces) makes them attractive for an adversary to manipulate their functional/physical behavior for malicious intent. There is a growing need to explore viable Trojan attacks in a PCB, analyze their functional and physical characteristics (e.g., impact on power or delay), and study the effectiveness of countermeasures against these attacks. While simulation-based approaches for PCB Trojan insertion are effective at creating a large population of possible Trojans, they fail to provide functional feasibility analysis with a realistic workload for a trigger circuit. Also, they cannot estimate a Trojan’s side-channel footprint due to the unavailability of physical models of diverse PCB components. To address these deficiencies, in this paper, we present PRISTINE, a PCB-level emulation system for any integrity or physical tampering issues, specifically, hardware Trojan insertion. The need for building such an emulation platform to resolve PCB trust issues in the supply chain is also surveyed and discussed. Both custom Hardware Hacking (HaHa) boards and multiple commercial PCBs are then used to test the ability of the proposed system to emulate various hardware Trojans specially designed to exploit board-specific hardware characteristics. Experimental results on emulated board-level Trojans show that a wide range of Trojans can be successfully activated, thus enabling the expected payload effects on both types of boards to be studied and quantified. The resulting data are further analyzed to create PCB-level Trojan benchmarks. In particular, a comparative evaluation of the experimental results is used to propose a risk level metric that quantifies the probability of detection and degree of payload impact of each Trojan on a given commercial PCB.

47 OTHER INSTRUMENTATION↗

Diversity for Microelectronics Lifecycle Security

In this work we examine approaches for using implementation diversity to disrupt or disable hardware trojans. We explore a variety of general frameworks for building diverse variants of circuits in voting architectures, and examine the impact of these on attackers and defenders mathematically and empirically. This work is augmented by analysis of a new majority voting technique. We also describe several automated approaches for generating diverse variants of a circuit and empirically study the overheads associated with these. We then describe a general technique for targeting functional circuit modifications to hardware trojans, present several specific implementations of this technique, and study the impact that they have on trojanized benchmark circuits.

97 MATHEMATICS AND COMPUTING↗

Non-Destructive State Machine Reverse Engineering

Most of the integrated circuits (ICs) that are in electronic systems today are based on state machines. We are taking advantage of this to develop a hardware reverse engineering method that discovers the IC’s underlying state machine, rather than its transistors and gates. While there are other methods for destructively reverse engineering ICs or for non-destructively characterizing ICs, our method offers a fast and accurate analysis while remaining non-destructive. To do this, we present an intelligent brute-force method of exploring the logic of the IC using only the input and outputs designed into the IC - the I/O pins. From this exploration, we can apply a folding algorithm to discover the designed state machine.

counterfeit↗

Memory protection

Accidental overwriting of files or of memory regions belonging to other programs, browsing of personal files by superusers, Trojan horses, and viruses are examples of breakdowns in workstations and personal computers that would be significantly reduced by memory protection. Memory protection is the capability of an operating system and supporting hardware to delimit segments of memory, to control whether segments can be read from or written into, and to confine accesses of a program to its segments alone. The absence of memory protection in many operating systems today is the result of a bias toward a narrow definition of performance as maximum instruction-execution rate. A broader definition, including the time to get the job done, makes clear that cost of recovery from memory interference errors reduces expected performance. The mechanisms of memory protection are well understood, powerful, efficient, and elegant. They add to performance in the broad sense without reducing instruction execution rate.

Denning, Peter J.↗

The Lucy Spacecraft

The Lucy spacecraft is developed from a combination of heritage components used on other NASA deep space missions, combined with a set of newly developed hardware specific to Lucy’s mission, most critically the solar arrays. These components are configured into a spacecraft capable of launching on the least expensive Atlas launch vehicle, deploying into a power-safe configuration, executing the high-precision Trojan asteroid encounters, and surviving the 12-year mission timeline.

planetary↗

Computer viruses

The worm, Trojan horse, bacterium, and virus are destructive programs that attack information stored in a computer's memory. Virus programs, which propagate by incorporating copies of themselves into other programs, are a growing menace in the late-1980s world of unprotected, networked workstations and personal computers. Limited immunity is offered by memory protection hardware, digitally authenticated object programs,and antibody programs that kill specific viruses. Additional immunity can be gained from the practice of digital hygiene, primarily the refusal to use software from untrusted sources. Full immunity requires attention in a social dimension, the accountability of programmers.

Denning, Peter J.↗

Use of Mechanical Heat Switch to Speed up TVAC Transitions on Flight Hardware Below 200K

Spaceflight hardware that operates at temperatures well below room temperature usually require being well isolated from their warmer environment in order to manage thermal parasitics adequately. This is especially true for spaceflight systems that rely on passive cooling such as a radiator. During ground testing, this design configuration can be problematic for TVAC cycling between operational temperature extremes, since the hardware temperatures may move extremely slowly and lengthen the duration of an already expensive and heavily staffed system-level TVAC campaign. One of the challenges of using an external means of speeding up temperature transitions is that a TVAC campaign usually also requires the simulation of flight-like environments to validate the design, and introducing a test feature to speed up transitions can disrupt the system such that flight-like environments are not achievable. Such an approach was used for the L’Ralph instrument level TVAC test. L’Ralph is a passively cooled instrument on the Lucy mission with planned flyby’s of the Trojan asteroids around 5.5 AU. The optics and visible detector are cooled below 190K, and the IR detector is cooled below 110K. During instrument TVAC qualification testing, a mechanical motor-controlled heat switch uses clamping pressure via a vise-grip mechanism to achieve faster temperature transitions by increasing the conduction to a cold sink. The heat switch system then disengages and employs zero-Q controls to achieve flight-like thermal environments for thermal balance plateaus. Results from stand-alone testing of the heat switch are discussed, including correlated on/off ratios and the expected conductance across its operational temperature range. Test data from an instrument level TVAC that successfully utilized the heat switch are also shown.

Daniel G Bae↗