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At least 19 records

Elimination of the bias-stress effect in ligand-free quantum dot field-effect transistors

Field-effect transistors (FETs) made from colloidal quantum dot (QD) solids commonly suffer from current–voltage hysteresis caused by the bias-stress effect (BSE), which complicates fundamental studies of charge transport in QD solids and the use of QD FETs in electronics. Here, we show that the BSE can be eliminated in n-channel PbSe QD FETs by first removing the QD ligands with a dose of H 2 S gas and then infilling the QD films with alumina by atomic layer deposition (ALD). The H 2 S-treated, alumina-infilled FETs have stable, hysteresis-free device characteristics (total short-term stability), indefinite air stability (total long-term stability), and a high electron mobility of up to 14 cm 2 V −1 s −1 , making them attractive for QD circuitry and optoelectronic devices. The BSE-free devices are utilized to conclusively establish the dependence of the electron mobility on temperature and QD diameter. We demonstrate that the BSE in these devices is caused by both electron trapping at the QD surface and proton drift within the film. The H 2 S/alumina chemistry produces ligand-free PbSe/PbS/Al 2 O 3 interfaces that lack the traps that cause the electronic part of the BSE, while full alumina infilling stops the proton motion responsible for the ionic part of the BSE. In conclusion, our matrix engineering approach should aid efforts to eliminate the BSE, boost carrier mobilities, and improve charge transport in other types of nanocrystal solids.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

Hysteresis modeling in graphene field effect transistors

Graphene field effect transistors with an Al{sub 2}O{sub 3} gate dielectric are fabricated on H-intercalated bilayer graphene grown on semi-insulating 4H-SiC by chemical vapour deposition. DC measurements of the gate voltage v{sub g} versus the drain current i{sub d} reveal a severe hysteresis of clockwise orientation. A capacitive model is used to derive the relationship between the applied gate voltage and the Fermi energy. The electron transport equations are then used to calculate the drain current for a given applied gate voltage. The hysteresis in measured data is then modeled via a modified Preisach kernel.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

New Flexible Channels for Room Temperature Tunneling Field Effect Transistors

Tunneling field effect transistors (TFETs) have been proposed to overcome the fundamental issues of Si based transistors, such as short channel effect, finite leakage current, and high contact resistance. Unfortunately, most if not all TFETs are operational only at cryogenic temperatures. Here we report that iron (Fe) quantum dots functionalized boron nitride nanotubes (QDs-BNNTs) can be used as the flexible tunneling channels of TFETs at room temperatures. The electrical insulating BNNTs are used as the one-dimensional (1D) substrates to confine the uniform formation of Fe QDs on their surface as the flexible tunneling channel. Consistent semiconductor-like transport behaviors under various bending conditions are detected by scanning tunneling spectroscopy in a transmission electron microscopy system (insitu STM-TEM). Ultimately, as suggested by computer simulation, the uniform distribution of Fe QDs enable an averaging effect on the possible electron tunneling pathways, which is responsible for the consistent transport properties that are not sensitive to bending.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

The fundamental downscaling limit of field effect transistors

We predict that within next 15 years a fundamental down-scaling limit for CMOS technology and other Field-Effect Transistors (FETs) will be reached. Specifically, we show that at room temperatures all FETs, irrespective of their channel material, will start experiencing unacceptable level of thermally induced errors around 5-nm gate lengths. These findings were confirmed by performing quantum mechanical transport simulations for a variety of 6-, 5-, and 4-nm gate length Si devices, optimized to satisfy high-performance logic specifications by ITRS. Different channel materials and wafer/channel orientations have also been studied; it is found that altering channel-source-drain materials achieves only insignificant increase in switching energy, which overall cannot sufficiently delay the approaching downscaling limit. Alternative possibilities are discussed to continue the increase of logic element densities for room temperature operation below the said limit.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Chemical Vapor-Deposited Hexagonal Boron Nitride as a Scalable Template for High-Performance Organic Field-Effect Transistors

Organic field-effect transistors have attracted much attention because of their potential use in low-cost, large-area, flexible electronics. High-performance organic transistors require a low density of grain boundaries in their organic films and a decrease in the charge trap density at the semiconductor–dielectric interface for efficient charge transport. In this respect, the role of the dielectric material is crucial because it primarily determines the growth of the film and the interfacial trap density. Here, we demonstrate the use of chemical vapor-deposited hexagonal boron nitride (CVD h-BN) as a scalable growth template/dielectric for high-performance organic field-effect transistors. The field-effect transistors based on C60 films grown on single-layer CVD h-BN exhibit an average mobility of 1.7 cm 2 V –1 s –1 and a maximal mobility of 2.9 cm 2 V –1 s –1 with on/off ratios of 10 7 . The structural and morphology analysis shows that the epitaxial, two-dimensional growth of C 60 on CVD h-BN is mainly responsible for the superior charge transport behavior. In conclusion, we believe that CVD h-BN can serve as a growth template for various organic semiconductors, allowing the development of large-area, high-performance flexible electronics.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

Nb-doped single crystalline MoS{sub 2} field effect transistor

We report on the demonstration of a p-type, single crystalline, few layer MoS{sub 2} field effect transistor (FET) using Niobium (Nb) as the dopant. The doping concentration was extracted and determined to be ∼3 × 10{sup 19}/cm{sup 3}. We also report on bilayer Nb-doped MoS{sub 2} FETs with ambipolar conduction. We found that the current ON-OFF ratio of the Nb-doped MoS{sub 2} FETs changes significantly as a function of the flake thickness. We attribute this experimental observation to bulk-type electrostatic effect in ultra-thin MoS{sub 2} crystals. We provide detailed analytical modeling in support of our claims. Finally, we show that in the presence of heavy doping, even ultra-thin 2D-semiconductors cannot be fully depleted and may behave as a 3D material when used in transistor geometry. Our findings provide important insights into the doping constraints of 2D materials, in general.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Simulation-based design of a strained graphene field effect transistor incorporating the pseudo magnetic field effect

We present a numerical study on the performance of strained graphene-based field-effect transistors. A local strain less than 10% is applied over a central channel region of the graphene to induce the shift of the Dirac point in the channel region along the transverse momentum direction. The left and the right unstrained graphene regions are doped to be either n-type or p-type. By using the atomistic tight-binding model and a Green's function method, we predict that the gate voltage applied to the central strained graphene region can switch the drain current on and off with an on/off ratio of more than six orders of magnitude at room temperature. This is in spite of the absence of a bandgap in the strained channel region. Steeper subthreshold slopes below 60 mV/decade are also predicted at room temperature because of a mechanism similar to the band-to-band tunneling field-effect transistors.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Organic-inorganic proximity effect in the magneto-conductance of vertical organic field effect transistors

Vertical organic field effect transistors having a patterned source electrode and an a-SiO{sub 2} insulation layer show high performance as a switching element with high transfer characteristics. By measuring the low field magneto-conductance under ambient conditions at room temperature, we show here that the proximity of the inorganic a-SiO{sub 2} insulation to the organic conducting channel affects considerably the magnetic response. We propose that in n-type devices, electrons in the organic conducting channel and spin bearing charged defects in the inorganic a-SiO{sub 2} insulation layer (e.g., O{sub 2} = Si{sup +·}) form oppositely charged spin pairs whose singlet-triplet spin configurations are mixed through the relatively strong hyperfine field of {sup 29}Si. By increasing the contact area between the insulation layer and the conducting channel, the ∼2% magneto-conductance response may be considerably enhanced.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Experimental and modeling study of 1/ f noise in multilayer MoS2 and MoSe2 field-effect transistors

In field-effect transistors (FETs) with two-dimensional (2D) transition metal dichalcogenide channels, the dependence of field-effect mobility on atomic layer thickness has been studied and interpreted in terms of interface scattering and interlayer coupling resistance (Rint). However, a model for 1/f noise, such as in MoS2 and in MoSe2 FETs, for various contact metals and layer number thicknesses has not been reported. In this work, we have experimentally studied current–voltage and 1/f noise on MoS2 and MoSe2 FETs with source and drain contacts of high and low work function metals to understand both the mobility and the noise behavior. We have developed a noise model incorporating layer number dependent Hooge parameters and Rint. The noise and mobility models utilize screening lengths for charge, mobility, and Hooge parameter to describe the variation of these quantities with a layer number. Using our single model topology with appropriate fitting parameters for each material and each contact metal, the model captures the experimentally observed layer thickness dependence of the Hooge parameter. Our noise analysis is fully comprehensive and, hence, could be applied to any 2D layered systems.

Kwon, Jiseok↗

Hybrid quantum dot-tin disulfide field-effect transistors with improved photocurrent and spectral responsivity

We report an improved photosensitivity in few-layer tin disulfide (SnS 2 ) field-effect transistors(FETs) following doping with CdSe/ZnS core/shell quantum dots(QDs). The hybrid QD-SnS 2 FET devices achieve more than 500% increase in the photocurrent response compared with the starting SnS 2 -only FET device and a spectral responsivity reaching over 650 A/W at 400 nm wavelength. The negligible electrical conductance in a control QD-only FET device suggests that the energy transfer between QDs and SnS 2 is the main mechanism responsible for the sensitization effect, which is consistent with the strong spectral overlap between QDphotoluminescence and SnS 2 optical absorption as well as the large nominal donor-acceptor interspacing between QD core and SnS 2 . Furthermore, we also find enhanced charge carrier mobility in hybrid QD-SnS 2 FETs which we attribute to a reduced contact Schottky barrier width due to an elevated background charge carrier density.

36 MATERIALS SCIENCE↗

Thick Layered Semiconductor Devices with Water Top-Gates: High On–Off Ratio Field-Effect Transistors and Aqueous Sensors

Layered semiconductors show promise as channel materials for field-effect transistors (FETs). Usually, such devices incorporate solid back or top gate dielectrics. Here, we explore deionized (DI) water as a solution top-gate for field-effect switching of layered semiconductors including SnS 2 , MoS 2 , and black phosphorus. The DI water gate is easily fabricated, can sustain rapid bias changes, and its efficient coupling to layered materials provides high on–off current ratios, near-ideal subthreshold swing, and enhanced short-channel behavior even for FETs with thick, bulk-like channels, where such control is difficult to realize with conventional back gating. Screening by the high-k solution gate eliminates hysteresis due to surface and interface trap states and substantially enhances the field-effect mobility. The onset of water electrolysis sets the ultimate limit to DI water gating at large negative gate bias. Measurements in this regime show promise for aqueous sensing, demonstrated here by the amperometric detection of glucose in aqueous solution. In conclusion, DI water gating of layered semiconductors can be harnessed in research on novel materials and devices, and it may with further development find broad applications in microelectronics and sensing.

36 MATERIALS SCIENCE↗

Photo‐/Thermal‐Responsive Field‐Effect Transistor upon Blending Polymeric Semiconductor with Hexaarylbiimidazole toward Photonically Programmable and Thermally Erasable Memory Device

Abstract It is shown that the semiconducting performance of field‐effect transistors (FETs) with PDPP4T (poly(diketopyrrolopyrrole‐quaterthiophene)) can be reversibly tuned by UV light irradiation and thermal heating after blending with the photochromic hexaarylbiimidazole compound ( p ‐NO 2 ‐HABI). A photo‐/thermal‐responsive FET with a blend thin film of PDPP4T and p ‐NO 2 ‐HABI is successfully fabricated. The transfer characteristics are altered significantly with current enhanced up to 10 6 ‐fold at V G = 0 V after UV light irradiation. However, further heating results in the recovery of the transfer curve. This approach can be extended to other semiconducting polymers such as P3HT (poly(3‐hexyl thiophene)), PBTTT (poly(2,5‐bis(3‐tetradecylthiophen‐2‐yl)thieno[3,2‐b] thiophene)) and PDPPDTT (poly(diketopyrrolopyrrole‐dithienothiophene)). It is hypothesized that TPIRs (2,4,5‐triphenylimidazolyl radicals) formed from p ‐NO 2 ‐HABI after UV light irradiation can interact with charge defects at the gate dielectric–semiconductor interface and those in the semiconducting layer to induce more hole carriers in the semiconducting channel. The application of the blend thin film of PDPP4T and p ‐NO 2 ‐HABI is further demonstrated to fabricate the photonically programmable and thermally erasable FET‐based nonvolatile memory devices that are advantageous in terms of i) high ON/OFF current ratio, ii) nondestructive reading at low electrical bias, and iii) reasonably highly stable ON‐state and OFF‐state.

Liu, Yidong↗

Quantum mechanical solver for confined heterostructure tunnel field-effect transistors

Heterostructure tunnel field-effect transistors (HTFET) are promising candidates for low-power applications in future technology nodes, as they are predicted to offer high on-currents, combined with a sub-60 mV/dec subthreshold swing. However, the effects of important quantum mechanical phenomena like size confinement at the heterojunction are not well understood, due to the theoretical and computational difficulties in modeling realistic heterostructures. We therefore present a ballistic quantum transport formalism, combining a novel envelope function approach for semiconductor heterostructures with the multiband quantum transmitting boundary method, which we extend to 2D potentials. We demonstrate an implementation of a 2-band version of the formalism and apply it to study confinement in realistic heterostructure diodes and p-n-i-n HTFETs. For the diodes, both transmission probabilities and current densities are found to decrease with stronger confinement. For the p-n-i-n HTFETs, the improved gate control is found to counteract the deterioration due to confinement.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗