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At least 19 records

The New Small Wheel electronics

The increase in luminosity, and consequent higher backgrounds, of the LHC upgrades require improved rejection of fake tracks in the forward region of the ATLAS Muon Spectrometer. The New Small Wheel upgrade of the Muon Spectrometer aims to reduce the large background of fake triggers from track segments that don't originate from the interaction point. The New Small Wheel employs two detector technologies, the resistive strip Micromegas detectors and the “small” Thin Gap Chambers, with a total of 2.45 million electrodes to be sensed. The two technologies require the design of a complex electronics system given that it consists of two different detector technologies and is required to provide both precision readout and a fast trigger. It will operate in a high background radiation region up to about 20 kHz/cm 2 at the expected HL-LHC luminosity of $\mathcal{L}$= 7.5 × 10 34 cm -2 s -1 . The architecture of the system is strongly defined by the GBTx data aggregation ASIC, the newly-introduced FELIX data router and the software based data handler of the ATLAS detector. The electronics complex of this new detector was designed and developed in the last ten years and consists of multiple radiation tolerant Application Specific Integrated Circuits, multiple front-end boards, dense boards with FPGA's and purpose-built Trigger Processor boards within the ATCA standard. The New Small Wheel has been installed in 2021 and is undergoing integration within ATLAS for LHC Run 3. It should operate through the end of Run 4 (December 2032). In this manuscript, the overall design of the New Small Wheel electronics is presented.

47 OTHER INSTRUMENTATION↗

First results from a multiplexed and massive instrument with sub-electron noise Skipper-CCDs

Here, we present a new instrument composed of a large number of sub-electron noise Skipper-CCDs operated with a two stage analog multiplexed readout scheme suitable for scaling to thousands of channels. New, thick, 1.35 Mpix sensors, from a new foundry, are glued into a Multi-Chip Module (MCM) printed circuit board on a ceramic substrate which has 16 sensors each. The instrument, that can hold up-to 16 MCMs, a total of 256 Skipper-CCD sensors (called a Super-Module with ≈ 130 grams of active mass and 346 Mpix), is part of the R&D effort of the OSCURA experiment which will have ≈ 94 super-modules. Experimental results with 10 MCMs and 160 Skipper-CCDs sensors are presented in this paper. This is already the largest ever built instrument with single electron sensitivity CCDs using nondestructive readout, both, in terms of active mass and number of channels.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Electrical performances of pre-production staves for the ATLAS ITk Strip Detector Upgrade

The ATLAS experiment is currently preparing for an upgrade of the inner tracking detector for the High-Luminosity LHC. The new tracker, ITk, employs an all-silicon detector with outer strip layers. The building block of the ITk strip barrel is the stave which consists of a low-mass support structure hosting the common electrical, optical and cooling services as well as 28 silicon modules. In this contribution, we outline the challenging aspects of the stave pre-production testing phase at Brookhaven National Laboratory. Here, the electrical characterization of these staves, hosting the final design of all ASICs, will be discussed in detail.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

High spatial resolution direct conversion amorphous selenium X-ray detectors with monolithically integrated CMOS readout

Recent progress in the field of micron-scale spatial resolution direct conversion X-ray detectors for high-energy synchrotron light sources serve applications ranging from nondestructive and noninvasive microscopy techniques which provide insight into the structure and morphology of crystals, to medical diagnostic measurement devices. Amorphous selenium ( a -Se) as a wide-bandgap thermally evaporated photoconductor exhibits ultra-low thermal generation rates for dark carriers and has been extensively used in X-ray medical imaging. Being an amorphous material, it can further be deposited over large areas at room temperatures and at substantially lower costs as compared to crystalline semiconductors. Here, to address the demands for a high-energy and high spatial resolution X-ray detector for synchrotron light source applications, we have thermally evaporated a -Se on a Mixed-Mode Pixel Array Detector (MM-PAD) Application Specific Integrated Circuit (ASIC). The ASIC format consists of 128 × 128 square pixels each 150 μm on a side. A 200 μm a -Se layer was directly deposited on the ASIC followed by a metal top electrode. The completed detector assembly was tested with 45 kV Ag and 23 kV Cu X-ray tube sources. The detector fabrication, performances, Modulation Transfer Function (MTF) measurements, and simulations are reported.

36 MATERIALS SCIENCE↗

A novel silicon photomultiplier readout architecture for low-light applications

In this article we describe the photon detection readout electronics for the nEDM@SNS experiment. The chosen "photon counting" architecture, which utilizes high-efficiency silicon photomultipliers (SiPMs) and is appropriate for low-light applications, allows the use of a relatively high SiPM operating voltage. This maximizes photon detection efficiency and minimizes gain/efficiency voltage-dependence while eliminating direct optical cross-talk.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Integration of EDWARD readout architecture in full-field fluorescence imaging detector

Data bandwidth, timing resolution and resource utilization in readouts of radiation detectors are a constant challenge. Event driven solutions are pushing against well-trenched framed solutions. The idea for an asynchronous readout architecture called EDWARD ( E vent- D riven W ith A ccess and R eset D ecoder) was presented at the TWEPP 2021 conference. Here we show the progress of our work which resulted in two chip prototypes. The first one, named 3FI65P1, is a full device with the analog pixel circuitry suited for full-field fluorescence imaging. It is already manufactured, and preliminary results are presented. Finally, the second chip, named EDWARD65P1, contains digital pulse generators with Poisson-exponential distribution in each pixel for extraction of the performance matrix of the EDWARD architecture alone.

47 OTHER INSTRUMENTATION↗

First operation of a multi-channel Q-Pix prototype: measuring transverse electron diffusion in a gas time projection chamber

We report measurements of the transverse diffusion of electrons in P-10 gas (90% Ar, 10% CH 4 ) in a laboratory-scale time projection chamber (TPC) utilizing a novel pixelated signal capture and digitization technique known as Q-Pix. The Q-Pix method incorporates a precision switched integrating transimpedance amplifier whose output is compared to a threshold voltage. Upon reaching the threshold, a comparator sends a 'reset' signal, initiating a discharge of the integrating capacitor. The time difference between successive resets is inversely proportional to the average current at the pixel in that time interval, and the number of resets is directly proportional to the total collected charge. We developed a 16-channel Q-Pix prototype fabricated from commercial off-the-shelf components and coupled them to 16 concentric annular anode electrodes to measure the spatial extent of the electron swarm that reaches the anode after drifting through the uniform field of the TPC. The swarm is produced at a gold photocathode using pulsed UV light. The measured transverse diffusion agrees with simulations in PyBoltz across a range of operating pressures (200–1500 Torr). These results demonstrate that a Q-Pix readout can successfully reconstruct the ionization topology in a TPC.

47 OTHER INSTRUMENTATION↗

Beam test performance studies of CMS Phase-2 Outer Tracker module prototypes

A new tracking detector will be installed as part of thePhase-2 upgrade of the CMS detector for the high-luminosity LHC era.This tracking detector includes the Inner Tracker, equipped withsilicon pixel sensor modules, and the Outer Tracker, consisting ofmodules with two parallel stacked silicon sensors. The Outer Trackerfront-end ASICs will be able to correlate hits from chargedparticles in these two sensors to perform on-module discriminationof transverse momenta (p$_{T}$). The p$_{T}$information is generated at a frequency of 40 MHz and will be usedin the Level-1 trigger decision of CMS. Prototypes of theso-called 2S modules were tested at the Test Beam Facility at DESYHamburg between 2019 and 2020. These modules use the finalfront-end ASIC, the CMS Binary Chip (CBC), and for the firsttime the Concentrator Integrated Circuit (CIC), optical readoutand on-module power conversion. In total, seven modules were tested,one of which was assembled with sensors irradiated with protons. Animportant aspect was to show that it is possible to read out modulessynchronously. A cluster hit efficiency of about 99.75 % wasachieved for all modules. The CBC p$_{T}$ discriminationmechanism has been verified to work together with the CIC andoptical readout. The measured module performance meets therequirements for operation in the upgraded CMS tracking detector.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Event-driven readout development: testing of the EDWARD65P1 chip with integrated event generators

Building on a prototype readout integrated circuit for segmented silicon sensors with the EDWARD event-driven readout architecture, the front-end in each pixel was replaced by a hardware generator to verify readout performance, ensuring no data loss, consistent priority handling, and speed verification. Here, this generator produces Poisson-distributed readout requests with individually tunable rates per pixel via a digitally controlled oscillator. The resulting EDWARD65P1 test ASIC is a 32×32 pixel matrix with a 100 μm pitch, equipped with digital event generators simulating radiation hits at user-defined rates. Test results for this new design are presented.

47 OTHER INSTRUMENTATION↗

Low power on-chip data transmission for wafer-scale monolithic active pixel sensors

Here, this paper details the implementation of the digital pulse shaping subsystem within the Backbone Transmission Line Encoding (BTLE) driver, a low-power, long-distance on-chip data transmission solution designed in a 65 nm CMOS process. Digital pulse shaping is critical for minimizing inter-symbol interference (ISI) caused by bandwidth limitations of on-chip interconnects, especially in wafer-scale monolithic active pixel sensors (MAPS). A duobinary encoder coupled with a parallelized polyphase finite impulse response (FIR) filter is used for efficient shaping of the transmitted signal spectrum. This reconfigurable architecture achieves reliable 160 Mb/s data transfer over a 10 cm on-chip link, as validated by simulations demonstrating low power consumption (FoM 37.3 fJ/bit/mm of transmission line length) and effective ISI mitigation.

47 OTHER INSTRUMENTATION↗

Large-scale real-time signal processing in physics experiments: the ALICE TPC FPGA pipeline

For LHC Run 3, the ALICE Time Projection Chamber was upgraded to operate in continuous readout mode. Interaction rates of up to 50 kHz in Pb-Pb collisions require real-time processing of more than 3 TB s -1 of raw detector data. This requirement is met by a custom FPGA-based processing pipeline that performs the complete front-end data treatment fully in-stream, including common-mode correction, pedestal subtraction, ion-tail filtering, zero suppression, and dense data packing. A central element of the design is a highly parallel common-mode correction algorithm operating directly on the streaming data. It robustly identifies signal-free readout channels on a time-bin basis and applies pad-dependent scaling to compensate for local variations in capacitive coupling in the GEM readout. In combination with pedestal subtraction and ion-tail filtering, this enables accurate baseline restoration under extreme high-occupancy conditions, preventing signal loss while efficiently suppressing noise prior to zero suppression. The pipeline operates continuously at the full detector bandwidth and reduces the raw input rate of approximately 3 TB s -1 to about 900 GBps for Pb-Pb collisions at the target interaction rate. Overall, it represents a large-scale FPGA-based real-time signal-processing implementation for high-energy physics detector readout.

Digital signal processing (DSP)↗

GRAPH — an readout ASIC for large MCP based detectors

We present a programmable 16 channel, mixed signal, low power readout ASIC, having the project historically named Gigasample Recorder of Analog waveforms from a PHotodetector (GRAPH). It is designed to read large aperture single photon imaging detectors using micro channel plates for charge multiplication, and measuring the detector's response on crossed strips anodes to extrapolate the incoming photon position. Each channel consists of a fast, low power and low noise charge sensitive amplifier, which provides a myriad of coarse and fine programmable options for gain and shaping settings. Further, the amplified signal is recorded using, to our knowledge novel, the Hybrid Universal sampLing Architecture (HULA) ADC. A kind of mixed signal double buffer memory, that enables concurrent waveform recording, and selected event digitized data extraction. The sampling frequency is freely adjustable between few kHz up to 125 MHz, while the chip's internal digital memory holds a history 2048 samples for each channel, with a digital headroom of 12 bits. An optimized region of interest sample-read algorithm allows to extract the information just around the event pulse peak, while selecting the next event, thus substantially reducing the operational dead time. The chip is designed in 130 nm TSMC CMOS technology, and its power consumption is around 47 mW per channel.

47 OTHER INSTRUMENTATION↗

Readout electronics for low occupancy High-Pressure Gas TPCs

High-Pressure Gas Time Projection Chambers (HPgTPCs) have benefits such as low energy thresholds, magnetisability, and 4π acceptance, making them ideal for neutrino experiments such as DUNE. We present the design of an FPGA-based solution optimised for Gaseous Argon Near Detector (ND-GAr), which is part of the Phase-II more capable near detector for DUNE. These electronics reduce the cost significantly compared to using collider readout electronics, which are typically designed for much higher occupancy and therefore, for example, need much larger numbers of FPGAs and power per channel. We demonstrate the performance of our electronics with the Teststand for an Overpressurised Argon Detector (TOAD) at Fermilab in the US at a range of pressures and gas mixtures up to 4.5 barA, reading out ∼10 000 channels from a Multi-Wire Proportional Chamber (MWPC). The operation took place between April and July of 2024. We measure the noise characteristics of the system to be sufficiently low, and we identify sources of noise that can be further mitigated in the next iteration. We also note that the cooling scheme used in the test requires improvement before full-scale deployment. Despite these necessary improvements, we show that the system can fulfil the needs of a HPgTPC for a fraction of the price of collider readout electronics.

Data acquisition concepts↗

Embedded FPGA developments in 130 nm and 28 nm CMOS for machine learning in particle detector readout

Embedded field programmable gate array (eFPGA) technology allows the implementation of reconfigurable logic within the design of an application-specific integrated circuit (ASIC). This approach offers the low power and efficiency of an ASIC along with the ease of FPGA configuration, particularly beneficial for the use case of machine learning in the data pipeline of next-generation collider experiments. An open-source framework called "FABulous" was used to design eFPGAs using 130 nm and 28 nm CMOS technology nodes, which were subsequently fabricated and verified through testing. The capability of an eFPGA to act as a front-end readout chip was assessed using simulation of high energy particles passing through a silicon pixel sensor. A machine learning-based classifier, designed for reduction of sensor data at the source, was synthesized and configured onto the eFPGA. A successful proof-of-concept was demonstrated through reproduction of the expected algorithm result on the eFPGA with perfect accuracy. Finally, further development of the eFPGA technology and its application to collider detector readout is discussed.

47 OTHER INSTRUMENTATION↗

Scintillation and cherenkov photon counting detectors with analog silicon photomultipliers for TOF-PET

Objective. Standard signal processing approaches for scintillation detectors in positron emission tomography (PET) derive accurate estimates for 511 keV photon time of interaction and energy imparted to the detection media from aggregate characteristics of electronic pulse shapes. The ultimate realization of a scintillation detector for PET is one that provides a unique timestamp and position for each detected scintillation photon. Detectors with these capabilities enable advanced concepts for three-dimensional (3D) position and time of interaction estimation with methods that exploit the spatiotemporal arrival time kinetics of individual scintillation photons. Approach. In this work, we show that taking into consideration the temporal photon emission density of a scintillator, the channel density of an analog silicon photomultiplier (SiPM) array, and employing fast electronic readout with digital signal processing, a detector that counts and timestamps scintillation photons can be realized. To demonstrate this approach, a prototype detector was constructed, comprising multichannel electronic readout for a bismuth germanate (BGO) scintillator coupled to an SiPM array. Main Results. In proof-of-concept measurements with this detector, we were able to count and provide unique timestamps for 66% of all optical photons, where the remaining 34% (two-or-more-photon pulses) are also independently counted, but each photon bunch shares a common timestamp. We show this detector concept can implement 3D positioning of 511 keV photon interactions and thereby enable corrections for time of interaction estimators. The detector achieved 17.6% energy resolution at 511 keV and 237 ± 10 ps full-width-at-half-maximum coincidence time resolution (CTR) (fast spectral component) versus a reference detector. We outline the methodology, readout, and approach for achieving this detector capability in first-ever, proof-of-concept measurements for scintillation photon counting detector with analog silicon photomultipliers. Significance. The presented detector concept is a promising design for large area, high sensitivity TOF-PET detector modules that can implement advanced event positioning and time of interaction estimators, which could push state-of-the-art performance.

62 RADIOLOGY AND NUCLEAR MEDICINE↗

Low power implementation of high frequency SiPM readout for Cherenkov and scintillation detectors in TOF-PET

State-of-the-art (SoA) electronic readout for silicon photomultiplier (SiPM)-based scintillation detectors that demonstrate experimental limits in achievable coincidence time resolution (CTR) leverage low noise, high frequency signal processing to facilitate a single photon time response that is near the limit of the SiPMs architecture. This readout strategy can optimally exploit fast luminescence and prompt photon populations, and promising measurements show detector concepts employing this readout can greatly advance PET detector CTR, relative to SoA in clinical systems. However, the technique employs power hungry components which make the electronics chain impractical for channel-dense time-of-flight (TOF)-PET detectors. We have developed and tested a low noise and high frequency readout circuit which is performant at low power and consists of discrete elements with small footprints, making it feasible for integration into TOF-PET detector prototypes. A 3 × 3 mm 2 Broadcom SiPM with this readout chain exhibited sub-100 ps single photon time resolution at 10 mW of power consumption, with a relatively minor performance degradation to 120 ± 2 ps FWHM at 5 mW. CTR measurements with 3 × 3 × 20 mm 3 LYSO and fast LGSO scintillators demonstrated 127 ± 3 ps and 113 ± 2 ps FWHM at optimal power operation and 133 ± 2 ps and 121 ± 3 ps CTR at 5 mW. BGO crystals 3 × 3 × 20 mm 3 in size show 271 ± 5 ps FWHM CTR (1174 ± 14 ps full-width-at-tenth-maximum (FWTM)) at optimal power dissipation and 289 ± 8 ps (1296 ± 33 ps FWTM) at 5 mW. The compact and low power readout topology that achieves this performance thereby offers a platform to greatly advance PET system CTR and also opportunities to provide high performance TOF-PET at reduced material cost.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Cryogenic electronics for noble liquid neutrino detectors

In this paper we present the general features of cryogenic (or “cold”) electronics for noble liquid time projection chambers, with design principles and details for neutrino physics, a brief history of the technology and details of recent research and development that is driving the design of the detectors under construction. Finally, some comments on future R&D envisioned and the impact of this work on other fields is described. “Cold” in the context of this work applies to CMOS devices operated at 77 K and above, at liquids temperatures of LAr (89 K), LKr (125 K) and LXe (165 K), with most of the tests performed in, or at LN 2 (77 K). Additionally, the paper is concentrated on the design of cold electronics for large liquid argon TPCs, those that have been successfully operated, MicroBooNE and ProtoDUNE, and those designed or under construction, such as SBND and DUNE first and second 10 kton modules. The high performance achieved with MicroBooNE and ProtoDUNE – a high signal-to-noise ratio combined with high stability of response – is mainly due to the integral approach to design and construction of sensing electrodes with cold readout electronics in a modular approach with the cryostat signal feed-throughs incorporating warm interface electronics into a Faraday cage with the cryostat. The integral concept is described in some detail in this paper.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

µRWELL-PICOSEC: The Development of Fast Timing Resistive Micro-WELL Detector Technology.

We present the development of a new concept of fast timing gaseous detector, the ?RWELL-PICOSEC detector based on Resistive Micro-Well (?RWELL) technology to provide timing resolution in the tens of picosecond range for application as time-of-flight (TOF) technology in the particle physics and medical instrumentation fields. The ?RWELL-PICOSEC technology combined a Cerenkov radiator for the generation of Cerenkov photons from high energy charged particles, a photocathode for the conversion of the produced photons into primary electrons and the ?RWELL foil for the multiplication of the electron to produce large signal on pad segmentation readout. The proof of concept of ?RWELL-PICOSEC is demonstrated with a small single-channel prototype and preliminary timing performance of 90 ps has been measured. Optimization study the amplification structure of ?RWELL-PICOSEC for the improvement of timing resolution is discussed and results on timing performance studies in beam at CERN are presented. The development of large area (100 mm × 100 mm) ?RWELL-PICOSEC and associated multichannel fast readout electronics and data acquisition system are also reported

Weisenberger, Andrew↗