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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 19 records
All sourcesNASA NTRSDOE OSTI
NASA NTRS2017

IMAPS Device Packaging Conference 2017 - Engineered Micro Systems & Devices Track

NASA field center Marshall Space Flight Center (Huntsville, AL), has invested in advanced wireless sensor technology development. Developments for a wireless microcontroller back-end were primarily focused on the commercial Synapse Wireless family of devices. These devices have many useful features for NASA applications, good characteristics and the ability to be programmed Over-The-Air (OTA). The effort has focused on two widely used sensor types, mechanical strain gauges and thermal sensors. Mechanical strain gauges are used extensively in NASA structural testing and even on vehicle instrumentation systems. Additionally, thermal monitoring with many types of sensors is extensively used. These thermal sensors include thermocouples of all types, resistive temperature devices (RTDs), diodes and other thermal sensor types. The wireless thermal board will accommodate all of these types of sensor inputs to an analog front end. The analog front end on each of the sensors interfaces to the Synapse wireless microcontroller, based on the Atmel Atmega128 device. Once the analog sensor output data is digitized by the onboard analog to digital converter (A/D), the data is available for analysis, computation or transmission. Various hardware features allow custom embedded software to manage battery power to enhance battery life. This technology development fits nicely into using numerous additional sensor front ends, including some of the low-cost printed circuit board capacitive moisture content sensors currently being developed at Auburn University.

Varnavas, Kosta↗
NASA NTRS1975

Open coil structure for bubble-memory-device packaging

Concept has several important advantages over close-wound system: memory and coil chips are separate and interchangeable; interconnections in coil level are eliminated by packing memory chip and electronics in single structure; and coil size can be adjusted to optimum value in terms of power dissipation and field uniformity.

Chen, T. T.↗
NASA NTRS2000

Challenges of Packaging Photonic Devices

Presently used photonic packaging methods are labor intensive and often unreliable. Studies have shown laser welding to be the superior fastening technology but it must be used in combination with a compatible positioning technology. The right combination of positioning technology and fastening technology which will result in low cost, reliable photonic assemblies is yet to be developed.

Lutes, George↗
NASA NTRS1992

High-performance packaging for monolithic microwave and millimeter-wave integrated circuits

Packaging schemes were developed that provide low-loss, hermetic enclosure for advanced monolithic microwave and millimeter-wave integrated circuits (MMICs). The package designs are based on a fused quartz substrate material that offers improved radio frequency (RF) performance through 44 gigahertz (GHz). The small size and weight of the packages make them appropriate for a variety of applications, including phased array antenna systems. Packages were designed in two forms; one for housing a single MMIC chip, the second in the form of a multi-chip phased array module. The single chip array module was developed in three separate sizes, for chips of different geometry and frequency requirements. The phased array module was developed to address packaging directly for antenna applications, and includes transmission line and interconnect structures to support multi-element operation. All packages are fabricated using fused quartz substrate materials. As part of the packaging effort, a test fixture was developed to interface the single chip packages to conventional laboratory instrumentation for characterization of the packaged devices. The package and test fixture designs were both developed in a generic sense, optimizing performance for a wide range of possible applications and devices.

Shalkhauser, K. A.↗
NASA NTRS2008

Are Current SEE Test Procedures Adequate for Modern Devices and Electronics Technologies?

Believe it or not, this has been a simplistic look at starting a checklist for SEE testing. Given a memory that has 68 operating modes, when a SEU occurs that changes the mode, just how do you determine what's going on? Laser and microbeam tests can help, but not easily for modern packaged devices. Expanding this approach to other more complex devices such as ADCs or processors as well as analog devices should be considered. The recommendation is to use the existing text standards as the starting point. Just make your own checklist for the device/technology/issues being considered. At HEART 2007, we presented some of the burgeoning challenges associated with single event effect(SEE) testing of modern commercial memories: a) Package, device complexity, test fixture, and data analysis issues were discussed; b) "Complete" SEE Characterization would take 15 years; c) Qualification test costs have a greater than 4 times increase over the last decade. In this talk, we continue to explore the roles of technology with an emphasis on the existing SEE Test Procedures and some of the concerns related to modern devices. The primary objective of the briefing is to provide some overarching guidance concerning the many considerations involved in the formulation of a SEE test plan provided in a " Checklist" format.we note that there is no such thing as a complete check list and that the best approach is to develop a flexible test plan that takes into account the device type and functions, the device technology, circuit and package design, and, of course, test facility and beam characteristics.

LaBel, Kenneth A.↗
DOE OSTI2022

Novel Harsh Environment Materials and Fabrication Techniques for Wireless Sensor Applications (Final Report)

The overarching goal of this project is to establish a center of excellence program at the University of Maine that is focused on Harsh Environmental Materials and Fabrication Techniques for Wireless Sensor Applications. UMaine is well-positioned to build on previous successes in the areas of materials science research and sensor engineering. Since 1980, the Laboratory for Surface Science & Technology (LASST) has been a very successful interdisciplinary UMaine research center with a well-established infrastructure to investigate surfaces, interfaces, thin films, and micro/nano-fabrication. This infrastructure established through NSF, DOE, DOD, NASA, the State of Maine, and industry includes (i) a 3,500 ft2 clean room with nano/microfabrication and photolithography instrumentation, (ii) thin film synthesis, processing and characterization, (iii) surface and thin film analytical chemistry tools, and (iv) device packaging, electronic testing, wireless devices, system fabrication, and sensor test facilities. This strong foundation is the basis for a planned significant growth in R&D capacity currently underway. To that end, since the start of this project in the Fall of 2019, LASST has undergone a transition to become a new interdisciplinary center at UMaine, named the Frontier Institute for Research in Sensor Technologies (FIRST). This new focus represents a commitment and investment by UMaine that aligns with the proposed DOE-EPSCoR theme, capitalizing on the state-of-the-art instrumentation to form an energized group of faculty and students pursuing advances in sensor materials, devices, and applications.

36 MATERIALS SCIENCE↗
NASA NTRS2008

Radiation Testing, Characterization and Qualification Challenges for Modern Microelectronics and Photonics Devices and Technologies

At an earlier conference we discussed a selection of the challenges for radiation testing of modern semiconductor devices focusing on state-of-the-art CMOS technologies. In this presentation, we extend this discussion focusing on the following areas: (1) Device packaging, (2) Evolving physical single even upset mechanisms, (3) Device complexity, and (4) the goal of understanding the limitations and interpretation of radiation testing results.

LaBel, Kenneth A.↗
NASA NTRS2010

Accelerated Aging System for Prognostics of Power Semiconductor Devices

Prognostics is an engineering discipline that focuses on estimation of the health state of a component and the prediction of its remaining useful life (RUL) before failure. Health state estimation is based on actual conditions and it is fundamental for the prediction of RUL under anticipated future usage. Failure of electronic devices is of great concern as future aircraft will see an increase of electronics to drive and control safety-critical equipment throughout the aircraft. Therefore, development of prognostics solutions for electronics is of key importance. This paper presents an accelerated aging system for gate-controlled power transistors. This system allows for the understanding of the effects of failure mechanisms, and the identification of leading indicators of failure which are essential in the development of physics-based degradation models and RUL prediction. In particular, this system isolates electrical overstress from thermal overstress. Also, this system allows for a precise control of internal temperatures, enabling the exploration of intrinsic failure mechanisms not related to the device packaging. By controlling the temperature within safe operation levels of the device, accelerated aging is induced by electrical overstress only, avoiding the generation of thermal cycles. The temperature is controlled by active thermal-electric units. Several electrical and thermal signals are measured in-situ and recorded for further analysis in the identification of leading indicators of failures. This system, therefore, provides a unique capability in the exploration of different failure mechanisms and the identification of precursors of failure that can be used to provide a health management solution for electronic devices.

Celaya, Jose R.↗
DOE OSTI2025

Thermal Management for Planar Package Power Electronics (CRADA Final Report)

The National Renewable Energy Laboratory (NREL) and John Deere Electronic Solutions (JDES) collaborated to develop and evaluate computer models and simulations related to the thermal performance of semiconductor device packaging for an inverter of an off-road vehicle ("Semiconductor Packaging"). The objective of the research was for NREL and JDES to develop a two or three-dimensional computer-aided design model of the Semiconductor Packaging ("Computer Model") for thermal performance evaluation in a simulation. The project developed computer models of a Semiconductor Package of silicon-carbide semiconductor devices with appropriate thermal dissipation via one or more of the following thermal features: a double-sided planar cooling configuration, an air-cooled configuration, a liquid-cooled configuration for off-road inverter applications in a relevant simulated operating environment. It is noted that surface area and prototype product embodiment consisting of air-cooled and liquid-cooled configurations may and may not be in direct contact with power semiconductor chips. The idea was to explore and develop packaging and thermal management technology for power semiconductors that was most effective in the performance yet had least burden in overall product cost for a given application.

33 ADVANCED PROPULSION SYSTEMS↗
DOE OSTI2023

Operando Temperature Measurements of Photovoltaic Laser Power Converter Devices Under Continuous High-Intensity Illumination

Photovoltaic devices that operate under extremely high irradiances, such as laser power converters (LPCs), may also operate at elevated temperatures, even under active cooling, as the result of large temperature gradients. We demonstrate the operation of GaAs LPC devices under orders of magnitude of irradiances up to 150 W/cm 2 in a monochromatic laser simulator with an active cooling stage. The steady-state open-circuit voltage (V OC ) as a function of irradiance is known to droop at high irradiance as the result of junction heating, but the junction temperature can be difficult to measure by conventional methods. Fast, transient V OC measurements under these extreme operating conditions are used here to determine the junction temperature. Empirical V OC temperature coefficients of the devices at each irradiance of interest are determined and used as an integral part of this technique. We show that the thermal design of different LPC devices strongly affects the operating temperature of the junctions. Knowledge of the operating temperature can be a strong tool for understanding the nature of loss mechanisms and improving the design for the operation of photovoltaic LPCs at high irradiances. Furthermore, this technique can be used for laboratory devices during initial design as well as to characterize mass-produced and packaged devices for quality control.

14 SOLAR ENERGY↗
NASA NTRS1980

Cost savings in LSI fabrication

One year study program was divided into three tasks: to identify costs factors involved in packaged electronic subsystems as function of LSI density and reliability; to select most promising factors that might be modified to reduce costs in high-density packaging; and to investigate cost-saving beam tape technology for producing high-volume discrete-device packages. Results are published in 67 page report.

Himmel, R. P.↗
DOE OSTI2026

New perspectives on materials and device dynamics using time-resolved full-field diffraction X-ray imaging

Understanding how materials evolve during synthesis, processing, or device operation requires experimental access to structural dynamics across wide ranges of length and time scales, often in bulk samples or even within packaged devices. Time-resolved full-field diffraction X-ray microscopy has recently emerged as a powerful way to meet this need by combining the penetration and structural sensitivity of X-ray diffraction with objective-lens-based magnification, sensitive high-resolution X-ray imaging detectors, and pump-probe and real-time imaging strategies. Advances in full-field X-ray diffraction microscopy, often termed dark-field X-ray microscopy (DFXM), enable simultaneous imaging of extended fields of view while retaining crystallographic selectivity. Time-resolved DFXM promises to enable advances in materials processing and dynamics, electrochemical and photochemical processes, and the design of electronic devices. This Perspective summarizes the key instrumental concepts that define the performance of these methods, including the choice of imaging optics, detector considerations, and the impact of source time structure at synchrotron light sources and X-ray free-electron lasers (XFELs). We discuss the simultaneous use of complementary imaging modes that are increasingly used in practice. The early demonstrations of the potential of time-resolved DFXM include real-time defect and grain-boundary dynamics during metal annealing, stroboscopic imaging of functional devices with high strain sensitivity, and ultrafast pump-probe implementations at XFELs that directly visualize acoustic-wave propagation and energy dissipation in bulk crystals.

Dark-field X-ray microscopy↗
NASA NTRS2008

Radiation Testing, Characterization and Qualification Challenges for Modern Microelectronics and Photonics Devices and Technologies

At GOMAC 2007, we discussed a selection of the challenges for radiation testing of modern semiconductor devices focusing on state-of-the-art memory technologies. This included FLASH non-volatile memories (NVMs) and synchronous dynamic random access memories (SDRAMs). In this presentation, we extend this discussion in device packaging and complexity as well as single event upset (SEU) mechanisms using several technology areas as examples including: system-on-a-chip (SOC) devices and photonic or fiber optic systems. The underlying goal is intended to provoke thought for understanding the limitations and interpretation of radiation testing results.

LaBel, Kenneth A.↗
NASA NTRS2015

High-Temperature, Wirebondless, Ultracompact Wide Bandgap Power Semiconductor Modules

Silicon carbide (SiC) and other wide bandgap semiconductors offer great promise of high power rating, high operating temperature, simple thermal management, and ultrahigh power density for both space and commercial power electronic systems. However, this great potential is seriously limited by the lack of reliable high-temperature device packaging technology. This Phase II project developed an ultracompact hybrid power module packaging technology based on the use of double lead frames and direct lead frame-to-chip transient liquid phase (TLP) bonding that allows device operation up to 450 degC. The new power module will have a very small form factor with 3-5X reduction in size and weight from the prior art, and it will be capable of operating from 450 degC to -125 degC. This technology will have a profound impact on power electronics and energy conversion technologies and help to conserve energy and the environment as well as reduce the nation's dependence on fossil fuels.

Elmes, John↗