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At least 19 records

Workshop on Advanced Computing for Connected and Automated Vehicles

To safely and reliably operate without a human driver, connected and automated vehicles (CAVs) require more advanced computing hardware and software solutions than are implemented today in vehicles that provide driver-assistance features. A workshop was held to discuss advanced microelectronics and computing approaches that can help meet future energy and computational requirements for CAVs. Workshop questions were posed as follows: will highly automated vehicles be viable with conventional computing approaches or will they require a step-change in computing; what are the energy requirements to support on-board sensing and computing; and what advanced computing approaches could reduce the energy requirements while meeting their computational requirements? At present, there is no clear convergence in the computing architecture for highly automated vehicles. However, workshop participants generally agreed that there is a need to improve the computing performance per watt by at least 10x to advance the degree of automation. Participants suggested that DOE and the national laboratories could play a near-term role by developing benchmarks for determining and comparing CAV computing performance, developing public data sets to support algorithm and software development, and contributing precompetitive advancements in energy efficient computing.

33 ADVANCED PROPULSION SYSTEMS↗

Comparing Server Energy Use and Efficiency Using Small Sample Sizes

This report documents a demonstration that compared the energy consumption and efficiency of a limited sample size of server-type IT equipment from different manufacturers by measuring power at the server power supply power cords. The results are specific to the equipment and methods used. However, it is hoped that those responsible for IT equipment selection can used the methods described to choose models that optimize energy use efficiency. The demonstration was conducted in a data center at Lawrence Berkeley National Laboratory in Berkeley, California. It was performed with five servers of similar mechanical and electronic specifications; three from Intel and one each from Dell and Supermicro. Server IT equipment is constructed using commodity components, server manufacturer-designed assemblies, and control systems. Server compute efficiency is constrained by the commodity component specifications and integration requirements. The design freedom, outside of the commodity component constraints, provides room for the manufacturer to offer a product with competitive efficiency that meets market needs at a compelling price. A goal of the demonstration was to compare and quantify the server efficiency for three different brands. The efficiency is defined as the average compute rate (computations per unit of time) divided by the average energy consumption rate. The research team used an industry standard benchmark software package to provide a repeatable software load to obtain the compute rate and provide a variety of power consumption levels. Energy use when the servers were in an idle state (not providing computing work) were also measured. At high server compute loads, all brands, using the same key components (processors and memory), had similar results; therefore, from these results, it could not be concluded that one brand is more efficient than the other brands. The test results show that the power consumption variability caused by the key components as a group is similar to all other components as a group. However, some differences were observed. The Supermicro server used 27 percent more power at idle compared to the other brands. The Intel server had a power supply control feature called cold redundancy, and the data suggest that cold redundancy can provide energy savings at low power levels. Test and evaluation methods that might be used by others having limited resources for IT equipment evaluation are explained in the report.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗

Heterogeneous high throughput scientific computing with APM X-Gene and Intel Xeon Phi

Electrical power requirements will be a constraint on the future growth of Distributed High Throughput Computing (DHTC) as used by High Energy Physics. Performance-per-watt is a critical metric for the evaluation of computer architectures for cost- efficient computing. Additionally, future performance growth will come from heterogeneous, many-core, and high computing density platforms with specialized processors. In this paper, we examine the Intel Xeon Phi Many Integrated Cores (MIC) co-processor and Applied Micro X-Gene ARMv8 64-bit low-power server system-on-a-chip (SoC) solutions for scientific computing applications. As a result, we report our experience on software porting, performance and energy efficiency and evaluate the potential for use of such technologies in the context of distributed computing systems such as the Worldwide LHC Computing Grid (WLCG).

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗

GPU-Centric Communication on NVIDIA GPU Clusters with InfiniBand: A Case Study with OpenSHMEM

GPUs have become an essential component for building compute clusters with high compute density and high performance per watt. As such clusters scale to have 1000s of GPUs, efficiently moving data between the GPUs becomes imperative to get maximum performance. NVSHMEM is an implementation of the OpenSHMEM standard for NVIDIA GPU clusters which allows communication to be issued from inside GPU kernels. In earlier work, we have shown how NVSHMEM can be used to achieve better application performance on GPUs connected through PCIe or NVLink. As part of this effort, we implement IB verbs for Mellanox InfiniBand adapters in CUDA. We evaluate different design alternatives, taking into consideration the relaxed memory model, automatic memory access coalescing and thread hierarchy on the GPU. We also consider correctness issues that arise in these designs. We take advantage of these designs transparently or through API extensions in NVSHMEM. With micro-benchmarks, we show that a Nvidia Pascal P100 GPU is able saturate the network bandwidth using only one or two of its 56 available streaming multiprocessors (SM). On a single GPU using a single IB EDR adapter, we achieve a throughput of around 90 million messages per second. In addition, we implement a 2dstencil application kernel using NVSHMEM and compare its performance with a CUDA-aware MPI-based implementation that uses GPUDirect RDMA. Speedups in the range of 23% to 42% are seen for input sizes large enough to fill the occupancy of Nvidia Pascal P100 GPUs on 2 to 4 nodes indicating that there are gains to be had by eliminating the CPU from the communication path when all computation runs on the GPU.

Potluri, Sreeram↗

Future computing platforms for science in a power constrained era

Power consumption will be a key constraint on the future growth of Distributed High Throughput Computing (DHTC) as used by High Energy Physics (HEP). This makes performance-per-watt a crucial metric for selecting cost-efficient computing solutions. For this paper, we have done a wide survey of current and emerging architectures becoming available on the market including x86-64 variants, ARMv7 32-bit, ARMv8 64-bit, Many-Core and GPU solutions, as well as newer System-on-Chip (SoC) solutions. We compare performance and energy efficiency using an evolving set of standardized HEP-related benchmarks and power measurement techniques we have been developing. In conclusion, we evaluate the potential for use of such computing solutions in the context of DHTC systems, such as the Worldwide LHC Computing Grid (WLCG).

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗

A Step towards Energy Efficient Computing: Redesigning a Hydrodynamic Application on CPU-GPU, In: 2014 IEEE 28th International Parallel and Distributed Processing Symposium

Power and energy consumption are becoming an increasing concern in high performance computing. Compared to multi-core CPUs, GPUs have a much better performance per watt. In this paper we discuss efforts to redesign the most computation intensive parts of BLAST, an application that solves the equations for compressible hydrodynamics with high order finite elements, using GPUs BLAST, Dobrev. In order to exploit the hardware parallelism of GPUs and achieve high performance, we implemented custom linear algebra kernels. We intensively optimized our CUDA kernels by exploiting the memory hierarchy, which exceed the vendor's library routines substantially in performance. We proposed an auto tuning technique to adapt our CUDA kernels to the orders of the finite element method. Compared to a previous base implementation, our redesign and optimization lowered the energy consumption of the GPU in two aspects: 60% less time to solution and 10% less power required. Compared to the CPU-only solution, our GPU accelerated BLAST obtained a 2.5× overall speedup and 1.42× energy efficiency (green up) using 4th order (Q_4) finite elements, and a 1.9× speedup and 1.27× green up using 2nd order (Q2) finite elements.

Computer Science↗

Evaluating LULESH Kernels on OpenCL FPGA

FPGAs are becoming promising heterogeneous computing components for high-performance computing. In this paper, we evaluate the resource utilizations, performance, and performance per watt of our implementations of the LULESH kernels in OpenCL on an Arria10-based FPGA platform. LULESH is a complex proxy application in the CORAL benchmark suite. We choose two representative kernels “CalcFBHourglassForceForElems” and “EvalEOSForElems” from the application in our study. Compared with the baseline implementations, our optimizations improve the performance by a factor of 1.65X and 2.96X for the two kernels on the FPGA, respectively. Using directives for accelerator programming, we also evaluate the performance of the kernels on an Intel Xeon 16-core CPU and an Nvidia K80 GPU. We find that the FPGA, constrained by the memory bandwidth, can perform 1.05X to 3.4X better than the CPU and GPU for small problem sizes. For the first kernel, the performance per watt on the FPGA is 1.59X and 7.1X higher than that on an Intel Xeon 16-core CPU and an Nvidia K80 GPU, respectively. For the second kernel, the performance per watt on the GPU is 1.82X higher than that on the FPGA. However, the performance per watt on the FPGA is 1.77X higher than that on the CPU.

FPGA↗

Towards Sustainable Post-Exascale Leadership Computing

As computing systems approach the limits of traditional silicon technology, the diminishing returns in performance per watt present a significant barrier to sustaining growth in HPC. From a large-scale scientific supercomputing facility point of view, we propose a multifaceted strategy toward specialized hardware and architectures that are optimized for energy efficiency in specific applications. We also emphasize the need for integrating energy-aware practices across all levels of HPC, from system design and software development to operational policies. We discuss strategic opportunities such as the adoption of application-specific accelerators, the development of energy-efficient algorithms, and the implementation of data-driven operational analytics. Our goal is to develop a comprehensive roadmap ensuring that future leadership systems at OLCF can meet scientific demands while operating within stringent energy budgets, thereby supporting sustainable computing growth.

Shin, Woong↗

The ocean model for E3SM global applications: Omega version 0.1.0 – a new high-performance computing code for exascale architectures

This paper introduces Omega, the Ocean Model for E3SM Global Applications. Omega is a new ocean model designed to run efficiently on high performance computing (HPC) platforms, including exascale heterogeneous architectures with accelerators, such as Graphics Processing Units (GPUs). Omega is written in C and uses the Kokkos performance portability library. These were chosen because they are well-supported and will help future-proof Omega for upcoming HPC architectures. Omega will eventually replace the Model for Prediction Across Scales-Ocean (MPAS-Ocean) in the US Department of Energy's (DOE's) Energy Exascale Earth System Model (E3SM). Omega runs on unstructured horizontal meshes with variable-resolution capability and implements the same horizontal discretization as MPAS-Ocean. This work documents the design and performance of Omega Version 0.1.0 (Omega-V0), which solves the shallow water equations with passive tracers and is the first step towards the full primitive equation ocean model. On Central Processing Units (CPUs), Omega-V0 is 1.4 times faster than MPAS-Ocean with the same configuration. Omega-V0 is more efficient on GPUs than CPUs on a per-watt basis – by a factor of 5.3 on Frontier and 3.6 on Aurora, two of the world's fastest exascale computers.

54 ENVIRONMENTAL SCIENCES↗

Performance Evaluation of Vertical Federated Machine Learning Against Adversarial Threats on Wide-Area Control System: Preprint

Federated machine learning (FL) is gaining significant popularity to develop cybersecurity solutions in power grids because of its advanced capability to support decentralized data handing at local devices, its privacy preservation, and its low-bandwidth requirement. However, the evolving adversarial machine learning (AML) threats raise significant concerns for the cybersecurity of FL architectures. The FL-based split neural network (SplitNN) achieves high performance through the decentralized training of local neural network models while preserving data privacy across multiple entities. In this paper, we propose a methodology for evaluating the performance of a vertical FLbased anomaly detector against different types of AML attacks, including denial-of-service attacks, adversarial data injection attacks, and replay attacks on the trained local models deployed in the grid network. For a case study, we consider the modified IEEE 13-bus system, and we develop SplitNN-based binary and multiclass classification models to detect, locate, and identify different types of data integrity attacks on the volt-watt control with two pooling layers: maximum pooling and AvgPool. Our experimental results, computed through performance metrics, reveal that the severity of these AML attacks varies with the integrated pooling mechanism, the type of classification model, and the nature of the cyberattack. Further, the AML attacks negatively impacted the prediction time per sample for the pretrained SplitNN during the online testing.

adversarial threats↗

Wind Spires as an Alternative Energy Source

This report discloses the design and development of an innovative wind tower system having an axisymmetric wind deflecting structure with a plurality of symmetrically mounted rooftop size wind turbines near the axisymmetric structure. The purpose of the wind deflecting structure is to increase the ambient wind speed that in turn results in an overall increase in the power capacity of the wind turbines. Two working prototypes were constructed and installed in the summer of 2009 and 2012 respectively. The system installed in the Summer of 2009 has a cylindrical wind deflecting structure, while the tower installed in 2012 has a spiral-shape wind deflecting structure. Each tower has 4 turbines, each rated at 1.65 KW Name-Plate-Rating. Before fabricating the full-size prototypes, computational fluid dynamic (CFD) analyses and scaled-down table-top models were used to predict the performance of the full-scale models. The performance results obtained from the full-size prototypes validated the results obtained from the computational models and those of the scaled-down models. The second prototype (spiral configuration) showed at a wind speed of 11 miles per hour (4.9 m/s) the power output of the system could reach 1,288 watt, when a typical turbine installation, with no wind deflecting structure, could produce only 200 watt by the same turbines at the same wind speed. At a wind speed of 18 miles per hour (8 m/sec), the spiral prototype produces 6,143 watt, while the power generated by the same turbines would be 1,412 watt in the absence of a wind deflecting structure under the same wind speed. Four US patents were allowed, and are in print, as the results of this project (US 7,540,706, US 7,679,209, US 7,845,904, and US 8,002,516).

17 WIND ENERGY↗

Development of a Hybrid Single/Two-Phase Capillary-Based Micro-Cooler Using Copper Inverse Opals Wick with Silicon 3D Manifold for High-Heat-Flux Cooling Application: Preprint

Previously, two-phase capillary-based cooling from narrow (200-1,000 micrometer) heater-bridge copper inverse opal (CIO) wicks with heat flux levels exceeding 1,400 watts per square cm with a low superheat of approximately 10 degrees C was demonstrated. Here, we demonstrate the area scaling of the proposed technology to large-area micro-cooler for the high-heat-flux cooling of microprocessors and power electronics. We developed a hybrid single/two-phase micro-cooler that relies on capillary wicking in 25-micrometer-thick CIOs with an open channel silicon 3D-manifold for liquid delivery and vapor extraction, to achieve a high heat flux of approximately 400 watts per square cm over a heated area of 1 square cm. For the range of inlet water (21 degrees C water temperature) flowrates from 5 to 60 mL per min, we achieved total thermal resistances and vapor qualities of 0.68-0.2 square cm Kelvin per watt and 0.55-0.12, respectively. The high heat flux levels are achieved with flowrates that are 10 times smaller than conventional single- or two-phase microchannel cooling technology. The corresponding two-phase thermal resistances are in the range of 0.05 to 0.02 square cm Kelvin per watt with temperature superheat of 8 to 6 degrees C. While the overall performance of the large-area (10 by 10 square millimeter) capillary-based micro-cooler degraded compared to previous demonstration of the technology for a heated area of 5 by 5 square millimeter, preliminary computational fluid dynamics (CFD) modeling indicates that an improved manifold design will be able to achieve comparable performance.

capillary flow↗

Cooling Matters: Benchmarking Large Language Models and Vision-Language Models on Liquid-Cooled Versus Air-Cooled H100 GPU Systems

The unprecedented growth in artificial intelligence (AI) workloads, recently dominated by large language models (LLMs) and vision-language models (VLMs), has intensified power and cooling demands in data centers. This study benchmarks LLMs and VLMs on two HGX nodes, each with 8× NVIDIA H100 graphics processing units (GPUs), using liquid and air cooling. Leveraging GPU Burn, Weights & Biases, and IPMItool, we collect detailed thermal, power, and computation data. Results show that the liquid-cooled systems maintain GPU temperatures between 41-50$^\circ$C, while the air-cooled counterparts fluctuate between 54-72$^\circ$C under load. This thermal stability of liquid-cooled systems yields 17% higher performance (54 TFLOPs/ GPU vs. 46 TFLOPs/GPU), performance-per-watt, reduced energy overhead, and greater system efficiency than the air-cooled counterparts. These findings underscore the energy and sustainability benefits of liquid cooling, offering a compelling path forward for hyperscale data centers seeking to optimize AI infrastructure. https://github.com/iscaas/Cooling-Matters.

Latif, Imran↗

Prototyping and Development of Commercial Nanocrystalline and Thin Film Silicon for Photovoltaic Manufacturing

The College of Nanoscale Science and Engineering (CNSE) at the University at Albany received funding from the Department of Energy for its proposal Prototyping and Development of Commercial Nanocrystalline and Thin Film Si for Photovoltaic Manufacturing. This project was created to identify growth rate, texture uniformity, process window, economics, composition and thickness uniformity solutions related to fabricating large area, high efficiency thin film silicon based solar cells. This document serves as a final report for the closure of this program and details the deliverables from CNSE against its original scope of work. Thin-film silicon solar cells are a promising candidate for electricity generation applications because of a combination of advantages. Nanocrystalline and poly-Si based thin films, reduces the use of expensive semiconductor material content, can be deposited onto a foreign substrate (e.g. glass or flexible stainless steel) and enables use of the cells in wide variety of applications. In addition, nano and poly-Si films have higher carrier mobility as well as reduce recombination effects, relative to traditional amorphous-silicon films. They can be mass-produced at low cost, and expected to have a strong position in the international photovoltaic industry, which is experiencing a compounded annual growth of 25%. The objectives included: Demonstration of high rate VHF (Very High Frequency) growth of nc-Si over large areas with uniform thickness. Demonstration of single chamber device growth that allows mass production processing. Demonstration of uniform segmented electrodes. Development of computer models to accelerate efforts. Demonstration of large grain thin film polycrystalline silicon films fabrication. Utilizing the AIC (Aluminum Induced Crystallization) process for large grain silicon film fabrication. Demonstration of 12% efficient nanocrystalline and polycrystalline thin film devices. The end result expected was the production of high-efficiency, low-cost thin film Si devices with reduced cost per watt, allowing dramatically increased market penetration. While further research is required to meet these ultimate goals, this project proved its feasibility.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Pulse profile modelling of thermonuclear burst oscillations – II. Handling variability

ABSTRACT Pulse profile modelling is a relativistic ray-tracing technique that can be used to infer masses, radii, and geometric parameters of neutron stars. In a previous study, we looked at the performance of this technique when applied to thermonuclear burst oscillations from accreting neutron stars. That study showed that ignoring the variability associated with burst oscillation sources resulted in significant biases in the inferred mass and radius, particularly for the high count rates that are nominally required to obtain meaningful constraints. In this follow-on study, we show that the bias can be mitigated by slicing the bursts into shorter segments where variability can be neglected, and jointly fitting the segments. Using this approach, the systematic uncertainties on the mass and radius are brought within the range of the statistical uncertainty. With about 106 source counts, this yields uncertainties of approximately 10 per cent for both the mass and radius. However, this modelling strategy requires substantial computational resources. We also confirm that the posterior distributions of the mass and radius obtained from multiple bursts of the same source can be merged to produce outcomes comparable to that of a single burst with an equivalent total number of counts.

Astronomy & Astrophysics↗

Hestia-SWIFL: hourly anthropogenic fossil fuel CO2 and heat on the 2km WRF grid, version 1.1

The Hestia-SWIFL version 1.1 anthropogenic heat (AH) and fossil fuel CO2 (FFCO2) emissions data product represent emissions due to the combustion of fossil fuel and cement production within the state of Arizona from 2019 to 2022. This product was developed as part of the Southwest Urban Corridor Integrated Field Laboratory (SW-IFL) project, which aims to provide new knowledge and tools that address extreme heat, air quality, climate change and related urban environmental issues by integrating high-resolution observations, modeling, and civic engagement. The emissions are generated using a bottom-up/engineering approach and are tied to results generated by the Vulcan Project version 4, an effort to quantify space/time-resolved FFCO2 & AH emissions for the entire United States landscape. A large number of data sources are combined to best estimate the emissions at fine scales such as air quality emissions data, traffic flow data, building information, sociodemographic information, and fuel statistics. The AH product provides emissions for two emissions sources (transportation and point source emissions) in units of Watts per hour per square meter (W/m2) per year (annual files) or per hour (hourly files). The FFCO2 product provides emissions from nine individual emission sectors as well as the total, and in units of tons of carbon (tC) per grid cell per year or per hour. The output made available here places the native spatial resolution of the Hestia FFCO2 & AH emissions data product (points, lines, and polygons) into a regularized 2km x 2km grid at hourly and annual temporal resolutions, and stored in netCDF files. The exact spatial extent is defined by the ASU Weather Research Forecast (WRF) simulation grid. All data are processed using R/Python pm high-performance computing system. 2-27-2026 updates: Bugs in airport hourly profile (both AH and FFCO2) and building spatial patterns (FFCO2 only) were fixed. Hourly emissions are reprocessed for all years to reflect those changes.

54 ENVIRONMENTAL SCIENCES↗

Evaluating and Optimizing OpenCL Base64 Data Unpacking Kernel with FPGA

Development of applications using OpenCL targeting FPGAs is an emerging approach on heterogeneous computing systems. This paper uses the data unpacking algorithm in Base64 encoding as a case study to present programming and optimization techniques, and experimental results of the OpenCL-based implementations on an FPGA. We explain the algorithm and evaluate the performance of the kernel implementations with Intel's FPGA OpenCL SDK. The experimental results show kernel vectorization and duplication are two optimization techniques that can improve the kernel performance. The performance of kernel duplication is also closely related to the local work size. Our experiment shows 16-lane vectorization increases the bandwidth by a factor of 2 to 10 for large input data sizes. Moreover, the performance of kernel duplication using 16 compute units is 40% to 1.5% less than that of kernel vectorization depending on the input size. Tuning the local work size can improve the kernel performance by a factor of 3 to 23. For this kernel, using local memory is not an effective technique to improve the kernel performance because input data is not reused. A combination of vectorization and duplication achieves the highest performance of 12.3 GiB/s. Compared to an Intel Xeon E5 CPU and an Nvidia Tesla K80 GPU, the performance of the kernel on the Arria 10 FPGA is 6.7X faster than the CPU and 3X slower than the GPU. The performance per watt on the FPGA is 20.5X higher than the CPU and 1.19X lower than the GPU.

Base64 Encoding↗

Extreme-bandwidth scalable performance-per-watt GPU architecture

A technique for accessing memory in an accelerated processing device coupled to stacked memory dies is provided herein. The technique includes receiving a memory access request from an execution unit and identifying whether the memory access request corresponds to memory cells of the stacked dies that are considered local to the execution unit or non-local. For local accesses, the access is made “directly”, that is, without using a bus. A control die coordinates operations for such local accesses, activating particular through-silicon-vias associated with the memory cells that include the data for the access. Non-local accesses are made via a distributed cache fabric and an interconnect bus in the control die. Various other features and details are provided below.

97 MATHEMATICS AND COMPUTING↗