Investigation into the combination of complementary MOS and complementary bipolar circuits on a monolithic silicon chip Final report
Combination of complementary MOS and complementary bipolar circuits on monolithic silicon chip
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Combination of complementary MOS and complementary bipolar circuits on monolithic silicon chip
An onboard navigation system which employed complementary filtering was developed to provide velocity and position information. The inputs to the mix filter included both acceleration inputs, which provided high-frequency position and velocity information, and radar position inputs, which provided the low-frequency position and velocity information. Onboard aircraft instrumentation, including attitude reference gyros and body-mounted accelerometers, was used to provide the acceleration information. An in-flight comparison of signal quality and accuracy showed good agreement between the complementary filtering system and an aided inertial navigation system. Furthermore, the complementary filtering system was proven to be satisfactory in control and display system applications for both automatic and pilot-in-the-loop instrument approaches and landings.
The binary phase complementary code set has been used in stratospheric radar sounding. The quasi-complementary code technique presented here has nearly complementary properties and offers significant reduction of side lobes caused by imperfections in the radar transmitter. The new technique and its application are described; a simulation of the performance of the two techniques when certain imperfections are present in the transmitter is presented. The results are compared with the actual performance of the Arecibo 430-MHz radar transmitter.
The results are presented of a program to demonstrate the processes for fabricating complementary MISFET beam-leaded circuits, which, potentially, are comparable in quality to available bipolar beam-lead chips that use silicon nitride passivation in conjunction with a platinum-titanium-gold metal system. Materials and techniques, different from the bipolar case, were used in order to be more compatible with the special requirements of fully passivated complementary MISFET devices. Two types of circuits were designed and fabricated, a D-flip-flop and a three-input NOR/NAND gate. Fifty beam-leaded chips of each type were constructed. A quality and reliability assurance program was performed to identify failure mechanisms. Sample tests and inspections (including destructive) were developed to measure the physical characteristics of the circuits.
Description of a new approach to micropower integrated circuits that is called complementary transistor-transistor logic (CTTL). This logic combines the inherent low standby power of a complementary inverter with the high speed of the TTL-type input. Results of monolithic fabricated circuits are presented. These circuits are shown to be equally adaptable to hybrid and discrete circuitry.
The purpose of the extended life testing evaluation of complementary MOS integrated circuits was twofold: (1) To ascertain the long life capability of complementary MOS devices. (2) To assess the objectivity and reliability of various accelerated life test methods as an indication or prediction tool. In addition, the determination of a suitable life test sequence for these devices was of importance. Conclusions reached based on the parts tested and the test results obtained was that the devices were not acceptable.
A set of code sequences is a complementary code sequence set if the sum of the aperiodic autocorrelation functions for the sequences is zero everywhere except at the origin. A simple construction for sets of complementary code sequences is discussed.
We report the first fabrication of active semiconductor and high-temperature superconducting devices on the same substrate. Test structures of complementary MOS transistors were fabricated on the same sapphire substrate as test structures of Y1Ba2Cu3O(7-delta) flux-flow transistors, and separately, Y1Ba2Cu3O(7-delta) superconducting quantum interference devices utilizing both biepitaxial and step-edge Josephson junctions. Both semiconductor and superconductor devices were operated at 77 K. The cofabrication of devices using these disparate yet complementary electronic technologies on the same substrate opens the door for the fabrication of true semiconductive/superconductive hybrid integrated circuits capable of exploiting the best features of each of these technologies.
The complementary barrier infrared detector (CBIRD) is designed to eliminate the major dark current sources in the superlattice infrared detector. The concept can also be applied to bulk semiconductor- based infrared detectors. CBIRD uses two different types of specially designed barriers: an electron barrier that blocks electrons but not holes, and a hole barrier that blocks holes but not electrons. The CBIRD structure consists of an n-contact, a hole barrier, an absorber, an electron barrier, and a p-contact. The barriers are placed at the contact-absorber junctions where, in a conventional p-i-n detector structure, there normally are depletion regions that produce generation-recombination (GR) dark currents due to Shockley-Read- Hall (SRH) processes. The wider-bandgap complementary barriers suppress G-R dark current. The barriers also block diffusion dark currents generated in the diffusion wings in the neutral regions. In addition, the wider gap barriers serve to reduce tunneling dark currents. In the case of a superlattice-based absorber, the superlattice itself can be designed to suppress dark currents due to Auger processes. At the same time, the barriers actually help to enhance the collection of photo-generated carriers by deflecting the photo-carriers that are diffusing in the wrong direction (i.e., away from collectors) and redirecting them toward the collecting contacts. The contact layers are made from materials with narrower bandgaps than the barriers. This allows good ohmic contacts to be made, resulting in lower contact resistances. Previously, THALES Research and Technology (France) demonstrated detectors with bulk InAsSb (specifically InAs0.91Sb0.09) absorber lattice-matched to GaSb substrates. The absorber is surrounded by two wider bandgap layers designed to minimize impedance to photocurrent flow. The wide bandgap materials also serve as contacts. The cutoff wavelength of the InAsSb absorber is fixed. CBIRD may be considered as a modified version of the THALES double heterostructure (DH) p-i-n device, but with even wider bandgap barriers inserted at the contact layer/absorber layer interfaces. It is designed to work with either bulk semiconductors or superlattices as the absorber material. The superlattice bandgap can be adjusted to match the desired absorption cutoff wavelength. This infrared detector has the potential of high-sensitivity operation at higher operating temperatures. This would reduce cooling requirements, thereby reducing the power, mass, and volume of the equipment and allowing an increased mission science return.
It is possible to synthesize a voltage-controlled negative-differential-resistance (NDR) device or circuit by use of a pair of complementary G4FETs (four-gate field-effect transistors). [For more information about G4FETs, please see the immediately preceding article]. As shown in Figure 1, the present voltage-controlled NDR device or circuit is an updated version of a prior NDR device or circuit, known as a lambda diode, that contains a pair of complementary junction field-effect transistors (JFETs). (The lambda diode is so named because its current-versus- voltage plot bears some resemblance to an upper-case lambda.) The present version can be derived from the prior version by substituting G4FETs for the JFETs and connecting both JFET gates of each G4FET together. The front gate terminals of the G4FETs constitute additional terminals (that is, terminals not available in the older JFET version) to which one can apply control voltages VN and VP. Circuits in which NDR devices have been used include (1) Schmitt triggers and (2) oscillators containing inductance/ capacitance (LC) resonant circuits. Figure 2 depicts such circuits containing G4FET NDR devices like that of Figure 1. In the Schmitt trigger shown here, the G4FET NDR is loaded with an ordinary inversion-mode, p-channel, metal oxide/semiconductor field-effect transistor (inversion-mode PMOSFET), the VN terminal of the G4FET NDR device is used as an input terminal, and the input terminals of the PMOSFET and the G4FET NDR device are connected. VP can be used as an extra control voltage (that is, a control voltage not available in a typical prior Schmitt trigger) for adjusting the pinch-off voltage of the p-channel G4FET and thereby adjusting the trigger-voltage window. In the oscillator, a G4FET NDR device is loaded with a conventional LC tank circuit. As in other LC NDR oscillators, oscillation occurs because the NDR counteracts the resistance in the tank circuit. The advantage of this G4FET-NDR LC oscillator over a conventional LC NDR oscillator is that one can apply a time-varying signal to one of the extra control input terminals (VN or VP) to modulate the conductance of the NDR device and thereby amplitude-modulate the output signal.
Specificity of complementary ribonucleic acid formed by bacillus subtilis infected with bacteriophage sp8
New way of coupling two complementary transistors in flip-flop circuit
Low power consumption of complementary resistor- diode-transistor logic /CRDTL/ circuits
DC to DC HF converter using two synchronized complementary converters to minimize ripple and filtering problems
Complementary system converts subcooled liquid hydrogen or nitrogen to gas. The inherent induction heat losses of an electrical transformer are used in the vaporizing process. Transformer efficiency is improved in the process.
Low power consumption, high reliability and fully integrated silicon monolithic complementary flip- flop circuit
Complementary slot-dipole antenna with hemispherical coverage for use in passive interferometer beacon acquisition system
Nonlinear model of field effect transistor for computer aided transient analysis of complementary metal oxide semiconductor-field effect transistor NAND gate