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On modeling the common mode inductor
The common mode inductor is the corner stone of filter design. One of the most important parameters of performance is leakage inductance. The role of leakage inductance in filter performance and current handling is discussed. It is demonstrated that leakage inductance is, in fact, desirable. Underlying physics of operation for the common mode inductor is reviewed. A model is presented which enables the designer to predict the leakage inductance of the common mode choke.
Amplifier for measuring low-level signals in the presence of high common mode voltage
A high common mode rejection differential amplifier wherein two serially arranged Darlington amplifier stages are employed and any common mode voltage is divided between them by a resistance network. The input to the first Darlington amplifier stage is coupled to a signal input resistor via an amplifier which isolates the input and presents a high impedance across this resistor. The output of the second Darlington stage is transposed in scale via an amplifier stage which has its input a biasing circuit which effects a finite biasing of the two Darlington amplifier stages.
High-Common-Mode-Rejection Differential Amplifier
High-common-mode-rejection differential amplifier amplifies low-level signals in presence of high frequency noise. Amplifier used in power system requiring current monitoring on high side of high-voltage powerline.
Development of a Low-Noise High Common-Mode-Rejection Instrumentation Amplifier
Several previously used instrumentation amplifier circuits were examined to find limitations and possibilities for improvement. One general configuration is analyzed in detail, and methods for improvement are enumerated. An improved amplifier circuit is described and analyzed with respect to common mode rejection and noise. Experimental data are presented showing good agreement between calculated and measured common mode rejection ratio and equivalent noise resistance. The amplifier is shown to be capable of common mode rejection in excess of 140 db for a trimmed circuit at frequencies below 100 Hz and equivalent white noise below 3.0 nv/square root of Hz above 1000 Hz.
Common Mode Conducted Emissions
This presentation provides an overview of common mode conducted emissions (CMCE) measurements on power and signal cables. The presentation focuses on how such measurements directly apply to electromagnetic compatibility at the system level and provides a discussion of different techniques for performing them correctly and accurately.
Common Mode Current Challenges and Opportunities in Electric Powertrain Testing
During the development of novel electric powertrain (EP) components key parameters may be evaluated by test before a fully integrated EMI design is implemented. However, insufficiently mitigated EMI could impact the test equipment and test measurements. This risk is particularly valid with high voltage wide bandgap switching converters which enable high efficiency but can increase the EMI source function producing high levels of common mode (CM) current. Test facility equipment may be susceptible to the CM current from these converters causing test delays or measurement errors. Characterization of the common mode EMI of a powertrain component by analysis and/or measurement and assessment of the test facility EMC design can reduce this risk to yield efficient tests and successful measurements.
Solid State Transformer Architecture and Control Compensation for Common Mode Currents
A high-altitude electromagnetic pulse (HEMP) or similar geomagnetic disturbance (GMD) has the potential to impact the operation of large-scale electric power grids. By introducing low-frequency common-mode (CM) currents, these events can degrade the performance of critical system components, such as large power transformers by introducing CM currents which can lead to magnetic saturation of the transformer core. In this work, a solid-state transformer (SST) is developed to replace susceptible equipment and improve grid resiliency by safely absorbing these CM disturbances. This device will be referred to as a common-mode solid-state transformer (CM-SST). An SST architecture based on a four-legged AC/DC converter is developed. This architecture enables active control of CM signals without disturbing the AC voltages or the real and reactive power delivery capabilities. A system-level model of this architecture is created, and time-domain simulations are performed to evaluate the SST’s performance in response to simulated CM disturbances. A control strategy for mitigating CM current is also investigated. Hamiltonian surface shaping and power flow control (HSSPFC) is used to design a nonlinear controller for the SST’s output inverter. The objectives of the controller are to suppress CM-induced AC current offsets and regulate AC currents to desired setpoints. Nonlinear system analysis is applied to design and validate the controller. Two cases are tested: (a) the proposed four-leg inverter and (b) a standard three-leg inverter. The results show that the proposed controller rapidly mitigates CM disturbances while maintaining high-quality AC current waveforms in the four-leg configuration. Finally, the hardware performance of an SST prototype is evaluated. In particular, the ability of the SST to safely redirect and absorb CM currents is demonstrated, showing how it can protect neighboring conventional transformers in the system. The study confirms that appropriate control laws allow the SST to protect both itself and adjacent transformers during a HEMP or GMD event.
Investigation into the common mode rejection ratio of the physiological signal conditioner circuit
The common mode rejection ratio (CMRR) of the single operational amplifier (op amp) differential amplifier and of the three operational amplifier differential amplifier was investigated. The three op amp differential amplifier circuit is used in the signal conditioner circuit which amplifies signals such as the electromyograph or electrocardiogram. The investigation confirmed via SPICE modeling what has been observed by others in the recent literature that the CMRR for the circuit can be maximized without precision resistor values or precisely matched op amps. This can be done if one resistor in the final stage can be adjusted either by a potentiometer or by laser trimming in the case of hybrid circuit fabrication.
Low-common-mode differential amplifier
Outputs of differential amplifier are excellently matched in phase and amplitude over wide range of frequencies. Common mode feedback loop offsets differences between two signal paths. Possible applications of circuit are in oscilloscopes, integrated circuit logic tester, and other self contained instruments.
Alternative Vector PWM for CSI Common-Mode Voltage Reduction During Voltage-Boost Operation with Low Modulation Index
This paper proposes a new pulse-width modulation (PWM) scheme named alternative vector PWM (AVM) algorithm that reduces the common-mode voltage (vCM) generated by a 3-phase current source inverter (CSI) during operation within a portion of its voltage-boost regime when the CSI’s modulation index is below 1/3–√(=0.5774). Three different active current vector pairs (one conventional pair with adjacent active current vectors and two proposed pairs with non-adjacent active current vectors) are used to reduce vCM based on the CSI’s output voltage conditions. Experimental results confirm significant reductions in major vCM spectral components by up to approx. 85% between the 3rd harmonic of the fundamental frequency and the CSI’s PWM frequency, validating the advantages of the proposed AVM algorithm over the conventional PWM.
Inverse Segmented Motor Drive Using Dual ANPC Inverters for Common-Mode Voltage and Neutral-Point Current Cancellation
This article proposes an inverse segmented motor drive (SgMD) utilizing dual active neutral point clamped (ANPC) inverters. In the proposed configuration, the neutral point current and common-mode (CM) voltage is topologically canceled, achieving zero total neutral point current and CM voltage under ideal conditions. Also, the zero total neutral point current minimizes the neutral point voltage imbalance in ANPC inverters. The mechanisms behind neutral point current and CM voltage cancellation in the proposed inverse SgMD are first introduced. The modifications to the motor windings for implementing the inverse SgMD are explained, showing that a standard motor can be readily adapted for the proposed configuration. A space vector modulation (SVM) scheme tailored for the proposed topology is presented, along with a carrier-based implementation. Simulation results validate that the proposed topology can achieve zero total CM voltage and neutral point current. It is also shown that the proposed inverse SgMD can reduce neutral point voltage fluctuation by about 90% and RMS current stress in the dc-link capacitors by about 43% compared to the conventional SgMD.
In-Package Common-Mode Filter for GaN Power Module with Improved Radiated EMI Performance
This paper discusses the impact of parasitic inductances on the electromagnetic interference (EMI) performance at radiated frequency and provides a new concept for high-frequency wide bandgap (WBG) power module package design with integrated π-type common mode filter (π-CMF). The connection parasitic-inductances of a π-type CMF model are analyzed, and the parasitic inductances from the CMF to the CM noise source and to the heatsink are minimized to improve the CMF's EMI performance in the radiated frequency range. Therefore, placing the π-CMF closer to the power module (i.e. in-package CMF) provides a larger noise attenuation compared to placing it outside the module (i.e. external CMF). To verify the theoretical analysis, a half-bridge GaN power module with an in-package π-CMF is designed, and experiments are conducted by comparing the attenuated noise spectrums of a 70-V/1.75-A hard-switching buck converter built by the designed module with an external CMF and the power-module integrated CMF. According to the experiment results, up to 10 dBμV more attenuation is achieved by the in-package CMF than the external CMF, validating the analytical conclusion.
Reduced Common-Mode Voltage PWM Scheme for Full-SiC Three-Level Uninterruptible Power Supply With Small DC-Link Capacitors
In this article, a pulsewidth modulation (PWM) scheme for three-level full-SiC uninterruptible power supplies is developed to achieve a high power density. Two key passive components are selected for size reduction of the ac-ac stage: common-mode (CM) EMI filter, and dc-link capacitors. To reduce the CM noise, a new vector combination is proposed based on synchronous switching among three-phases. The proposed combinations align CM voltage (CMV) to be a single pulse per switching period. Owing to the simple shape, CMV cancellation between a three-level rectifier and inverter can be maximally utilized. A transition between the three combinations can control the drift of neutral point voltage. An equivalent carrier-based implementation is developed. Second, a simple algorithm to compensate neutral point voltage fluctuation is proposed both for differential mode (DM) and CM output voltage. Low-order harmonics on three-phase currents and an additional high-frequency CM noise by misaligned switching instant can be eliminated. The proposed compensation can be implemented by a simple correction on carrier slopes and injected zero-sequence voltage. The proposed PWM scheme is verified with 20-kW full-SiC UPS switching at 60 kHz with 140 μF dc-link capacitors.
General Monte Carlo reliability simulation code including common mode failures and HARP fault/error-handling
A Monte Carlo Fortran computer program was developed that uses two variance reduction techniques for computing system reliability applicable to solving very large highly reliable fault-tolerant systems. The program is consistent with the hybrid automated reliability predictor (HARP) code which employs behavioral decomposition and complex fault-error handling models. This new capability is called MC-HARP which efficiently solves reliability models with non-constant failures rates (Weibull). Common mode failure modeling is also a specialty.
Hardware Demonstration: Radiated Emissions as a Function of Common Mode Current
This presentation describes the electromagnetic compatibility (EMC) tests performed on the Integrated Science Instrument Module (ISIM), the science payload of the James Webb Space Telescope (JWST), at NASAs Goddard Space Flight Center (GSFC) in August 2015. By its very nature of being an integrated payload, it could be treated as neither a unit level test nor an integrated spacecraft observatory test. Non-standard test criteria are described along with non-standard test methods that had to be developed in order to evaluate them. Results are presented to demonstrate that all test criteria were met in less than the time allocated.