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Implications of Tracey's theorem to asynchronous sequential circuit design

Tracey's Theorem has long been recognized as essential in generating state assignments for asynchronous sequential circuits. This paper shows that Tracey's Theorem also has a significant impact in generating the design equations. Moreover, this theorem is important to the fundamental understanding of asynchronous sequential operation. The results of this work simplify asynchronous logic design. Moreover, detection of safe circuits is made easier.

Gopalakrishnan, S.↗

Partition algebraic design of asynchronous sequential circuits

Tracey's Theorem has long been recognized as essential in generating state assignments for asynchronous sequential circuits. This paper shows that partitioning variables derived from Tracey's Theorem also has a significant impact in generating the design equations. Moreover, this theorem is important to the fundamental understanding of asynchronous sequential operation. The results of this work simplify asynchronous logic design. Moreover, detection of safe circuits is made easier.

Maki, Gary K.↗

Generalized reciprocity theorem for semiconductor devices

A reciprocity theorem is presented that relates the short-circuit current of a device, induced by a carrier generation source, to the minority-carrier Fermi level in the dark. The basic relation is general under low injection. It holds for three-dimensional devices with position dependent parameters (energy gap, electron affinity, mobility, etc.), and for transient or steady-state conditions. This theorem allows calculation of the internal quantum efficiency of a solar cell by using the analysis of the device in the dark. Other applications could involve measurements of various device parameters, interfacial surface recombination velocity at a polcrystalline silicon emitter contact, for rexample, by using steady-state or transient photon or mass-particle radiation.

Misiakos, K.↗

Heavy doping effects in high efficiency silicon solar cells

The use of a (silicon)/(heavily doped polysilicon)/(metal) structure to replace the conventional high-low junction (or back-surface-field, BSF) structure of silicon solar cells was examined. The results of an experimental study designed to explore both qualitatively and quantitatively the mechanism of the improved current gain in bipolar transistors with polysilicon emitter contact are presented. A reciprocity theorem is presented that relates the short circuit current of a device, induced by a carrier generation source, to the minority carrier Fermi level in the dark. A method for accurate measurement of minority-carrier diffusion coefficients in silicon is described.

Lindholm, F. A.↗

Hardware proofs using EHDM and the RSRE verification methodology

Examined is a methodology for hardware verification developed by Royal Signals and Radar Establishment (RSRE) in the context of the SRI International's Enhanced Hierarchical Design Methodology (EHDM) specification/verification system. The methodology utilizes a four-level specification hierarchy with the following levels: functional level, finite automata model, block model, and circuit level. The properties of a level are proved as theorems in the level below it. This methodology is applied to a 6-bit counter problem and is critically examined. The specifications are written in EHDM's specification language, Extended Special, and the proofs are improving both the RSRE methodology and the EHDM system.

Butler, Ricky W.↗

An implicit sampling theorem for bounded bandlimited functions

A rigorous proof of the 'strong bias tone' scheme is embodied in the implicit sampling theorem. The representation of signals that are sample functions of possible nonstationary random processes being of principal interest, the proof could not directly invoke results from classical analysis, which depend on the existence of the Fourier transform of the function under consideration; rather, it is based on Zakai's (1965) theorem on the series expansion of functions, band-limited under a suitably extended definition. A practical circuit that restores an approximate version of the signal from its sine-wave-crossings is presented and possible improvements to it are discussed.

Bar-David, I.↗

Hierarchical Design and Verification for VLSI

The specification and verification work is described in detail, and some of the problems and issues to be resolved in their application to Very Large Scale Integration VLSI systems are examined. The hierarchical design methodologies enable a system architect or design team to decompose a complex design into a formal hierarchy of levels of abstraction. The first step inprogram verification is tree formation. The next step after tree formation is the generation from the trees of the verification conditions themselves. The approach taken here is similar in spirit to the corresponding step in program verification but requires modeling of the semantics of circuit elements rather than program statements. The last step is that of proving the verification conditions using a mechanical theorem-prover.

Shostak, R. E.↗

Formal hardware verification of digital circuits

The use of formal methods to verify the correctness of digital circuits is less constrained by the growing complexity of digital circuits than conventional methods based on exhaustive simulation. This paper briefly outlines three main approaches to formal hardware verification: symbolic simulation, state machine analysis, and theorem-proving.

Joyce, J.↗

Formal semantics for a subset of VHDL and its use in analysis of the FTPP scoreboard circuit

In the first part of the report, we give a detailed description of an operational semantics for a large subset of VHDL, the VHSIC Hardware Description Language. The semantics is written in the functional language Caliban, similar to Haskell, used by the theorem prover Clio. We also describe a translator from VHDL into Caliban semantics and give some examples of its use. In the second part of the report, we describe our experience in using the VHDL semantics to try to verify a large VHDL design. We were not able to complete the verification due to certain complexities of VHDL which we discuss. We propose a VHDL verification method that addresses the problems we encountered but which builds on the operational semantics described in the first part of the report.

Bickford, Mark↗

Transfer Functions Via Laplace- And Fourier-Borel Transforms

Approach to solution of nonlinear ordinary differential equations involves transfer functions based on recently-introduced Laplace-Borel and Fourier-Borel transforms. Main theorem gives transform of response of nonlinear system as Cauchy product of transfer function and transform of input function of system, together with memory effects. Used to determine responses of electrical circuits containing variable inductances or resistances. Also possibility of doing all noncommutative algebra on computers in such symbolic programming languages as Macsyma, Reduce, PL1, or Lisp. Process of solution organized and possibly simplified by algebraic manipulations reducing integrals in solutions to known or tabulated forms.

Can, Sumer↗

Analysis of Stub Loaded Microstrip Patch Antennas

A microstrip patch antenna fed by a coaxial probe and reactively loaded by a open circuited microstrip line has been used previously to produce circular polarization and also as a building block for a series fed microstrip patch array. Rectangular and circular patch antennas loaded with a microstrip stub were previously analyzed using the generalized Thevenin theorem. In the Thevenin theorem approach, the mutual coupling between the patch current and the surface current on the stub was not taken into account. Also, the Thevenin theorem approach neglects continuity of current at the patch-stub junction. The approach in this present paper includes the coupling between the patch and stub currents as well as continuity at the patch-stub junction. The input impedance for a stub loaded microstrip patch is calculated by the general planar dielectric dyadic Green's function approach in the spectral domain, as was initiated much earlier and has been extensively expanded upon and utilized successfully throughout the literature for microstrip antenna configurations. Using the spectral domain dyadic Green s function derived earlier with the electric field integral equation (EFIE), the problem is formulated by using entire domain basis functions to represent the surface current densities on the patch, the loading stub and the attachment mode at the junction. Galerkin's procedure is used to reduce the EFIE to a matrix equation, which is then solved to obtain the amplitudes of the surface currents. These surface currents are then used for calculating the input impedance of stub loaded rectangular and circular microstrip patches. Numerical results are compared with measured results and with previous results calculated by the Thevenin's theorem approach.

Deshpande, M. D.↗

Analysis of Stub Loaded Microstrip Patch Antennas

A microstrip patch antenna fed by a coaxial probe and reactively loaded by a open circuited microstrip line has been used previously to produce circular polarization[ l] and also as a building block for a series fed microstrip patch array [2]. Rectangular and circular patch antennas loaded with a microstrip stub were previously analyzed using the generalized Thevenin theorem [2,3]. In the Thevenin theorem approach, the mutual coupling between the patch current and the surface current on the stub was not taken into account. Also, the Thevenin theorem approach neglects continuity of current at the patch-stub junction. The approach in this present paper includes the coupling between the patch and stub currents as well as continuity at the patch-stub junction.

Bailey, M. C.↗

DRS: Derivational Reasoning System

The high reliability requirements for airborne systems requires fault-tolerant architectures to address failures in the presence of physical faults, and the elimination of design flaws during the specification and validation phase of the design cycle. Although much progress has been made in developing methods to address physical faults, design flaws remain a serious problem. Formal methods provides a mathematical basis for removing design flaws from digital systems. DRS (Derivational Reasoning System) is a formal design tool based on advanced research in mathematical modeling and formal synthesis. The system implements a basic design algebra for synthesizing digital circuit descriptions from high level functional specifications. DRS incorporates an executable specification language, a set of correctness preserving transformations, verification interface, and a logic synthesis interface, making it a powerful tool for realizing hardware from abstract specifications. DRS integrates recent advances in transformational reasoning, automated theorem proving and high-level CAD synthesis systems in order to provide enhanced reliability in designs with reduced time and cost.

Bose, Bhaskar↗

Machine-checked proofs of the design and implementation of a fault-tolerant circuit

A formally verified implementation of the 'oral messages' algorithm of Pease, Shostak, and Lamport is described. An abstract implementation of the algorithm is verified to achieve interactive consistency in the presence of faults. This abstract characterization is then mapped down to a hardware level implementation which inherits the fault-tolerant characteristics of the abstract version. All steps in the proof were checked with the Boyer-Moore theorem prover. A significant results is the demonstration of a fault-tolerant device that is formally specified and whose implementation is proved correct with respect to this specification. A significant simplifying assumption is that the redundant processors behave synchronously. A mechanically checked proof that the oral messages algorithm is 'optimal' in the sense that no algorithm which achieves agreement via similar message passing can tolerate a larger proportion of faulty processor is also described.

Bevier, William R.↗