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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 19 records
All sourcesNASA NTRSDOE OSTI
DOE OSTI2024

Bus repeater and bit injector for MIL-STD-1553/1760 communications bus

A fault insertion device (FID) comprises a transceiver and an FPGA. The transceiver receives signals from a MIL-STD-1553/1760 communications bus. The FPGA evaluates the signals received from the communications bus against a set of rules stored by the FPGA. Based upon the set of rules, the FPGA can selectively modify messages received from the communications bus prior to transmission to a remote terminal or a bus controller that is configured to communicate on the communications bus.

Krein, Jason P.↗
DOE OSTI2026

IEEE 123-Bus System A Matrix

System component matrix for IEEE 123 bus distribution system for dynamic simulations.

Sahu, Vibhuti [Oak Ridge National Laboratory] (ORC↗
DOE OSTI2022

E-transit-bench: simulation platform for analyzing electric public transit bus fleet operations

When electrified transit systems make grid aware choices, improved social welfare is achieved by reducing grid stress, reducing system loss, and minimizing power quality issues. Electrifying transit fleet has numerous challenges like non availability of buses during charging, varying charging costs and so on, that are related the electric grid behavior. However, transit systems do not have access to the information about the co-evolution of the grid's power flow and therefore cannot account for the power grid's needs in its day-to-day operation. In this paper we propose a framework of transportation-grid co-simulation, analyzing the spatio-temporal interaction between the transit operations with electric buses and the power distribution grid. Real-world data for a day's traffic from Chattanooga city's transit system is simulated in SUMO and integrated with a realistic distribution grid simulation (using GridLAB-D) to understand the grid impact due to transit electrification. Charging information is obtained from the transportation simulation to feed into grid simulation to assess the impact of charging. We also discuss the impact to the grid with higher degree of transit electrification that further necessitates such an integrated transportation-grid co-simulation to operate the integrated system optimally. Our future work includes extending the platform for optimizing the charging and trip assignment operations.

Sen, Rishav↗
NASA NTRS2010

High-Speed Ring Bus

The high-speed ring bus at the Jet Propulsion Laboratory (JPL) allows for future growth trends in spacecraft seen with future scientific missions. This innovation constitutes an enhancement of the 1393 bus as documented in the Institute of Electrical and Electronics Engineers (IEEE) 1393-1999 standard for a spaceborne fiber-optic data bus. It allows for high-bandwidth and time synchronization of all nodes on the ring. The JPL ring bus allows for interconnection of active units with autonomous operation and increased fault handling at high bandwidths. It minimizes the flight software interface with an intelligent physical layer design that has few states to manage as well as simplified testability. The design will soon be documented in the AS-1393 standard (Serial Hi-Rel Ring Network for Aerospace Applications). The framework is designed for "Class A" spacecraft operation and provides redundant data paths. It is based on "fault containment regions" and "redundant functional regions (RFR)" and has a method for allocating cables that completely supports the redundancy in spacecraft design, allowing for a complete RFR to fail. This design reduces the mass of the bus by incorporating both the Control Unit and the Data Unit in the same hardware. The standard uses ATM (asynchronous transfer mode) packets, standardized by ITU-T, ANSI, ETSI, and the ATM Forum. The IEEE-1393 standard uses the UNI form of the packet and provides no protection for the data portion of the cell. The JPL design adds optional formatting to this data portion. This design extends fault protection beyond that of the interconnect. This includes adding protection to the data portion that is contained within the Bus Interface Units (BIUs) and by adding to the signal interface between the Data Host and the JPL 1393 Ring Bus. Data transfer on the ring bus does not involve a master or initiator. Following bus protocol, any BIU may transmit data on the ring whenever it has data received from its host. There is no centralized arbitration or bus granting. The JPL design provides for autonomous synchronization of the nodes on the ring bus. An address-synchronous latency adjust buffer (LAB) has been designed that cannot get out of synchronization and needs no external input. Also, a priority-driven cable selection behavior has been programmed into each unit on the ring bus. This makes the bus able to connect itself up, according to a maximum redundancy priority system, without the need for computer intervention at startup. Switching around a failed or switched-off unit is also autonomous. The JPL bus provides a map of all the active units for the host computer to read and use for fault management. With regard to timing, this enhanced bus recognizes coordinated timing on a spacecraft as critical and addresses this with a single source of absolute and relative time, which is broadcast to all units on the bus with synchronization maintained to the tens of nanoseconds. Each BIU consists of up to five programmable triggers, which may be programmed for synchronization of events within the spacecraft of instrument. All JPL-formatted data transmitted on the ring bus are automatically time-stamped.

Wysocky, Terry↗
NASA NTRS2001

Determination of an Optimal Commercial Data Bus Architecture for a Flight Data System

NASA/Marshall Space Flight Center (MSFC) is continually looking for methods to reduce cost and schedule while keeping the quality of work high. MSFC is NASA's lead center for space transportation and microgravity research. When supporting NASA's programs several decisions concerning the avionics system must be made. Usually many trade studies must be conducted to determine the best ways to meet the customer's requirements. When deciding the flight data system, one of the first trade studies normally conducted is the determination of the data bus architecture. The schedule, cost, reliability, and environments are some of the factors that are reviewed in the determination of the data bus architecture. Based on the studies, the data bus architecture could result in a proprietary data bus or a commercial data bus. The cost factor usually removes the proprietary data bus from consideration. The commercial data bus's range from Versa Module Eurocard (VME) to Compact PCI to STD 32 to PC 104. If cost, schedule and size are prime factors, VME is usually not considered. If the prime factors are cost, schedule, and size then Compact PCI, STD 32 and PC104 are the choices for the data bus architecture. MSFC's center director has funded a study from his discretionary fund to determine an optimal low cost commercial data bus architecture. The goal of the study is to functionally and environmentally test Compact PCI, STD 32 and PC 104 data bus architectures. This paper will summarize the results of the data bus architecture study.

Crawford, Kevin↗
DOE OSTI2021

Low inductance bus assembly and power converter apparatus including the same

An apparatus, such as a power converter, includes first, second and third core bus plates arranged in parallel. The apparatus also includes a first bus extension plate joined to the first core bus plate and extending therefrom at a first angle and a second bus extension plate joined to the second core bus plate and extending therefrom at a second angle. The apparatus further includes a third bus extension plated joined with the third core bus plate and disposed parallel to the first bus extension plate and a fourth bus extension plate joined with the third core bus plate and disposed parallel to the second bus extension plate.

Nojima, Geraldo↗
DOE OSTI2024

Low inductance bus assembly and power converter apparatus including the same

An apparatus, such as a power converter, includes first, second and third core bus plates arranged in parallel. The apparatus also includes a first bus extension plate joined to the first core bus plate and extending therefrom at a first angle and a second bus extension plate joined to the second core bus plate and extending therefrom at a second angle. The apparatus further includes a third bus extension plated joined with the third core bus plate and disposed parallel to the first bus extension plate and a fourth bus extension plate joined with the third core bus plate and disposed parallel to the second bus extension plate.

Nojima, Geraldo↗
NASA NTRS1988

DATAC bus monitor

The Digital Autonomous Terminal Access Communications (DATAC) bus is a multiple transmitter data bus developed to interconnect various aircraft systems. A typical DATAC bus installation for the NASA B-737 aircraft is shown. A bus monitor unit was developed for the DATAC data bus. The bus monitor unit consists of two systems: A Zilog Z8002 based S100 bus microcomputer system that connects to a DATAC terminal and receives data appearing on the bus, and an IMB PC-compatible computer used to display and interpret that data. Test results of the existing bus monitor have indicated areas for improvement. The most obvious improvement is to increase the speed of the data transfers between the S100 and the MS-DOS systems.

Novacki, Stanley M., III↗
NASA NTRS1995

A decentralized software bus based on IP multicas ting

We describe decentralized reconfigurable implementation of a conference management system based on the low-level Internet Protocol (IP) multicasting protocol. IP multicasting allows low-cost, world-wide, two-way transmission of data between large numbers of conferencing participants through the Multicasting Backbone (MBone). Each conference is structured as a software bus -- a messaging system that provides a run-time interconnection model that acts as a separate agent (i.e., the bus) for routing, queuing, and delivering messages between distributed programs. Unlike the client-server interconnection model, the software bus model provides a level of indirection that enhances the flexibility and reconfigurability of a distributed system. Current software bus implementations like POLYLITH, however, rely on a centralized bus process and point-to-point protocols (i.e., TCP/IP) to route, queue, and deliver messages. We implement a software bus called the MULTIBUS that relies on a separate process only for routing and uses a reliable IP multicasting protocol for delivery of messages. The use of multicasting means that interconnections are independent of IP machine addresses. This approach allows reconfiguration of bus participants during system execution without notifying other participants of new IP addresses. The use of IP multicasting also permits an economy of scale in the number of participants. We describe the MULITIBUS protocol elements and show how our implementation performs better than centralized bus implementations.

Callahan, John R.↗
NASA NTRS2003

Network Extender for MIL-STD-1553 Bus

An extender system for MIL-STD-1553 buses transparently couples bus components at multiple developer sites. The bus network extender is a relatively inexpensive system that minimizes the time and cost of integration of avionic systems by providing a convenient mechanism for early testing without the need to transport the usual test equipment and personnel to an integration facility. This bus network extender can thus alleviate overloading of the test facility while enabling the detection of interface problems that can occur during the integration of avionic systems. With this bus extender in place, developers can correct and adjust their own hardware and software before products leave a development site. Currently resident at Johnson Space Center, the bus network extender is used to test the functionality of equipment that, although remotely located, is connected through a MILSTD- 1553 bus. Inasmuch as the standard bus protocol for avionic equipment is that of MIL-STD-1553, companies that supply MIL-STD-1553-compliant equipment to government or industry and that need long-distance communication support might benefit from this network bus extender

Marcus, Julius↗
DOE OSTI2022

Distributed Frequency Divider for Power System Bus Frequency Online Estimation Considering Virtual Inertia From DFIGs

In this work, a distributed frequency divider is proposed to estimate power system bus frequency with a limited number of PMUs while considering the inertial contributions from double-fed induction generators (DFIGs). The key idea is to reformulate the original frequency divider by modeling the contributions of DFIGs with inertia emulation and external regional power system through Thevenin equivalents. The distributed frequency divider is general and able to estimate local bus frequencies in a distributed manner. Besides, only the knowledge of the rotor speeds of synchronous generator, boundary bus frequencies and terminal bus frequencies of DFIGs as well as the admittance matrix are required to estimate the frequencies at all buses. This is drastically different from existing approaches that require system observability by PMUs to monitor all bus frequencies. Numerical results carried out on the IEEE 39-bus and modified 118-bus power systems with DFIGs demonstrate and effectiveness and robustness of the proposed method.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2024

A Scalable Approach to Minimize Charging Costs for Electric Bus Fleets

Incorporating battery electric buses into bus fleets faces three primary challenges: a BEB’s extended refuel time, the cost of charging, both by the consumer and the power provider, and large compute demands for planning methods. When BEBs charge, the additional demands on the grid may exceed hardware limitations, so power providers divide a consumer’s energy needs into separate meters even though doing so is expensive for both power providers and consumers. Prior work has developed a number of strategies for computing charge schedules for bus fleets; however, prior work has not worked to reduce costs by aggregating meters. Additionally, because many works use mixed integer linear programs, their compute needs make planning for commercial-sized bus fleets intractable. This work presents a multi-program approach to computing charge plans for electric bus fleets. The proposed method solves a series of subproblems where the solution to the charge problem becomes more refined with each problem, moving closer to the optimal schedule. The results demonstrate how runtimes are reduced by using intermediate subproblems to refine the bus charge solution so that the proposed method can be applied to large bus fleets of 100+ buses. Not only will we demonstrate that runtimes scale linearly with the number of buses but we will also show how the proposed method scales to large bus fleets of over 100 buses while managing the monthly cost of energy.

Mortensen, Daniel (ORCID:0000000276494452)↗
NASA NTRS1982

Test program to develop vibroacoustics test criteria for the Galileo bus

In order to define random vibration test requirements for Galileo bus-mounted hardware, an extensive vibroacoustics test program was conducted on hardware available from the previous Voyager spacecraft development program. The Galileo test program consisted of acoustic tests on three configurations of the Voyager Dynamic Test Model bus and shaker random vibration tests on two flight-like bus equipment bay assemblies and one dummy equipment bay assembly. The primary goal of the acoustic tests was to define vibration levels at locations on the bus structure representative of inputs to bus equipment bay assemblies and to obtain response data on bus bay subassemblies for correlation with the vibration tests response data. The primary purpose of the vibration tests was to determine if the vibration tests excited subassembly responses at least as severely as the bus acoustic tests.

Kern, D. L.↗
NASA NTRS2003

A High Efficiency DC Bus Regulator/RPC for Spacecraft Applications

DC bus voltage regulation may be required in future high powered spacecraft due to the length of the busses or because they are not generated at precise voltage levels. In these cases the regulation range is often only a few percent increase or decrease, but conventional DC voltage regulators switch all the power passing through them, and this level of power switched determines the size and losses in the regulator. A recently developed concept used a low power DC-DC converter in series with the bs to raise or lower the bus voltage over a small range. This partial power processing technique combines the small size and power losses of the low power converter with the ability to regulate, (over a small range) a high power bus. The Series Connected Buck Boost Regulator (SCBBR) described herein provides bus regulation with an efficiency of 98%. The circuit also provides bus switching and overcurrent limiting functions of a Remote Power Controller (RPC). This paper described the circuit design and performance of a breadboard SCBBR configured as a bus voltage regulator providing plus of minus 40% voltage regulation range, bus switching, and overload limiting.

Birchenough, Arthur G.↗
DOE OSTI2023

Time-Dependent Electric Bus and Charging Station Deployment Problem

Battery electric buses (BEBs) have gained popularity due to their emission-free and energy-efficient features. Many transit authorities worldwide have set goals to gradually replace their bus fleets with BEBs. Considering the potential decline in BEB battery and charger prices, this study proposes a time-dependent bus fleet transition model to determine the optimal bus fleet transition plan, which includes selecting the bus lines to be electrified, determining the timing and type of BEBs to be purchased, and deploying on-route fast chargers and depot chargers. The model is a bi-objective integer linear program that considers the trade-off between electrified transit mileages and bus electrification costs. A normalized normal constraint method is applied to solve the bi-objective optimization model. The effectiveness of the proposed model is tested using a real-world bus network. Additionally, sensitivity analyses are conducted to better understand the impact of different parameter values on the optimal solutions. Our proposed model can provide transit authorities with a powerful tool to make informed decisions about their BEB fleet replacement plans.

ADVANCED PROPULSION SYSTEMS↗
NASA NTRS1979

Forecast analysis of optical waveguide bus performance

Elements to be considered in the design of a data bus include: architecture; data rate; modulation, encoding, detection; power distribution requirements; protocol, work structure; bus reliability, maintainability; interterminal transmission medium; cost; and others specific to application. Fiber- optic data bus considerations for a 32 port transmissive star architecture, are discussed in a tutorial format. General optical-waveguide bus concepts, are reviewed. The electrical and optical performance of a 32 port transmissive star bus, and the effects of temperature on the performance of optical-waveguide buses are examined. A bibliography of pertinent references and the bus receiver test results are included.

Ledesma, R.↗