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At least 19 records

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NASA NTRS1984

Investigation of fast initialization of spacecraft bubble memory systems

Bubble domain technology offers significant improvement in reliability and functionality for spacecraft onboard memory applications. In considering potential memory systems organizations, minimization of power in high capacity bubble memory systems necessitates the activation of only the desired portions of the memory. In power strobing arbitrary memory segments, a capability of fast turn on is required. Bubble device architectures, which provide redundant loop coding in the bubble devices, limit the initialization speed. Alternate initialization techniques are investigated to overcome this design limitation. An initialization technique using a small amount of external storage is demonstrated.

Looney, K. T.↗

NASA NTRS1985

Bubble memory module for spacecraft application

Bubble domain technology offers an all-solid-state alternative for data storage in onboard data systems. A versatile modular bubble memory concept was developed. The key module is the bubble memory module which contains all of the storage devices and circuitry for accessing these devices. This report documents the bubble memory module design and preliminary hardware designs aimed at memory module functional demonstration with available commercial bubble devices. The system architecture provides simultaneous operation of bubble devices to attain high data rates. Banks of bubble devices are accessed by a given bubble controller to minimize controller parts. A power strobing technique is discussed which could minimize the average system power dissipation. A fast initialization method using EEPROM (electrically erasable, programmable read-only memory) devices promotes fast access. Noise and crosstalk problems and implementations to minimize these are discussed. Flight memory systems which incorporate the concepts and techniques of this work could now be developed for applications.

Hayes, P. J.↗

NASA NTRS1980

A bubble memory module

A bubble memory module design providing flexibility for many user applications in spacecraft data recording is described. The memory module can be used with user-designed controllers with the memory organization determined by the application. Asynchronous data rates from zero to 1.33 Mbits/sec at minimum power are accomplished by using 8-chip memory cells with 100 K bit serial chips. The memory module is expandable from a 4 x 2 cell matrix to a 4 x 16 cell matrix corresponding to an expandable capacity of 6.55 M to 52.4 M bits. The module's design, utility in various memory systems, and user clocking scheme are described.

Hayes, P. J.↗

NASA NTRS1993

Three-Dimensional Magnetic-Bubble Memory System

Proposed magnetic-bubble memory system includes stack of two-dimensional memory modules. Design enables overall storage density of system to be greater than prior magnetic-bubble memories. Provides nonvolatile storage, with readout access times in millisecond range. Has partly parallel input/output configuration supporting high-performance computing. Also relatively invulnerable to damage by ionizing radiation. Binary data, as represented by direction of magnetization of magnetic bubbles, reads out via Faraday effect.

Katti, Romney R.↗

NASA NTRS1978

Test and evaluation of bubble memories

A description is presented of a test program which has shown that well-constructed bubble memories can operate reliably over long periods of time and at low error rates. Even the relatively high error rate of one memory during burn-in can be considered acceptable if compared with tape recorder standards. No wear-out mechanism or aging could be detected. Bubble memories are now considered suitable for long-duration space missions and certainly are suitable for many military and commercial applications. It must be recognized, however, that bubble memories are complex devices and not yet fully understood. While the particular memory tested may never find practical applications, it nevertheless has provided insight into performance characteristics considered typical of bubble memories.

Bahm, E.↗

NASA NTRS1985

Self-structured, current aperture approach for bubble memory

An approach to magnetic bubble memory which incorporates dual conductor current access drive with a self-structured (strongly interacting) bubble lattice is described. This is expected to provide higher operating speeds, defect tolerance, and higher bit density for a given bubble size as compared to present field access bubble devices. Bubble spacings of 2.5 bubble diameters are projected for a prototype device. Experimental work on device components including detectors, major/minor loops, and gates is described. Defect tolerance has also been demonstrated.

Nelson, G. L.↗

NASA NTRS1986

Fast Initialization of Bubble-Memory Systems

Improved scheme several orders of magnitude faster than normal initialization scheme. State-of-the-art commercial bubble-memory device used. Hardware interface designed connects controlling microprocessor to bubblememory circuitry. System software written to exercise various functions of bubble-memory system in comparison made between normal and fast techniques. Future implementations of approach utilize E2PROM (electrically-erasable programable read-only memory) to provide greater system flexibility. Fastinitialization technique applicable to all bubble-memory devices.

Looney, K. T.↗

NASA NTRS1979

Implementing a bubble memory hierarchy system

This paper reports on implementation of a magnetic bubble memory in a two-level hierarchial system. The hierarchy used a major-minor loop device and RAM under microprocessor control. Dynamic memory addressing, dual bus primary memory, and hardware data modification detection are incorporated in the system to minimize access time. It is the objective of the system to incorporate the advantages of bipolar memory with that of bubble domain memory to provide a smart, optimal memory system which is easy to interface and independent of user's system.

Segura, R.↗

NASA NTRS1973

Fabrication of magnetic bubble memory overlay

Self-contained magnetic bubble memory overlay is fabricated by process that employs epitaxial deposition to form multi-layered complex of magnetically active components on single chip. Overlay fabrication comprises three metal deposition steps followed by subtractive etch.

Source record↗

NASA NTRS1979

Multilayer self-structured bubble memories

Research work on multilayer self-structured bubble memories is at an early stage. The coupling of bubbles to stripes is investigated theoretically and experimentally and shown to be adequate for propagation. Propagation of stripes is demonstrated both by current access and field access techniques. These propagation techniques are of prime interest because they can eliminate most photographic features from the storage area. Multilayer films offer great promise for higher-capacity higher-density memories in which most of the photolithography has been eliminated and the minimum feature size of much of the remaining has been increased. Furthermore, stripe propagation can be carried out with current access, providing a significant reduction in packaging cost and power consumption over field access devices.

Kamin, M.↗

NASA NTRS1980

An 8 x 10 to the 5th bit bubble memory cell for spacecraft applications

A multiple chip magnetic bubble memory cell design developed for NASA embodies the low power, low weight, environmental tolerance and reliability necessary for successful operation in spacecraft launch and mission environments. Packaging of multiple chips in a common magnetic bias, drive coil assembly reduces weight and volume overhead per chip and also reduces the number of coil drive components required. This 8 x 10 to the 5th bit cell is conduction cooled and provides a metal and ceramic sealed hermetic chip environment.

Becker, F. J.↗

NASA NTRS1977

The utilization of bubble memories in defense systems

The paper considers two examples of bubble memory application: the NASA solid state data recorder for spacecraft, and the POS/8 800,000 bit recorder. A matrix chart of applications delineated by capacity and chip organization, which is primarily reflected in access time, is then presented.

Mavity, W. C.↗

NASA NTRS1977

Bias-field equalizer for bubble memories

Magnetoresistive Perm-alloy sensor monitors bias field required to maintain bubble memory. Sensor provides error signal that, in turn, corrects magnitude of bias field. Error signal from sensor can be used to control magnitude of bias field in either auxiliary set of bias-field coils around permanent magnet field, or current in small coils used to remagnetize permanent magnet by infrequent, short, high-current pulse or short sequence of pulses.

Keefe, G. E.↗

NASA NTRS1994

Three-dimensional magnetic bubble memory system

A compact memory uses magnetic bubble technology for providing data storage. A three-dimensional arrangement, in the form of stacks of magnetic bubble layers, is used to achieve high volumetric storage density. Output tracks are used within each layer to allow data to be accessed uniquely and unambiguously. Storage can be achieved using either current access or field access magnetic bubble technology. Optical sensing via the Faraday effect is used to detect data. Optical sensing facilitates the accessing of data from within the three-dimensional package and lends itself to parallel operation for supporting high data rates and vector and parallel processing.

Stadler, Henry L.↗

NASA NTRS1973

Modeling of a bubble-memory organization with self-checking translators to achieve high reliability.

Study of the design and modeling of a highly reliable bubble-memory system that has the capabilities of: (1) correcting a single 16-adjacent bit-group error resulting from failures in a single basic storage module (BSM), and (2) detecting with a probability greater than 0.99 any double errors resulting from failures in BSM's. The results of the study justify the design philosophy adopted of employing memory data encoding and a translator to correct single group errors and detect double group errors to enhance the overall system reliability.

Bouricius, W. G.↗

NASA NTRS1985

Advanced detectors and signal processing for bubble memories

The feasibility of combining silicon and magnetic bubble technologies is demonstrated. Results of bubble film annealing indicate that a low temperature silicon on garnet technology is the most likely one to succeed commercially. Annealing ambients are also shown to have a major effect on the magnetic properties of bubble films. Functional MOSFETs were fabricated on bubble films coated with thick (approximately 1 micron) SiO2 layers. The two main problems with these silicon on garnet MOSFETs are low electron mobilities and large gate leakage currents. Results indicate that the laser recrystallized silicon and gate oxide (SiO2) layers are contaminated. The data suggest that part of the contaminating ions originate in the sputtered oxide spacer layer and part originates in the bubble film itself. A diffusion barrier, such as silicon nitride, placed between the bubble film and the silicon layer should eliminate the contamination induced problem.

Kryder, M. H.↗

NASA NTRS1975

A 1-1/2-level on-chip-decoding bubble memory chip design

Design includes multi-channel replicator which can reduce chip-writing requirement, selective annihilating switch which can effectively annihilate bubbles with minimum delay, and modified transfer switch which can be used as selective steering-type decoder.

Chen, T. T.↗

NASA NTRS1987

Self-Stabilizing Storage Loops for Magnetic-Bubble Memories

Adjacent, sinusoidal loops provide defect-tolerant, self-stabilizing structures. New technology consists of three components providing self-stabilizing structures. First, apertures positioned so bubbles propagate alternately into hexagonally related positions and directly opposed positions; addition of straight barriers by ion milling or implantation of garnet adds transverse stability but leaves longitudinally metastable postions. Second, modification of barrier to sinusoidal shape provides "energy wells" in longitudinal direction at opposed positions and eliminates metastability. Third, positioning and phasing of counterrotating storage loops, provide stable hexagonal support between adjacent loops.

Nelson, Gary L.↗