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At least 19 records
All sourcesNASA NTRSDOE OSTI
NASA NTRS2014

Enabling More than Moore: Accelerated Reliability Testing and Risk Analysis for Advanced Electronics Packaging

For five decades, the semiconductor industry has distinguished itself by the rapid pace of improvement in miniaturization of electronics products-Moore's Law. Now, scaling hits a brick wall, a paradigm shift. The industry roadmaps recognized the scaling limitation and project that packaging technologies will meet further miniaturization needs or ak.a "More than Moore". This paper presents packaging technology trends and accelerated reliability testing methods currently being practiced. Then, it presents industry status on key advanced electronic packages, factors affecting accelerated solder joint reliability of area array packages, and IPC/JEDEC/Mil specifications for characterizations of assemblies under accelerated thermal and mechanical loading. Finally, it presents an examples demonstrating how Accelerated Testing and Analysis have been effectively employed in the development of complex spacecraft thereby reducing risk. Quantitative assessments necessarily involve the mathematics of probability and statistics. In addition, accelerated tests need to be designed which consider the desired risk posture and schedule for particular project. Such assessments relieve risks without imposing additional costs. and constraints that are not value added for a particular mission. Furthermore, in the course of development of complex systems, variances and defects will inevitably present themselves and require a decision concerning their disposition, necessitating quantitative assessments. In summary, this paper presents a comprehensive view point, from technology to systems, including the benefits and impact of accelerated testing in offsetting risk.

Ghaffarian, Reza↗
NASA NTRS2011

Integrated Arrays on Silicon at Terahertz Frequencies

In this paper we explore various receiver font-end and antenna architecture for use in integrated arrays at terahertz frequencies. Development of wafer-level integrated terahertz receiver front-end by using advanced semiconductor fabrication technologies and use of novel integrated antennas with silicon micromachining are reported. We report novel stacking of micromachined silicon wafers which allows for the 3-dimensional integration of various terahertz receiver components in extremely small packages which easily leads to the development of 2- dimensioanl multi-pixel receiver front-ends in the terahertz frequency range. We also report an integrated micro-lens antenna that goes with the silicon micro-machined front-end. The micro-lens antenna is fed by a waveguide that excites a silicon lens antenna through a leaky-wave or electromagnetic band gap (EBG) resonant cavity. We utilized advanced semiconductor nanofabrication techniques to design, fabricate, and demonstrate a super-compact, low-mass submillimeter-wave heterodyne frontend. When the micro-lens antenna is integrated with the receiver front-end we will be able to assemble integrated heterodyne array receivers for various applications such as multi-pixel high resolution spectrometer and imaging radar at terahertz frequencies.

silicon micromaching↗
NASA NTRS2001

Electronics for Low-Temperature Space Operation Being Evaluated

Electronic components and systems capable of low-temperature operation are needed for many future NASA missions where it is desirable to have smaller, lighter, and cheaper (unheated) spacecraft. These missions include Mars (-20 to -120 C) orbiters, landers, and rovers; Europa (-150 C) oceanic exploratory probes and instrumentation; Saturn (-183 C) and Pluto (-229 C) interplanetary probes. At the present, most electronic equipment can operate down to only -55 C. It would be very desirable to have electronic components that expand the operating temperature range down to -233 C. The successful development of these low-temperature components will eventually allow space probes and onboard electronics to operate in very cold environments (out as far as the planet Pluto). As a result, radioisotope heating units, which are used presently to keep space electronics near room temperature, will be reduced in number or eliminated. The new cold electronics will make spacecraft design and operation simpler, more flexible, more reliable, lighter, and cheaper. Researchers at the NASA Glenn Research Center are evaluating potential commercial off-the- shelf devices and are developing new electronic components that will tolerate operation at low temperatures down to -233 C. This work is being carried out mainly inhouse and also through university grants and commercial contracts. The components include analog-to-digital converters, semiconductor switches, capacitors, dielectric and packaging material, and batteries. For example, the effect of low temperature on the capacitance of three different types of capacitors is shown in the graph. Using these advanced components, system products will be developed, including dc/dc converters, battery charge/discharge management systems, digital control electronics, transducers, and sensor instrumentation.

Patterson, Richard L.↗
NASA NTRS2011

Terahertz Array Receivers with Integrated Antennas

Highly sensitive terahertz heterodyne receivers have been mostly single-pixel. However, now there is a real need of multi-pixel array receivers at these frequencies driven by the science and instrument requirements. In this paper we explore various receiver font-end and antenna architectures for use in multi-pixel integrated arrays at terahertz frequencies. Development of wafer-level integrated terahertz receiver front-end by using advanced semiconductor fabrication technologies has progressed very well over the past few years. Novel stacking of micro-machined silicon wafers which allows for the 3-dimensional integration of various terahertz receiver components in extremely small packages has made it possible to design multi-pixel heterodyne arrays. One of the critical technologies to achieve fully integrated system is the antenna arrays compatible with the receiver array architecture. In this paper we explore different receiver and antenna architectures for multi-pixel heterodyne and direct detector arrays for various applications such as multi-pixel high resolution spectrometer and imaging radar at terahertz frequencies.

direct detector arrays↗
NASA NTRS2003

Advanced Packaging Technology Used in Fabricating a High-Temperature Silicon Carbide Pressure Sensor

The development of new aircraft engines requires the measurement of pressures in hot areas such as the combustor and the final stages of the compressor. The needs of the aircraft engine industry are not fully met by commercially available high-temperature pressure sensors, which are fabricated using silicon. Kulite Semiconductor Products and the NASA Glenn Research Center have been working together to develop silicon carbide (SiC) pressure sensors for use at high temperatures. At temperatures above 850 F, silicon begins to lose its nearly ideal elastic properties, so the output of a silicon pressure sensor will drift. SiC, however, maintains its nearly ideal mechanical properties to extremely high temperatures. Given a suitable sensor material, a key to the development of a practical high-temperature pressure sensor is the package. A SiC pressure sensor capable of operating at 930 F was fabricated using a newly developed package. The durability of this sensor was demonstrated in an on-engine test. The SiC pressure sensor uses a SiC diaphragm, which is fabricated using deep reactive ion etching. SiC strain gauges on the surface of the diaphragm sense the pressure difference across the diaphragm. Conventionally, the SiC chip is mounted to the package with the strain gauges outward, which exposes the sensitive metal contacts on the chip to the hostile measurement environment. In the new Kulite leadless package, the SiC chip is flipped over so that the metal contacts are protected from oxidation by a hermetic seal around the perimeter of the chip. In the leadless package, a conductive glass provides the electrical connection between the pins of the package and the chip, which eliminates the fragile gold wires used previously. The durability of the leadless SiC pressure sensor was demonstrated when two 930 F sensors were tested in the combustor of a Pratt & Whitney PW4000 series engine. Since the gas temperatures in these locations reach 1200 to 1300 F, the sensors were installed in water-cooled jackets, as shown. This was a severe test because the pressure-sensing chips were exposed to the hot combustion gases. Prior to the installation of the SiC pressure sensors, two high-temperature silicon sensors, installed in the same locations, did not survive a single engine run. The durability of the leadless SiC pressure sensor was demonstrated when both SiC sensors operated properly throughout the two runs that were conducted.

Beheim, Glenn M.↗
NASA NTRS1988

Power components for the space station 20-kHz power distribution system

Since 1984, NASA Lewis Research Center was developing high power, high frequency space power components as part of The Space Station Advanced Development program. The purpose of The Advanced Development program was to accelerate existing component programs to ensure their availability for use on the Space Station. These components include a rotary power transfer device, remote power controllers, remote bus isolators, high power semiconductor, a high power semiconductor package, high frequency-high power cable, high frequency-high power connectors, and high frequency-high power transformers. All the components were developed to the prototype level and will be installed in the Lewis Research Center Space Station power system test bed.

Renz, David D.↗
NASA NTRS1988

Power components for the Space Station 20-kHz power distribution system

Since 1984, NASA Lewis Research Center was developing high power, high frequency space power components as part of The Space Station Advanced Development program. The purpose of the Advanced Development program was to accelerate existing component programs to ensure their availability for use on the Space Station. These components include a rotary power transfer device, remote power controllers, remote bus isolators, high power semiconductor, a high power semiconductor package, high frequency-high power cable, high frequency-high power connectors, and high frequency-high power transformers. All the components were developed to the prototype level and will be installed in the Lewis Research Center Space Station power system test bed.

Renz, David D.↗
NASA NTRS1999

Nano-Satellite Avionics

Abstract NASA's Goddard Space Flight Center (GSFC) is currently developing a new class of satellites called the nano-satellite (nano-sat). A major objective of this development effort is to provide the technology required to enable a constellation of tens to hundreds of nano-satellites to make both remote and in-situ measurements from space. The Nano-sat will be a spacecraft weighing a maximum of 10 kg, including the propellant mass, and producing at least 5 Watts of power to operate the spacecraft. The electronics are required to survive a total radiation dose rate of 100 krads for a mission lifetime of two years. There are many unique challenges that must be met in order to develop the avionics for such a spacecraft. The first challenge is to develop an architecture that will operate on the allotted 5 Watts and meet the diverging requirements of multiple missions. This architecture will need to incorporate a multitude of new advanced microelectronic technologies. The microelectronics developed must be a modular and scalable packaging of technology to solve the problem of developing a solution to both reduce cost and meet the requirements of various missions. This development will utilize the most cost effective approach, whether infusing commercially driven semiconductor devices into spacecraft applications or partnering with industry to design and develop low cost, low power, low mass, and high capacity data processing devices. This paper will discuss the nano-sat architecture and the major technologies that will be developed. The major technologies that will be covered include: (1) Light weight Low Power Electronics Packaging, (2) Radiation Hard/Tolerant, Low Power Processing Platforms, (3) High capacity Low Power Memory Systems (4) Radiation Hard reconfiguragble field programmable gate array (rFPGA)

Culver, Harry↗
NASA NTRS2014

Advanced CMOS Radiation Effects Testing and Analysis

Presentation at the annual NASA Electronic Parts and Packaging (NEPP) Program Electronic Technology Workshop (ETW). The material includes an update of progress in this NEPP task area over the past year, which includes testing, evaluation, and analysis of radiation effects data on the IBM 32 nm silicon-on-insulator (SOI) complementary metal oxide semiconductor (CMOS) process. The testing was conducted using test vehicles supplied by directly by IBM.

cmos↗
NASA NTRS2010

Spinoff 2010

Topics covered include: Burnishing Techniques Strengthen Hip Implants; Signal Processing Methods Monitor Cranial Pressure; Ultraviolet-Blocking Lenses Protect, Enhance Vision; Hyperspectral Systems Increase Imaging Capabilities; Programs Model the Future of Air Traffic Management; Tail Rotor Airfoils Stabilize Helicopters, Reduce Noise; Personal Aircraft Point to the Future of Transportation; Ducted Fan Designs Lead to Potential New Vehicles; Winglets Save Billions of Dollars in Fuel Costs; Sensor Systems Collect Critical Aerodynamics Data; Coatings Extend Life of Engines and Infrastructure; Radiometers Optimize Local Weather Prediction; Energy-Efficient Systems Eliminate Icing Danger for UAVs; Rocket-Powered Parachutes Rescue Entire Planes; Technologies Advance UAVs for Science, Military; Inflatable Antennas Support Emergency Communication; Smart Sensors Assess Structural Health; Hand-Held Devices Detect Explosives and Chemical Agents; Terahertz Tools Advance Imaging for Security, Industry; LED Systems Target Plant Growth; Aerogels Insulate Against Extreme Temperatures; Image Sensors Enhance Camera Technologies; Lightweight Material Patches Allow for Quick Repairs; Nanomaterials Transform Hairstyling Tools; Do-It-Yourself Additives Recharge Auto Air Conditioning; Systems Analyze Water Quality in Real Time; Compact Radiometers Expand Climate Knowledge; Energy Servers Deliver Clean, Affordable Power; Solutions Remediate Contaminated Groundwater; Bacteria Provide Cleanup of Oil Spills, Wastewater; Reflective Coatings Protect People and Animals; Innovative Techniques Simplify Vibration Analysis; Modeling Tools Predict Flow in Fluid Dynamics; Verification Tools Secure Online Shopping, Banking; Toolsets Maintain Health of Complex Systems; Framework Resources Multiply Computing Power; Tools Automate Spacecraft Testing, Operation; GPS Software Packages Deliver Positioning Solutions; Solid-State Recorders Enhance Scientific Data Collection; Computer Models Simulate Fine Particle Dispersion; Composite Sandwich Technologies Lighten Components; Cameras Reveal Elements in the Short Wave Infrared; Deformable Mirrors Correct Optical Distortions; Stitching Techniques Advance Optics Manufacturing; Compact, Robust Chips Integrate Optical Functions; Fuel Cell Stations Automate Processes, Catalyst Testing; Onboard Systems Record Unique Videos of Space Missions; Space Research Results Purify Semiconductor Materials; and Toolkits Control Motion of Complex Robotics.

Source record↗
NASA NTRS2018

Operational Testing of 4H-SiC JFET ICs for 60 Days Directly Exposed to Venus Surface Atmospheric Conditions

Prolonged Venus surface missions (lasting months instead of hours) have proven infeasible to date in the absence of a complete suite of electronics able to function for such durations without protection from the planet’s extreme conditions of ~460 °C, ~9.3 MPa (~ 92 Earth atmospheres) chemically reactive environment. Here we report testing data from a successful two-month (60-day) operational demonstration of two 175-transistor 4H-SiC junction field effect transistor (JFET) semiconductor integrated circuits (ICs) directly exposed (no cooling and no protective chip packaging) to a high-fidelity physical and chemical reproduction of Venus surface atmospheric conditions in a test chamber. These results extend the longest reported duration of electronics operation in Venus surface atmospheric conditions almost 3-fold and were accomplished using prototype SiC JFET chips of more than 7-fold increased complexity. The demonstrated advancement marks a significant step towards realization of electronics with sufficient complexity and durability for implementing robotic landers capable of returning months of scientific data from the surface of Venus.

Integrated Circuit↗
NASA NTRS2005

Long-duration Operation of 2-micron Coherent Doppler Lidar in Space

The reliability and lifetime of laser remote sensing systems that can operate autonomously over a sufficiently long period are mainly constrained by the laser diode arrays (LDAs) used for pumping their laser transmitters. The lifetime of a 2-micron coherent lidar operating in space is particularly of concern in lieu of required pump pulse duration of Thulium and Holmium solid state lasers (approx. 1msec) that are considerably longer than those of more widely used 1-micron lasers (< 0.2 msec). A factor of 5 to 10 times longer pulse duration can easily translate to over an order of magnitude shorter lifetime for a typical commercially available high-power 2-D array. Therefore, it is imperative to address the lifetime and reliability of LDAs for pumping 2-micron lasers by exploring all the potential options that significantly prolong their life meeting the required operational lifetime of space-based coherent Doppler lidars. The leading causes of sudden failure and premature degradation of LDAs are intrinsic semiconductor defects, optical facet breakdown resulting from excessive localized heating, and thermo-mechanical stresses due to the extreme thermal cycling of the laser active regions1-2. Long pulse operation grossly amplifies the impact of these failure/degradation causes, particularly the thermo-mechanical stresses due to pulse-to-pulse thermal cycling. Therefore, several experimental setups have been developed to investigate each of the failure mechanisms and causes of premature degradation in order to evaluate various package designs, define the best operating parameters, and to guide the technology advancement, leading to highly reliable and very long lifetime LDAs5. Several areas of improvement in the packaging and fabrication process of laser diodes have already been identified and efforts towards implementing these improvements are well underway. These efforts include the use of advanced high thermal conductivity materials for packaging of laser diode arrays and new fabrication techniques for mechanically attaching laser diode bars and submounts. But even using the existing LDAs, it may be possible to increase the lifetime by careful selection of the package type, number of bars per package and their pitch, operational temperature, and operating parameters such repetition rate, pulsewidth, and applied current. Obviously, the LDA specification and operational parameters will involve a system level trade analysis to ensure that the lidar instrument meets its performance objectives. One goal of this work is to enable such trade analysis by evaluating LDAs from different suppliers in different package types and quantifying their performance as a function of their operational parameters.

Amzajerdian, Farzin↗
NASA NTRS1990

Materials for high-density electronic packaging and interconnection

Electronic packaging and interconnections are the elements that today limit the ultimate performance of advanced electronic systems. Materials in use today and those becoming available are critically examined to ascertain what actions are needed for U.S. industry to compete favorably in the world market for advanced electronics. Materials and processes are discussed in terms of the final properties achievable and systems design compatibility. Weak points in the domestic industrial capability, including technical, industrial philosophy, and political, are identified. Recommendations are presented for actions that could help U.S. industry regain its former leadership position in advanced semiconductor systems production.

Source record↗
NASA NTRS2004

Advanced Electrical Materials and Components Being Developed

All aerospace systems require power management and distribution (PMAD) between the energy and power source and the loads. The PMAD subsystem can be broadly described as the conditioning and control of unregulated power from the energy source and its transmission to a power bus for distribution to the intended loads. All power and control circuits for PMAD require electrical components for switching, energy storage, voltage-to-current transformation, filtering, regulation, protection, and isolation. Advanced electrical materials and component development technology is a key technology to increasing the power density, efficiency, reliability, and operating temperature of the PMAD. The primary means to develop advanced electrical components is to develop new and/or significantly improved electronic materials for capacitors, magnetic components, and semiconductor switches and diodes. The next important step is to develop the processing techniques to fabricate electrical and electronic components that exceed the specifications of presently available state-of-the-art components. The NASA Glenn Research Center's advanced electrical materials and component development technology task is focused on the following three areas: 1) New and/or improved dielectric materials for the development of power capacitors with increased capacitance volumetric efficiency, energy density, and operating temperature; 2) New and/or improved high-frequency, high-temperature soft magnetic materials for the development of transformers and inductors with increased power density, energy density, electrical efficiency, and operating temperature; 3) Packaged high-temperature, high-power density, high-voltage, and low-loss SiC diodes and switches.

Schwarze, Gene E.↗
NASA NTRS2012

Radiation-Hard SpaceWire/Gigabit Ethernet-Compatible Transponder

A radiation-hard transponder was developed utilizing submicron/nanotechnology from IBM. The device consumes low power and has a low fabrication cost. This device utilizes a Plug-and-Play concept, and can be integrated into intra-satellite networks, supporting SpaceWire and Gigabit Ethernet I/O. A space-qualified, 100-pin package also was developed, allowing space-qualified (class K) transponders to be delivered within a six-month time frame. The novel, optical, radiation-tolerant transponder was implemented as a standalone board, containing the transponder ASIC (application specific integrated circuit) and optical module, with an FPGA (field-programmable gate array) friendly parallel interface. It features improved radiation tolerance; high-data-rate, low-power consumption; and advanced functionality. The transponder utilizes a patented current mode logic library of radiation-hardened-by-architecture cells. The transponder was developed, fabricated, and radhard tested up to 1 MRad. It was fabricated using 90-nm CMOS (complementary metal oxide semiconductor) 9 SF process from IBM, and incorporates full BIT circuitry, allowing a loop back test. The low-speed parallel LVCMOS (lowvoltage complementary metal oxide semiconductor) bus is compatible with Actel FPGA. The output LVDS (low-voltage differential signaling) interface operates up to 1.5 Gb/s. Built-in CDR (clock-data recovery) circuitry provides robust synchronization and incorporates two alarm signals such as synch loss and signal loss. The ultra-linear peak detector scheme allows on-line control of the amplitude of the input signal. Power consumption is less than 300 mW. The developed transponder with a 1.25 Gb/s serial data rate incorporates a 10-to-1 serializer with an internal clock multiplication unit and a 10-1 deserializer with internal clock and data recovery block, which can operate with 8B10B encoded signals. Three loop-back test modes are provided to facilitate the built-in-test functionality. The design is based on a proprietary library of differential current switching logic cells implemented in the standard 90-nm CMOS 9SF technology from IBM. The proprietary low-power LVDS physical interface is fully compatible with the SpaceWire standard, and can be directly connected to the SFP MSA (small form factor pluggable Multiple Source Agreement) optical transponder. The low-speed parallel interfaces are fully compatible with the standard 1.8 V CMOS input/output devices. The utilized proprietary annular CMOS layout structures provide TID tolerance above 1.2 MRad. The complete chip consumes less than 150 mW of power from a single 1.8-V positive supply source.

Katzman, Vladimir↗
NASA NTRS2005

X-Band, 17-Watt Solid-State Power Amplifier

An advanced solid-state power amplifier that can generate an output power of as much as 17 W at a design operating frequency of 8.4 GHz has been designed and constructed as a smaller, lighter, less expensive alternative to traveling-wave-tube X-band amplifiers and to prior solid-state X-band power amplifiers of equivalent output power. This amplifier comprises a monolithic microwave integrated circuit (MMIC) amplifier module and a power-converter module integrated into a compact package (see Figure 1). The amplifier module contains an input variable-gain amplifier (VGA), an intermediate driver stage, a final power stage, and input and output power monitors (see Figure 2). The VGA and the driver amplifier are 0.5-m GaAs-based metal semiconductor field-effect transistors (MESFETs). The final power stage contains four parallel high-efficiency, GaAs-based pseudomorphic high-electron-mobility transistors (PHEMTs). The gain of the VGA is voltage-variable over a range of 10 to 24 dB. To provide for temperature compensation of the overall amplifier gain, the gain-control voltage is generated by an operational-amplifier circuit that includes a resistor/thermistor temperature-sensing network. The driver amplifier provides a gain of 14 dB to an output power of 27 dBm to drive the four parallel output PHEMTs, each of which is nominally capable of putting out as much as 5 W. The driver output is sent to the input terminals of the four parallel PHEMTs through microstrip power dividers; the outputs of these PHEMTs are combined by microstrip power combiners (which are similar to the microstrip power dividers) to obtain the final output power of 17 W.

Mittskus, Anthony↗
NASA NTRS2011

Rad-Hard, Miniaturized, Scalable, High-Voltage Switching Module for Power Applications Rad-Hard, Miniaturized

A paper discusses the successful development of a miniaturized radiation hardened high-voltage switching module operating at 2.5 kV suitable for space application. The high-voltage architecture was designed, fabricated, and tested using a commercial process that uses a unique combination of 0.25 micrometer CMOS (complementary metal oxide semiconductor) transistors and high-voltage lateral DMOS (diffusion metal oxide semiconductor) device with high breakdown voltage (greater than 650 V). The high-voltage requirements are achieved by stacking a number of DMOS devices within one module, while two modules can be placed in series to achieve higher voltages. Besides the high-voltage requirements, a second generation prototype is currently being developed to provide improved switching capabilities (rise time and fall time for full range of target voltages and currents), the ability to scale the output voltage to a desired value with good accuracy (few percent) up to 10 kV, to cover a wide range of high-voltage applications. In addition, to ensure miniaturization, long life, and high reliability, the assemblies will require intensive high-voltage electrostatic modeling (optimized E-field distribution throughout the module) to complete the proposed packaging approach and test the applicability of using advanced materials in a space-like environment (temperature and pressure) to help prevent potential arcing and corona due to high field regions. Finally, a single-event effect evaluation would have to be performed and single-event mitigation methods implemented at the design and system level or developed to ensure complete radiation hardness of the module.

Adell, Philippe C.↗
NASA NTRS2008

First On-Wafer Power Characterization of MMIC Amplifiers at Sub-Millimeter Wave Frequencies

Recent developments in semiconductor technology have enabled advanced submillimeter wave (300 GHz) transistors and circuits. These new high speed components have required new test methods to be developed for characterizing performance, and to provide data for device modeling to improve designs. Current efforts in progressing high frequency testing have resulted in on-wafer-parameter measurements up to approximately 340 GHz and swept frequency vector network analyzer waveguide measurements to 508 GHz. On-wafer noise figure measurements in the 270-340 GHz band have been demonstrated. In this letter we report on on-wafer power measurements at 330 GHz of a three stage amplifier that resulted in a maximum measured output power of 1.78mW and maximum gain of 7.1 dB. The method utilized demonstrates the extension of traditional power measurement techniques to submillimeter wave frequencies, and is suitable for automated testing without packaging for production screening of submillimeter wave circuits.

monolithic microwave integrated circircuit↗