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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 19 records
All sourcesNASA NTRSDOE OSTI
DOE OSTI2021

Extraction of intrinsic contact resistance in organic thin-film transistors with single channel length and high capacitance density

Accurate characterization of the intrinsic contact resistance is important for the optimization of organic thin-film transistors (OTFTs), especially in devices with high gate capacitance density. This study reports on a method for the extraction of the intrinsic, or gate-voltage independent, contact resistance from OTFTs. In contrast to the transfer length method (TLM), this method can be applied to devices with a single geometry. The method is an extension of the previously reported Y-function method and combines the model proposed by S. Luan et al. to analyze the effect of the gate voltage on the contact resistance. Here, this method is first applied to OTFTs with a bottom-gate top-contact geometry having varying gate capacitance density values. The intrinsic contact resistance is found to decrease with increased gate capacitance density with values ranging between 4 kΩcm and under 1 kΩcm when the gate capacitance is changed from 36.6 nF/cm 2 to 231.7 nF/cm 2 , respectively. These values are in good agreement with those obtained using TLM experiments. The new method is also shown to be applicable to OTFTs with top-gate bottom contact geometry.

36 MATERIALS SCIENCE↗
DOE OSTI2021

Negative Capacitance MgZnO-Channel Thin-Film Transistor With Ferroelectric NiMgZnO in the Gate Stack

We demonstrate the negative capacitance thin-film transistor (NC-TFT) on glass substrate using the multifunctional MgZnO (MZO). The Mg 0.03 Zn 0.97 O semiconductor layer acts as the TFT channel for stable operation while the Ni-doped MZO, i.e. Ni 0.02 Mg 0.15 Zn 0.83 O (NMZO) serves as the ferroelectric layer in the NMZO/SiO 2 stacking gate dielectric structure. The subthreshold swing (SS) value is significantly reduced over the reference TFT without ferroelectric layer. The minimum SS value of the NC-TFT reaches 52 mV/dec while the on/off ratio of drain current ID reaches 10 9 .

77 NANOSCIENCE AND NANOTECHNOLOGY↗
DOE OSTI2021

Polyferrocenylsilane Semicrystalline Polymer Additive for Solution-Processed p-Channel Organic Thin Film Transistors

In this study, we demonstrated for the first time that a metal-containing semicrystalline polymer was used as an additive to mediate the thin film morphology of solution-grown, small-molecule organic semiconductors. By mixing polyferrocenylsilane (PFS) with an extensively-studied organic semiconductor 6,13-bis(triisopropylsilylethynyl) pentacene (TIPS pentacene), PFS as a semicrystalline polymer independently forms nucleation and crystallization while simultaneously ameliorating diffusivity of the blend system and tuning the surface energies as a result of its partially amorphous property. We discovered that the resultant blend film exhibited a 6-fold reduction in crystal misorientation angle and a 3-fold enlargement in average grain width. Enhanced crystal orientation considerably reduces mobility variation, while minimized defects and trap centers located at grain boundaries lessen the adverse impact on the charge transport. Consequently, bottom-gate, top-contact organic thin film transistors (OTFTs) based on the TIPS pentacene/PFS mixture yielded a 40% increase in performance consistency (represented by the ratio of average mobility to the standard deviation of mobility). The PFS semicrystalline polymer-controlled crystallization can be used to regulate the thin film morphology of other high-performance organic semiconductors and shed light on applications in organic electronic devices.

36 MATERIALS SCIENCE↗
DOE OSTI2023

Mitigating Heavy Ion Irradiation‐Induced Degradation in p‐type SnO Thin‐Film Transistors at Room Temperature

The study investigates the mitigation of radiation damage on p‐type SnO thin‐film transistors (TFTs) with a fast, room‐temperature annealing process. Atomic layer deposition is utilized to fabricate bottom‐gate TFTs of high‐quality p‐type SnO layers. After 2.8 MeV Au 4+ irradiation at a fluence level of 5.2 × 10 12 ions cm −2 , the output drain current and on/off current ratio ( I on / I off ) decrease by more than one order of magnitude, field‐effect mobility ( μ FE ) reduces more than four times, and subthreshold swing (SS) increases more than four times along with a negative shift in threshold voltage. The observed degradation is attributed to increased surface roughness and defect density, as confirmed by scanning electron microscopy (SEM), high‐resolution micro‐Raman, and transmission electron microscopy (TEM) with geometric phase analysis (GPA). A technique is demonstrated to recover the device performance at room temperature and in less than a minute, using the electron wind force (EWF) obtained from low‐duty‐cycle high‐density pulsed current. At a pulsed current density of 4.0 × 10 5 A cm −2 , approximately four times increase in I on / I off is observed, 41% increase in μ FE , and 20% decrease in the SS of the irradiated TFTs, suggesting effectiveness of the new annealing technique.

Al-Mamun, Nahid Sultan↗
DOE OSTI2020

Organic thin-film transistors with a bottom bilayer gate dielectric having a low operating voltage and high operational stability

This study reports on p-channel bottom-gate organic thin-film transistors (OTFT) that achieve low-voltage operation with a thin bilayer gate dielectric of CYTOP/HfO 2 that also leads to high operational stability. A bottom-gate geometry allows the thickness of the gate dielectric to be reduced to 17 nm, thereby increasing the gate dielectric capacitance density to a value of up to 258 nF/cm 2 . All OTFTs yielded threshold voltages (V TH ) lower than -1 V, thereby providing minimum operating voltage (gate to source voltage ~ V TH ) of -1 V with field-effect mobility values in the range from 0.3 to 0.8 cm 2 /Vs and subthreshold swing values below 100 mV/dec. Operational stability during DC bias stress was found similar to that measured in devices with a top-gate geometry, with about 1% of drain current change after 6 h. Here, using a double-stretched exponential function, the operational stability characteristics were modeled. It was found that by increasing the metal oxide layer thickness, the threshold voltage can shift toward positive values under DC stress tests. For CYTOP layer thicknesses above 15 nm, a thicker CYTOP layer was found to shift the threshold voltage in the opposite direction toward negative values. Furthermore, these p-channel bottom-gate organic transistor with a bilayer gate dielectric of CYTOP/HfO 2 combine high mobility, high operational stability, and lower voltage operation of -1 V compared to top-gate OTFTs.

36 MATERIALS SCIENCE↗
DOE OSTI2022

MgZnO High‐Voltage Transparent Thin‐Film Transistors Built on Glass

Recently, there has been increasing interest in building‐integrated photovoltaic (BIPV), which enables harvesting solar energy effectively. Large‐area glass components such as windows are widely used in modern constructions. In addition to the PV on opaque components such as walls and roofs, the transparent photovoltaic (TPV) directly built on glass is complementary to fully utilize the PV energy in BIPV. A high‐voltage transparent thin‐film transistor (HVTTFT) built on glass is an ideal option for distributed microinverters for TPV modules. A wide‐bandgap oxide‐based HVTTFT on glass for this purpose is reported. The HVTTFT on glass uses ZnO‐based materials with different functions for two roles: a semiconductor Mg 0.01 Zn 0.99 O (MZO) as TFT channel and Al‐doped ZnO (AZO) as transparent conductive oxide (TCO) electrodes. The centrosymmetric circular structure of the MZO HVTTFT with a high‐k‐stacking gate dielectric enables a blocking voltage as high as ≈1 kV and an on/off ratio of 10 6 . The device exhibits an average optical transmittance of 81% over the visible spectrum.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗
DOE OSTI2023

Visualization of Mesoscopic Conductivity Fluctuations in Amorphous Semiconductor Thin-Film Transistors

Charge transport in amorphous semiconductors is considerably more complicated than the process in crystalline materials due to abundant localized states. In addition to device-scale characterization, spatially resolved measurements are important to unveiling electronic properties. Here, we report gigahertz conductivity mapping in amorphous indium gallium zinc oxide (a-IGZO) thin-film transistors by microwave impedance microscopy (MIM), which probes conductivity without Schottky barrier’s influence. The difference between the dc and microwave conductivities reflects the efficacy of the injection barrier in an accumulation-mode transistor. The conductivity exhibits significant nanoscale inhomogeneity in the subthreshold regime, presumably due to trapping and release from localized states. The characteristic length scale of local fluctuations, as determined by the autocorrelation analysis, is about 200 nm. Using a random-barrier model, we can simulate the spatial variation of the potential landscape, which underlies the mesoscopic conductivity distribution. Furthermore, our work provides an intuitive way to understand the charge transport mechanism in amorphous semiconductors at the microscopic level.

36 MATERIALS SCIENCE↗
DOE OSTI2022

Low-temperature processed beta-phase In 2 Se 3 ferroelectric semiconductor thin film transistors

As scaling becomes increasingly difficult, there is growing interest in vertical or three-dimensional stacking of transistors and especially memory. Ferroelectric semiconductor field effect transistors can be key enablers to improve energy efficiency and overall chip and memory performance. In this work, low-temperature processed, back-end-of-the-line compatible transistors were demonstrated by depositing a layered chalcogenide ferroelectric semiconductor, beta-phase In 2 Se 3 , at temperature as low as 400 °C. Top gate n-channel In 2 Se 3 thin film transistors were fabricated with field-effect mobility ∼1 cm 2 V −1 s −1 , and simple polarization switching based memory results are presented.

36 MATERIALS SCIENCE↗
DOE OSTI2020

Synthesis of Poly(bisisoindigo) Using a Metal-Free Aldol Polymerization for Thin-Film Transistor Applications

Typical syntheses of conjugated polymers rely heavily on organometallic reagents and metal-catalyzed cross-coupling reactions. In this paper, we show that an environmentally benign aldol polymerization can be used to synthesize poly(bisisoindigo), an analog of polyisoindigo with a ring-fused structural repeat unit. Owing to its extended conjugation length, poly(bisisoindigo) absorbs across the UV/vis/NIR spectrum, with an absorption tail that reaches 1000 nm. Due to the four electron-deficient lactam units on each repeat unit, poly(bisoindigo) possesses a low-lying LUMO, which lies at -3.94 eV relative to vacuum. Incorporation of the ring-fused monomer unit also lowered the overall torsional strain in the polymer backbone (relative to polyisoindigo), and the polymer was successfully used in prototype unipolar n-channel organic thin-film transistors.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗